📄 davincihd_ddr.h
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/*
* Copyright 2007 by Spectrum Digital Incorporated.
* All rights reserved. Property of Spectrum Digital Incorporated.
*/
/*
* DDR header file
*
*/
#ifndef DDR_
#define DDR_
#ifdef __cplusplus
extern "C" {
#endif
#include "davincihd.h"
/* ------------------------------------------------------------------------ *
* DDR Memory Space *
* ------------------------------------------------------------------------ */
#define DDR_BASE 0x80000000 // Start of DDR
#define DDR_SIZE 0x10000000 // 256 MB
/* ------------------------------------------------------------------------ *
* DDR Controller *
* ------------------------------------------------------------------------ */
#define DDR_REG_BASE 0x20000000
#define DDR_SDRSTAT *( volatile Uint32* )( DDR_REG_BASE + 0x4 )
#define DDR_SDBCR *( volatile Uint32* )( DDR_REG_BASE + 0x8 )
#define DDR_SDRCR *( volatile Uint32* )( DDR_REG_BASE + 0x0c )
#define DDR_SDTIMR *( volatile Uint32* )( DDR_REG_BASE + 0x10 )
#define DDR_SDTIMR2 *( volatile Uint32* )( DDR_REG_BASE + 0x14 )
#define DDR_PBBPR *( volatile Uint32* )( DDR_REG_BASE + 0x20 )
#define DDR_IRR *( volatile Uint32* )( DDR_REG_BASE + 0xc0 )
#define DDR_IMR *( volatile Uint32* )( DDR_REG_BASE + 0xc4 )
#define DDR_IMSR *( volatile Uint32* )( DDR_REG_BASE + 0xc8 )
#define DDR_IMCR *( volatile Uint32* )( DDR_REG_BASE + 0xcc )
/* DDR PHY */
#define DDR_DDRPHYCR *( volatile Uint32* )( DDR_REG_BASE + 0xe4 )
#define DDR_VTPIOCR *( volatile Uint32* )( DDR_REG_BASE + 0xf0 )
/* ------------------------------------------------------------------------ *
* Prototypes *
* ------------------------------------------------------------------------ */
Int16 DAVINCIHD_DDR_init( Int32 freq );
#ifdef __cplusplus
}
#endif
#endif
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