davincihd.c

用于dm6467 开发平台的uboot源码

/*
 *  Copyright 2007 by Spectrum Digital Incorporated.
 *  All rights reserved. Property of Spectrum Digital Incorporated.
 */

/*
 *  Board Setup
 *
 */

#include "davincihd.h"
#include "davincihd_i2c.h"
#include "davincihd_i2c_gpio.h"

/*
 *  For GEL startup code ( ARM only )
 */
#ifdef ARM_SIDE
    #include "davincihd_ddr.h"
    #include "davincihd_pll.h"
    #include "davincihd_psc.h"
#endif

/* ------------------------------------------------------------------------ *
 *                                                                          *
 *  DAVINCIHD_startupGEL( )                                                 *
 *      Setup for GEL file.                                                 *
 *                                                                          *
 * ------------------------------------------------------------------------ */
Int16 DAVINCIHD_startupGEL( )
{
    #ifdef ARM_SIDE
        /* Setup Power Sleep Controller */
        DAVINCIHD_PSC_enableAll( );

        /* Setup PLL0 */
        DAVINCIHD_enablePll0( OSCIN, 21, 0 );   // Setup Pll1 ( DSP @ 594 MHz )

        /* Setup DDR2 */
      //DAVINCIHD_enablePll1( OSCIN, 21, 0 );   // Setup Pll2 ( DDR @ 297 MHz ) // Generates Content holes, Phantom Errors.
      //DAVINCIHD_DDR_init( 297 );              // Setup DDR2

      //DAVINCIHD_enablePll1( OSCIN, 20, 0 );   // Setup Pll2 ( DDR @ 283.5 MHz )
      //DAVINCIHD_DDR_init( 283 );              // Setup DDR2

        DAVINCIHD_enablePll1( OSCIN, 19, 0 );   // Setup Pll2 ( DDR @ 270 MHz )
        DAVINCIHD_DDR_init( 270 );              // Setup DDR2

    #endif
    return 0;
}

/* ------------------------------------------------------------------------ *
 *                                                                          *
 *  DAVINCIHD_init( )                                                       *
 *      Setup PinMux                                                        *
 *      Setup I2C & I2C GPIO                                                *
 *                                                                          *
 * ------------------------------------------------------------------------ */
Int16 DAVINCIHD_init( )
{
    /*
     *  Setup Pin Mux for board default
     */
    DAVINCIHD_setupPinMux( );

    /*
     *  PSC, PLL, DDR, & EMIFA are already configured in the GEL file
     *  However the function _startupGEL can be called to perform the
     *  same effect as the GEL file.
     */
    DAVINCIHD_startupGEL( );

    /*
     *  Setup I2C/I2C GPIO Expander
     */
    DAVINCIHD_I2C_init( );
    DAVINCIHD_I2C_GPIO_init( );
    return 0;
}

/* ------------------------------------------------------------------------ *
 *                                                                          *
 *  _setupPinMux( )                                                         *
 *                                                                          *
 *      Pin Mux can always be changed w/o any further setup, all that this  *
 *      function does is to set the initial state to a known state.         *
 *                                                                          *
 * ------------------------------------------------------------------------ */
Int16 DAVINCIHD_setupPinMux( )
{
    Int16 pcien = SYS_PINMUX0 & ( 1 << 2 );

    if ( pcien == 0 )
    {
        SYS_PINMUX0 = 0
            | ( 0 << 31 )   // VBUSDIS      [USB_DRVVBUS]
            | ( 0 << 30 )   // STCCK        [GPIO4]
            | ( 0 << 29 )   // AUDCK1       [GPIO2]
            | ( 0 << 28 )   // AUDCK0       [GPIO3]
            | ( 0 << 24 )   // [2]CRGMUX    [no CRGEN]
            | ( 0 << 22 )   // [2]TSSOMUX   [VP_DOUT[11:8]]
            | ( 0 << 20 )   // [2]TSSIMUX   [VP_DIN[7:0]]
            | ( 0 << 18 )   // [2]PTSOMUX   [VP_DIN[7:0]]
            | ( 0 << 16 )   // [2]PTSIMUX   [VP_DIN[15:8]]
            | ( 0 << 5 )    // PINTD        [GPIO5]
            | ( 0 << 2 )    // PCIEN        [no PCI]
            | ( 0 << 1 )    // HPIEN        [no HPI]
            | ( 1 << 0 );   // ATAEN        [ATA/NAND]

        SYS_PINMUX1 = 0
            | ( 2 << 4 )    // [2]UART2CTL  [IrDA]
            | ( 3 << 2 )    // [2]UART1CTL  [GPIO]
            | ( 1 << 0 );   // [2]UART0CTL  [UART0 w/o Flow]
    }
    else
    {
        SYS_PINMUX0 = 0
            | ( 0 << 31 )   // VBUSDIS      [USB_DRVVBUS]
            | ( 0 << 30 )   // STCCK        [GPIO4]
            | ( 0 << 29 )   // AUDCK1       [GPIO2]
            | ( 0 << 28 )   // AUDCK0       [GPIO3]
            | ( 0 << 24 )   // [2]CRGMUX    [no CRGEN]
            | ( 0 << 22 )   // [2]TSSOMUX   [VP_DOUT[11:8]]
            | ( 0 << 20 )   // [2]TSSIMUX   [VP_DIN[7:0]]
            | ( 0 << 18 )   // [2]PTSOMUX   [VP_DIN[7:0]]
            | ( 0 << 16 )   // [2]PTSIMUX   [VP_DIN[15:8]]
            | ( 1 << 5 )    // PINTD        [PINTD]
            | ( 1 << 2 )    // PCIEN        [PCI]
            | ( 0 << 1 )    // HPIEN        [no HPI]
            | ( 0 << 0 );   // ATAEN        [no ATA]

        SYS_PINMUX1 = 0
            | ( 2 << 4 )    // [2]UART2CTL  [IrDA]
            | ( 3 << 2 )    // [2]UART1CTL  [GPIO]
            | ( 1 << 0 );   // [2]UART0CTL  [UART0 w/o Flow]
    }

    /* 3.3V Power Domain */
    SYS_VDD3P3VPWDN = 0
        | ( 1 << 28 )       // USBV     [Power Down][-> USB +5V]
        | ( 1 << 27 )       // CLKOUT   [Power Down][-> DC_P2]
        | ( 0 << 25 )       // SPI      [Power Up]
        | ( 0 << 24 )       // VLYNQ    [Power Up]
        | ( 0 << 21 )       // GMII     [Power Up]
        | ( 0 << 20 )       // MII      [Power Up]
        | ( 0 << 19 )       // McASP1   [Power Up]
        | ( 0 << 18 )       // McASP0   [Power Up]
        | ( 0 << 17 )       // PCIHPI1  [Power Up]
        | ( 0 << 16 )       // PCIHPI0  [Power Up]
        | ( 0 << 15 )       // GPIO     [Power Up]
        | ( 0 << 14 )       // WDTIM    [Power Up]
        | ( 0 << 13 )       // TIM23    [Power Up]
        | ( 0 << 12 )       // TIM01    [Power Up]
        | ( 0 << 11 )       // PWM1     [Power Up]
        | ( 0 << 10 )       // PWM0     [Power Up]
        | ( 0 << 9 )        // UR2FC    [Power Up]
        | ( 0 << 8 )        // UR2DAT   [Power Up]
        | ( 1 << 7 )        // UR1FC    [Power Down]
        | ( 1 << 6 )        // UR1DAT   [Power Down]
        | ( 0 << 5 )        // UR0MDM   [Power Up]
        | ( 0 << 4 )        // UR0DF    [Power Up]
        | ( 0 << 3 )        // VPIF3    [Power Up]
        | ( 0 << 2 )        // VPIF2    [Power Up]
        | ( 0 << 1 )        // VPIF1    [Power Up]
        | ( 0 << 0 );       // VPIF0    [Power Up]

    /* Aux Clock Controls */
    SYS_CLKCTL = 0
        | ( 0 << 25 )       // 24-MHz Power [PowerUp]
        | ( 0 << 24 )       // 24-MHz Osc   [Enable]
        | ( 0 << 16 )       // CLKOUT       [Disable]
        | ( 0 << 8 )        // AUDIO_CLK1   [Disable]
        | ( 0 << 0 );       // AUDIO_CLK0   [Disable]

    /* Video Clocks */
    SYS_VIDCLKCTL = 0
        | ( 4 << 12 )       // Video Chnl 3 Clock [VP_CLKIN0] // VID_CLK_B
        | ( 4 << 8 )        // Video Chnl 2 Clock [VP_CLKIN0] // VID_CLK_A
        | ( 1 << 0 );       // Video Chnl 1 Clock [VP_CLKIN1]

    /* TSIF ( Transport Stream Interface ) Clocks */
    SYS_TSIFCTL = 0
        | ( 0 << 12 )       // TSIF1 Clock Source [CRG1_VCXI]