system_lpc17xx.c

LPC1700在线升级方案V1.00

//     <o11.16>     PCRIT: Repetitive interrupt timer power/clock enable
//     <o11.17>     PCMC: Motor control PWM power/clock enable
//     <o11.18>     PCQEI: Quadrature encoder interface power/clock enable
//     <o11.19>     PCI2C1: I2C interface 1 power/clock enable
//     <o11.21>     PCSSP0: SSP interface 0 power/clock enable
//     <o11.22>     PCTIM2: Timer 2 power/clock enable
//     <o11.23>     PCTIM3: Timer 3 power/clock enable
//     <o11.24>     PCUART2: UART 2 power/clock enable
//     <o11.25>     PCUART3: UART 3 power/clock enable
//     <o11.26>     PCI2C2: I2C interface 2 power/clock enable
//     <o11.27>     PCI2S: I2S interface power/clock enable
//     <o11.29>     PCGPDMA: GP DMA function power/clock enable
//     <o11.30>     PCENET: Ethernet block power/clock enable
//     <o11.31>     PCUSB: USB interface power/clock enable
//   </h>
//
//   <h> Clock Output Configuration Register (CLKOUTCFG)
//     <o12.0..3>   CLKOUTSEL: Selects clock source for CLKOUT
//                     <0=> CPU clock
//                     <1=> Main oscillator
//                     <2=> Internal RC oscillator
//                     <3=> USB clock
//                     <4=> RTC oscillator
//     <o12.4..7>   CLKOUTDIV: Selects clock divider for CLKOUT
//                     <1-16><#-1>
//     <o12.8>      CLKOUT_EN: CLKOUT enable control
//   </h>
//
// </e>
//--------------------------------------------------------------------------------------------------------
*/
#define CLOCK_SETUP           1
#define SCS_Val               0x00000020
#define CLKSRCSEL_Val         0x00000001
#define PLL0_SETUP            1
#define PLL0CFG_Val           0x0000000F
#define PLL1_SETUP            0
#define PLL1CFG_Val           0x00000023
#define CCLKCFG_Val           0x00000003
#define USBCLKCFG_Val         0x00000000
#define PCLKSEL0_Val          0x00000000
#define PCLKSEL1_Val          0x00000000
#define PCONP_Val             0x042887DE
#define CLKOUTCFG_Val         0x00000030


/*--------------------- Flash Accelerator Configuration --------------------------------------------------
//
// <e> Flash Accelerator Configuration
//   <o1.12..15> FLASHTIM: Flash Access Time
//               <0=> 1 CPU clock (for CPU clock up to 20 MHz)
//               <1=> 2 CPU clocks (for CPU clock up to 40 MHz)
//               <2=> 3 CPU clocks (for CPU clock up to 60 MHz)
//               <3=> 4 CPU clocks (for CPU clock up to 80 MHz)
//               <4=> 5 CPU clocks (for CPU clock up to 100 MHz)
//               <5=> 6 CPU clocks (for any CPU clock)
// </e>
//--------------------------------------------------------------------------------------------------------
*/
#define FLASH_SETUP           1
#define FLASHCFG_Val          0x00004000

/*
//-------- <<< end of configuration section >>> ----------------------------------------------------------
*/

/*********************************************************************************************************
 ** Check the register settings
 **********************************************************************************************************/
#define CHECK_RANGE(val, min, max)                ((val < min) || (val > max))
#define CHECK_RSVD(val, mask)                     (val & mask)

/***************************** Clock Configuration ******************************************************/
#if (CHECK_RSVD((SCS_Val),       ~0x00000030))
   #error "SCS: Invalid values of reserved bits!"
#endif

#if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2))
   #error "CLKSRCSEL: Value out of range!"
#endif

#if (CHECK_RSVD((PLL0CFG_Val),   ~0x00FF7FFF))
   #error "PLL0CFG: Invalid values of reserved bits!"
#endif

#if (CHECK_RSVD((PLL1CFG_Val),   ~0x0000007F))
   #error "PLL1CFG: Invalid values of reserved bits!"
#endif

#if (PLL0_SETUP)                                                       /* if PLL0 is used               */
  #if (CCLKCFG_Val < 2)                                                /* CCLKSEL must be greater then1 */
    #error "CCLKCFG: CCLKSEL must be greater then 1 if PLL0 is used!"
  #endif
#endif

#if (CHECK_RANGE((CCLKCFG_Val), 2, 255))
   #error "CCLKCFG: Value out of range!"
#endif

#if (CHECK_RSVD((USBCLKCFG_Val), ~0x0000000F))
   #error "USBCLKCFG: Invalid values of reserved bits!"
#endif

#if (CHECK_RSVD((PCLKSEL0_Val),   0x000C0C00))
   #error "PCLKSEL0: Invalid values of reserved bits!"
#endif

#if (CHECK_RSVD((PCLKSEL1_Val),   0x03000300))
   #error "PCLKSEL1: Invalid values of reserved bits!"
#endif

#if (CHECK_RSVD((PCONP_Val),      0x10100821))
   #error "PCONP: Invalid values of reserved bits!"
#endif

#if (CHECK_RSVD((CLKOUTCFG_Val), ~0x000001FF))
   #error "CLKOUTCFG: Invalid values of reserved bits!"
#endif

/***************************** Flash Accelerator Configuration *******************************************/
#if (CHECK_RSVD((FLASHCFG_Val), ~0x0000F000))
   #error "FLASHCFG: Invalid values of reserved bits!"
#endif


/*********************************************************************************************************
 ** DEFINES
 **********************************************************************************************************/
    
/*********************************************************************************************************
 ** Define clocks
 *********************************************************************************************************/
#define XTAL        (12000000UL)                                /* Oscillator frequency                  */
#define OSC_CLK     (      XTAL)                                /* Main oscillator frequency             */
#define RTC_CLK     (   32000UL)                                /* RTC oscillator frequency              */
#define IRC_OSC     ( 4000000UL)                                /* Internal RC oscillator frequency      */


/*********************************************************************************************************
 ** Clock Variable definitions
 **********************************************************************************************************/
uint32_t SystemFrequency = IRC_OSC;                             /*!< System Clock Frequency (Core Clock)  */


/*********************************************************************************************************
 * Initialize the system
 *
 * @param  none
 * @return none
 *
 * @brief  Setup the microcontroller system.
 *         Initialize the System and update the SystemFrequency variable.
 *********************************************************************************************************/
void SystemInit (void)
{
#if (CLOCK_SETUP)                                                     /* Clock Setup                    */
  LPC_SC->SCS       = SCS_Val;
  if (SCS_Val & (1 << 5)) {                                           /* If Main Oscillator is enabled  */
    while ((LPC_SC->SCS & (1<<6)) == 0);                              /* Wait for Oscillator to be ready*/
  }

  LPC_SC->CCLKCFG   = CCLKCFG_Val;                                    /* Setup Clock Divider            */

  LPC_SC->PCLKSEL0  = PCLKSEL0_Val;                                   /* Peripheral Clock Selection     */
  LPC_SC->PCLKSEL1  = PCLKSEL1_Val;

  LPC_SC->CLKSRCSEL = CLKSRCSEL_Val;                                  /* Select Clock Source for PLL0   */

#if (PLL0_SETUP)
  LPC_SC->PLL0CFG   = PLL0CFG_Val;
  LPC_SC->PLL0CON   = 0x01;                                           /* PLL0 Enable                    */
  LPC_SC->PLL0FEED  = 0xAA;
  LPC_SC->PLL0FEED  = 0x55;
  while (!(LPC_SC->PLL0STAT & (1<<26)));                              /* Wait for PLOCK0                */

  LPC_SC->PLL0CON   = 0x03;                                           /* PLL0 Enable & Connect          */
  LPC_SC->PLL0FEED  = 0xAA;
  LPC_SC->PLL0FEED  = 0x55;
#endif

#if (PLL1_SETUP)
  LPC_SC->PLL1CFG   = PLL1CFG_Val;
  LPC_SC->PLL1CON   = 0x01;                                           /* PLL1 Enable                    */
  LPC_SC->PLL1FEED  = 0xAA;
  LPC_SC->PLL1FEED  = 0x55;
  while (!(LPC_SC->PLL1STAT & (1<<10)));                              /* Wait for PLOCK1                */

  LPC_SC->PLL1CON   = 0x03;                                           /* PLL1 Enable & Connect          */
  LPC_SC->PLL1FEED  = 0xAA;
  LPC_SC->PLL1FEED  = 0x55;
#else
  LPC_SC->USBCLKCFG = USBCLKCFG_Val;                                  /* Setup USB Clock Divider        */
#endif

  LPC_SC->PCONP     = PCONP_Val;                                      /* Power Control for Peripherals  */

  LPC_SC->CLKOUTCFG = CLKOUTCFG_Val;                                  /* Clock Output Configuration     */
#endif

  /*
   * Determine clock frequency according to clock register values
   */
  if (((LPC_SC->PLL0STAT >> 24)&3)==3) {                              /* If PLL0 enabled and connected  */
    switch (LPC_SC->CLKSRCSEL & 0x03) {
      case 0:                                                         /* Internal RC oscillator => PLL0 */
      case 3:                                                         /* Reserved, default to Internal R*/
        SystemFrequency = (IRC_OSC * 
                          ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
                          (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
                          ((LPC_SC->CCLKCFG & 0xFF)+ 1));
        break;
      case 1:                                                         /* Main oscillator => PLL0        */
        SystemFrequency = (OSC_CLK * 
                          ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
                          (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
                          ((LPC_SC->CCLKCFG & 0xFF)+ 1));
        break;
      case 2:                                                         /* RTC oscillator => PLL0         */
        SystemFrequency = (RTC_CLK * 
                          ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
                          (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
                          ((LPC_SC->CCLKCFG & 0xFF)+ 1));
        break;
    }
  } else {
    switch (LPC_SC->CLKSRCSEL & 0x03) {
      case 0:                                                         /* Internal RC oscillator => PLL0 */
      case 3:                                                         /* Reserved,default to Internal RC*/
        SystemFrequency = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
        break;
      case 1:                                                         /* Main oscillator => PLL0        */
        SystemFrequency = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
        break;
      case 2:                                                         /* RTC oscillator => PLL0         */
        SystemFrequency = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
        break;
    }
  }

#if (FLASH_SETUP == 1)                                                /* Flash Accelerator Setup        */
  LPC_SC->FLASHCFG  = (LPC_SC->FLASHCFG & ~0x0000F000) | FLASHCFG_Val;
#endif
}

/*********************************************************************************************************
** End Of File
*********************************************************************************************************/