📄 platform.h
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#ifndef PB1500#define PB1500#endif#define AU1500/* * Frequency info */#define CPU_FREQUENCY (12000000 * 33)#define CPU_SD 2/* * GPIO6 is Pushbutton S8 on the Pb1000 */#define PLATFORM_PUSHBUTTON "GPIO6/SW8"#define PLATFORM_PUSHBUTTON_IRQ AU1000_IRQ_GPIO6#define PLATFORM_PUSHBUTTON_IRQ_POLARITY INT_RISING_EDGE/* * Overlay data structure of the Pb1500 board registers. * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx */#define BCSR_PHYS_ADDR 0x0E000000#ifndef ASSEMBLERtypedef volatile struct { /*00 */ uint32 whoami; /*04 */ uint32 board_status; /*08 */ uint32 switches; /*0C */ uint32 rs232_resets; /*10 */ uint32 pcmcia_control; /*14 */ uint32 graphics; /*18 */ uint32 leds; /*1C */ uint32 swrst_vddi;} BCSR;static BCSR *bcsr = (BCSR *) KSEG1(BCSR_PHYS_ADDR);#endif/* * Register bit definitions for the BCSRs */#define BCSR_WHOAMI_DCID 0x000F#define BCSR_WHOAMI_CPLD 0x00F0#define BCSR_WHOAMI_BOARD 0x0F00#define BCSR_STATUS_RS232RI 0x0001#define BCSR_STATUS_RS232DSR 0x0002#define BCSR_STATUS_RS232CTS 0x0004#define BCSR_STATUS_RS232CD 0x0008#define BCSR_STATUS_PCMCIAVS 0x0030#define BCSR_STATUS_PCIM66EN 0x0040#define BCSR_STATUS_SRAMSIZE 0x0080#define BCSR_STATUS_FLASHLSTS 0x0100#define BCSR_STATUS_FLASHHSTS 0x0200#define BCSR_STATUS_ROMLSTS 0x0400#define BCSR_STATUS_ROMHSTS 0x0800#define BCSR_STATUS_FLASHWP 0x1000#define BCSR_STATUS_SWAPBOOT 0x2000#define BCSR_STATUS_ROMSIZ 0x4000#define BCSR_STATUS_ROMSEL 0x8000#define BCSR_SWITCHES_OCTAL 0x00FF#define BCSR_SWITCHES_ROTARY 0x0F00#define BCSR_RS232RESET_PHY0 0x0001#define BCSR_RS232RESET_PHY1 0x0002#define BCSR_RS232RESET_DC 0x0004#define BCSR_RS232RESET_RS232RTS 0x0100#define BCSR_RS232RESET_RS232DTR 0x0200#define BCSR_PCIPCMCIA_PCVPP 0x0003#define BCSR_PCMCIA_PC0VPP BCSR_PCIPCMCIA_PCVPP#define BCSR_PCMCIA_PC1VPP BCSR_PCIPCMCIA_PCVPP#define BCSR_PCIPCMCIA_PCVCC 0x000C#define BCSR_PCMCIA_PC0VCC BCSR_PCIPCMCIA_PCVCC#define BCSR_PCMCIA_PC1VCC BCSR_PCIPCMCIA_PCVCC#define BCSR_PCIPCMCIA_PCDRVEN 0x0010#define BCSR_PCMCIA_PC0DRVEN BCSR_PCIPCMCIA_PCDRVEN#define BCSR_PCMCIA_PC1DRVEN BCSR_PCIPCMCIA_PCDRVEN#define BCSR_PCIPCMCIA_PCRST 0x0080#define BCSR_PCMCIA_PC0RST BCSR_PCIPCMCIA_PCRST#define BCSR_PCMCIA_PC1RST BCSR_PCIPCMCIA_PCRST#define BCSR_PCIPCMCIA_PCIM33 0x0100#define BCSR_PCIPCMCIA_EXTARB 0x0200#define BCSR_PCIPCMCIA_GPIO200 0x0400#define BCSR_PCIPCMCIA_CLKOUT 0x0800#define BCSR_PCIPCMCIA_PCICFG 0x1000#define BCSR_PCMCIA_PC0VPP_N(N) (BCSR_PCMCIA_PC0VPP & (N<<0))#define BCSR_PCMCIA_PC0VCC_N(N) (BCSR_PCMCIA_PC0VCC & (N<<2))#define BCSR_PCMCIA_PC1VPP_N(N) (BCSR_PCMCIA_PC1VPP & (N<<8))#define BCSR_PCMCIA_PC1VCC_N(N) (BCSR_PCMCIA_PC1VCC & (N<<10))#define BCSR_GRAPHICS_LCDVEE 0x0001#define BCSR_GRAPHICS_LCDVDD 0x0002#define BCSR_GRAPHICS_LCDBL 0x0004#define BCSR_GRAPHICS_PASS 0x0010#define BCSR_GRAPHICS_SEDBE 0x0020#define BCSR_GRAPHICS_RESET 0x0080#define BCSR_LEDS_DECIMALS 0x00FF#define BCSR_LEDS_LED0 0x0100#define BCSR_LEDS_LED1 0x0200#define BCSR_LEDS_LED2 0x0400#define BCSR_LEDS_LED3 0x0800#define BCSR_SWRSTVDDI_VDDI 0x001F#define BCSR_SWRSTVDDI_RESET 0x0080#define PCMCIA_PC_INSERT_IRQ 201#define PCMCIA_PC0_INSERT_IRQ PCMCIA_PC_INSERT_IRQ#define PCMCIA_PC1_INSERT_IRQ PCMCIA_PC_INSERT_IRQ#define PCMCIA_PC_STAT_CHG_IRQ 202#define PCMCIA_PC0_STAT_CHG_IRQ PCMCIA_PC_STAT_CHG_IRQ#define PCMCIA_PC1_STAT_CHG_IRQ PCMCIA_PC_STAT_CHG_IRQ#define PCMCIA_PC_IRQ 203#define PCMCIA_PC0_IRQ PCMCIA_PC_IRQ#define PCMCIA_PC1_IRQ PCMCIA_PC_IRQ#define PCMCIA_PC_VS(X) ((X&BCSR_STATUS_PCMCIAVS)>>4)#define PCMCIA_PC0_VS(X) PCMCIA_PC_VS(X)#define PCMCIA_PC1_VS(X) PCMCIA_PC_VS(X)#define PCMCIA_CARD_COUNT 1#define FLASH_STRATA#define FLASH_START_PHYS_ADDRESS 0x1E000000#define FLASH_END_PHYS_ADDRESS 0x1FFFFFFF#define FLASH_BLOCK_SIZE 0x00040000
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