📄 platform.h
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#ifndef DB1100#define DB1100#endif#define AU1100/* * Frequency info */#define CPU_FREQUENCY (12000000 * 33)#define CPU_SD 2/* * Overlay data structure of the Db1100 board registers. * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx */#define BCSR_PHYS_ADDR 0x0E000000#ifndef ASSEMBLERtypedef volatile struct { /*00 */ uint32 whoami; /*04 */ uint32 board_status; /*08 */ uint32 switches; /*0C */ uint32 resets; /*10 */ uint32 pcmcia_control; /*14 */ uint32 board_specific; /*18 */ uint32 disc_leds; /*1C */ uint32 sw_reset;} BCSR;static BCSR *bcsr = (BCSR *) KSEG1(BCSR_PHYS_ADDR);#endif/* * Register bit definitions for the BCSRs */#define BCSR_BSPEC_SD1WP (1<<15)#define BCSR_BSPEC_SD0WP (1<<14)#define BCSR_BSPEC_SD1_PWR (1<<7)#define BCSR_BSPEC_SD0_PWR (1<<6)#define BCSR_WHOAMI_DCID 0x000F#define BCSR_WHOAMI_CPLD 0x00F0#define BCSR_WHOAMI_BOARD 0x0F00#define BCSR_STATUS_PCMCIA0VS 0x0003#define BCSR_STATUS_PCMCIA1VS 0x000C#define BCSR_STATUS_PCMCIA0FI 0x0010#define BCSR_STATUS_PCMCIA1FI 0x0020#define BCSR_STATUS_RS232RI 0x0001#define BCSR_STATUS_RS232DSR 0x0002#define BCSR_STATUS_RS232CTS 0x0004#define BCSR_STATUS_RS232CD 0x0008#define BCSR_STATUS_PCMCIAVS 0x0030#define BCSR_STATUS_PCIM66EN 0x0040#define BCSR_STATUS_SRAMSIZE 0x0080#define BCSR_STATUS_FLASHLSTS 0x0100#define BCSR_STATUS_FLASHHSTS 0x0200#define BCSR_STATUS_ROMLSTS 0x0400#define BCSR_STATUS_ROMHSTS 0x0800#define BCSR_STATUS_FLASHWP 0x1000#define BCSR_STATUS_SWAPBOOT 0x2000#define BCSR_STATUS_ROMSIZ 0x4000#define BCSR_STATUS_ROMSEL 0x8000#define BCSR_SWITCHES_OCTAL 0x00FF#define BCSR_SWITCHES_ROTARY 0x0F00#define BCSR_RS232RESET_PHY0 0x0001#define BCSR_RS232RESET_PHY1 0x0002#define BCSR_RS232RESET_DC 0x0004#define BCSR_RS232RESET_RS232RTS 0x0100#define BCSR_RS232RESET_RS232DTR 0x0200#define BCSR_PCMCIA_PC0VPP 0x0003#define BCSR_PCMCIA_PC0VCC 0x000C#define BCSR_PCMCIA_PC0DRVEN 0x0010#define BCSR_PCMCIA_PC0RST 0x0080#define BCSR_PCMCIA_PC1VPP 0x0300#define BCSR_PCMCIA_PC1VCC 0x0C00#define BCSR_PCMCIA_PC1DRVEN 0x1000#define BCSR_PCMCIA_PC1RST 0x8000#define BCSR_PCMCIA_PC0VPP_N(N) (BCSR_PCMCIA_PC0VPP & (N<<0))#define BCSR_PCMCIA_PC0VCC_N(N) (BCSR_PCMCIA_PC0VCC & (N<<2))#define BCSR_PCMCIA_PC1VPP_N(N) (BCSR_PCMCIA_PC1VPP & (N<<8))#define BCSR_PCMCIA_PC1VCC_N(N) (BCSR_PCMCIA_PC1VCC & (N<<10))#define BCSR_GRAPHICS_LCDVEE 0x0001#define BCSR_GRAPHICS_LCDVDD 0x0002#define BCSR_GRAPHICS_LCDBL 0x0004#define BCSR_GRAPHICS_PASS 0x0010#define BCSR_GRAPHICS_SEDBE 0x0020#define BCSR_GRAPHICS_RESET 0x0080#define BCSR_LEDS_DECIMALS 0x00FF#define BCSR_LEDS_LED0 0x0100#define BCSR_LEDS_LED1 0x0200#define BCSR_LEDS_LED2 0x0400#define BCSR_LEDS_LED3 0x0800#define BCSR_SWRSTVDDI_VDDI 0x001F#define BCSR_SWRSTVDDI_RESET 0x0080#define PCMCIA_PC0_INSERT_IRQ 0#define PCMCIA_PC1_INSERT_IRQ 3#define PCMCIA_PC0_STAT_CHG_IRQ 1#define PCMCIA_PC1_STAT_CHG_IRQ 4#define PCMCIA_PC0_IRQ 2#define PCMCIA_PC1_IRQ 5#define PCMCIA_PC0_VS(X) ((X&BCSR_STATUS_PCMCIA0VS)>>0)#define PCMCIA_PC1_VS(X) ((X&BCSR_STATUS_PCMCIA1VS)>>2)#define PCMCIA_CARD_COUNT 2#define FLASH_AMD_MIRRORBIT#define FLASH_START_PHYS_ADDRESS 0x1E000000#define FLASH_END_PHYS_ADDRESS 0x1FFFFFFF#define FLASH_BLOCK_SIZE 0x00020000
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