gptimer.h

realview下的一个arm9的bootloader烧录器.支持norflash读写

/*******************************************************************************
 * Copyright Statement:
 * --------------------
 * This software is protected by Copyright and the information contained herein
 * is confidential.  The software may not be copied and the information
 * contained herein may not be used or disclosed except with the written
 * permission of INFOMAX COMMUNICATION CO.,LTD.
 *
 * MODULE NAME:  
 * DESCRIPTION:  
 * AUTHOR:       
 * BEGIN DATE:         
 * LAST MODIFICATION: 
 *****************************************************************************/

#ifndef GPTIMER_H
#define GPTIMER_H
/*******************************************************************************
 Header files
 *******************************************************************************/
#include "common_var_types.h"
#include "magic_reg_defs.h"
#include "magic_env.h"

/*******************************************************************************
 Constant/Marco 
 *******************************************************************************/
#define GPTIMER_0	0
#define GPTIMER_1	1
#define ONE_SHOT	0
#define PERIODIC	1
#define INT_FLAG_OFF	0
#define INT_FLAG_ON	1
#define INT_MASK_OFF	0
#define INT_MASK_ON	1
#define MIN_PERIOD	0x0
#define MAX_PERIOD	0x3FFFFE
#define DISABLE_TIMER_INT	0
#define ENABLE_TIMER_INT	1

/* Values for GP Timer control/status register */
#define GPTIMER_0_INT_FLAG		1	
#define GPTIMER_1_INT_FLAG		(1 << 1)
#define CLEAR_ALL_GPTIMER_INT		(GPTIMER_0_INT_FLAG | GPTIMER_1_INT_FLAG)
#define GPTIMER_0_INT_MASK		(1 << 4)
#define GPTIMER_1_INT_MASK		(1 << 5)
#define GPTIMER_0_INT_MASK_SHIFT	(4)
#define GPTIMER_1_INT_MASK_SHIFT	(5)
#define ENALBE_ALL_GPTIMER_INT		(GPTIMER_0_INT_MASK | GPTIMER_1_INT_MASK)
#define DISALBE_ALL_GPTIMER_INT		~(GPTIMER_0_INT_MASK | GPTIMER_1_INT_MASK)
#define GPTIMER_0_MODE_SHIFT		(8)
#define GPTIMER_1_MODE_SHIFT		(9)
#define GPTIMER_0_MODE_BIT		(1 << 8)
#define GPTIMER_1_MODE_BIT		(1 << 9)


/* Values GP TIMER counter register */
#define DISABLE_TIMER	0x3FFFFF

/* Value for Micro second counter register */
/* n clocks@ n MHz = 1usec */
#define ONE_MICRO_SEC	(HCLK-1) /* HCLK clock */
//#define ONE_MICRO_SEC	65	// [e-mail] // 65M 0x4E	/* 78 instructions/78 Mhz = 1usec */

#ifdef MCU_CORE_ARM_7
#define GPTimerBase (APB_A7_BASE+0x1000)
#elif defined MCU_CORE_ARM_9
#define GPTimerBase (APB_A9_BASE+0x1000)
#else
#error "UNKNOWN MCU_CORE"
#endif

#define USCNTR_CTL_REG ((volatile unsigned int *) (GPTimerBase))
#define GPT_TM0_REG    ((volatile unsigned int *) (GPTimerBase + 0x04))
#define GPT_TM1_REG    ((volatile unsigned int *) (GPTimerBase + 0x08))
#define GPT_CTL_REG    ((volatile unsigned int *) (GPTimerBase + 0x0C))
#define GPT_UD_REG     ((volatile unsigned int *) (GPTimerBase + 0x10))//Undefined Register


/*******************************************************************************
 Structure/Union/Enum/Typedef
 *******************************************************************************/
typedef enum
{
   TIMER_TEST,
   KEY_SCAN_EVENT,
   MAX_TIMER_EVENT_ID
} timer_event_T;


typedef struct
{
   UINT8 int_flag;
   UINT8 int_mask;
   UINT8 timer_mode;
   boolean timer_running;
} gptimer_status_T;

/*******************************************************************************
 Function Prototypes
 *******************************************************************************/
VOID_FUNC timer_init(unsigned char timer_id);
boolean timer_set(unsigned char timer_id, UINT8 timer_mode, UINT32 period, timer_event_T timer_event);
boolean timer_control(UINT8 timer_id, UINT8 action);
boolean chk_timer_event(UINT32 timer_event);
boolean chk_timer_id(UINT8 timer_id);
void gpt_sleep_us(unsigned int sleep_us);
void timer_ISR(void);

#endif /* #ifndef GPTIMER_H */