📄 e__xilinx_vhdl_mti_se_unisim__info
字号:
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dcm [jan90mlMfz_kTlPg=?fz2l7432L7312Vo_Y_mH4_hc?>478DC6=W=2OE;C;6.2b;3531M5 ieee std_logic_1164M4 ieee vital_timingM3 std textioM2 unisim vpkgM1 ieee vital_primitiveso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Edcm_advw1107957124DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L131806V=SaC6h^I;R]^IeoA]>@860OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Adcm_adv_vDP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dcm_adv =SaC6h^I;R]^IeoA]>@860l132070L131899VA_KjileO_8UJQaQ?3T`>11OE;C;6.2b;3531M5 ieee std_logic_1164M4 ieee vital_timingM3 std textioM2 unisim vpkgM1 ieee vital_primitiveso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Edcm_adv_clock_divide_by_2w1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L131557VSfHRbY8zOgTglUgOkFzhD2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Adcm_adv_clock_divide_by_2_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dcm_adv_clock_divide_by_2 SfHRbY8zOgTglUgOkFzhD2l131570L131567VCR:A[R_Tdo@P[@S=W0E8V1OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Edcm_adv_clock_lostw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L131663V8UE8EQKQdTKJM=:RRM;cg0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Adcm_adv_clock_lost_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dcm_adv_clock_lost 8UE8EQKQdTKJM=:RRM;cg0l131681L131673Vd5Ae=;WRD>@S[1C=28i2M1OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Edcm_adv_maximum_period_checkw1107957124DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L131611V2]C6:HiZLTRVZPOO:3JW53OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Adcm_adv_maximum_period_check_vDP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dcm_adv_maximum_period_check 2]C6:HiZLTRVZPOO:3JW53l131623L131622VTCmSEm1ZH?7]E29<3EBVB2OE;C;6.2b;3531M2 ieee std_logic_1164M1 std textioo-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Edcm_basew1107957124DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee numeric_std =NSdli^?T5OD8;4F<blj<3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L133843VXXM;_7K=KBAWfjZ]d>FK;1OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Adcm_base_vDP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee numeric_std =NSdli^?T5OD8;4F<blj<3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dcm_base XXM;_7K=KBAWfjZ]d>FK;1l133898L133882VhU:4;_6?Rnnf`J8Sf]YZi0OE;C;6.2b;3531M7 ieee std_logic_1164M6 ieee vital_timingM5 ieee numeric_stdM4 unisim vcomponentsM3 unisim vpkgM2 std textioM1 ieee vital_primitiveso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Edcm_clock_divide_by_2w1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L6983V<YK3B9=GFOb94lA[][07A0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Adcm_clock_divide_by_2_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dcm_clock_divide_by_2 <YK3B9=GFOb94lA[][07A0l6996L6993VUDJk;hiBUK^98^LaChOS01OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Edcm_clock_lostw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L7089V_RQooFIcKfoIbPJiQQaX71OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Adcm_clock_lost_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dcm_clock_lost _RQooFIcKfoIbPJiQQaX71l7107L7099VQ42aMMIg9LXXoA7m_RKTS1OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Edcm_maximum_period_checkw1107957124DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L7037V0_2gC^HdB9WVQ29]3706j0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Adcm_maximum_period_check_vDP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dcm_maximum_period_check 0_2gC^HdB9WVQ29]3706j0l7049L7048Vm[L>J?HGCWVWh^`0GQ7`n3OE;C;6.2b;3531M2 ieee std_logic_1164M1 std textioo-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Edcm_psw1107957124DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee numeric_std =NSdli^?T5OD8;4F<blj<3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L134024V0[J;]53Dc:?^:Qim@YQeI0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Adcm_ps_vDP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee numeric_std =NSdli^?T5OD8;4F<blj<3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dcm_ps 0[J;]53Dc:?^:Qim@YQeI0l134072L134068V;eK[K9Ol8l`fDIiAd>N@z0OE;C;6.2b;3531M7 ieee std_logic_1164M6 ieee vital_timingM5 ieee numeric_stdM4 unisim vcomponentsM3 unisim vpkgM2 std textioM1 ieee vital_primitiveso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Edsp48w1107957124DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2DP ieee std_logic_signed <9<Kcl:S52:oW`F]FQhb20DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L134179V]_Y3?Ll3k2Sl9hYL`4YPK3OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Adsp48_vDP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2DP ieee std_logic_signed <9<Kcl:S52:oW`F]FQhb20DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work dsp48 ]_Y3?Ll3k2Sl9hYL`4YPK3l134423L134232Vc]mPAVS]Ko_^UL`S5ZK0J3OE;C;6.2b;3531M7 ieee std_logic_1164M6 ieee std_logic_signedM5 ieee std_logic_arithM4 std textioM3 unisim vpkgM2 ieee vital_timingM1 ieee vital_primitiveso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Eemacw1107957122DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_SMODEL.vhdl0L21507V_;Vo@Tj1Si=?kaL@fXa7Y2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Aemac_vDP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work emac _;Vo@Tj1Si=?kaL@fXa7Y2l22041L21691Vf77Qe`]fj7fLdh^WUifNH1OE;C;6.2b;3531M3 ieee std_logic_1164M2 ieee vital_timingM1 unisim vcomponentso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Eemac_swiftw1107958380DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\smartmodel\nt\wrappers\mtivhdl\smartmodel_wrappers.vhdl0L62V[Bnc9b2klg;5m^<aN[YZQ3OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1AsmartmodelDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work emac_swift [Bnc9b2klg;5m^<aN[YZQ3l785L782VkVFgb=KZ9>aE=2hLi_O>d0OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Eemac_swift_busw1107958380DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\smartmodel\nt\wrappers\mtivhdl\smartmodel_wrappers.vhdl0L5904VFKATJS;9O>oUef3hX3k:G0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Aemac_swift_bus_vDE work emac_swift [Bnc9b2klg;5m^<aN[YZQ3DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work emac_swift_bus FKATJS;9O>oUef3hX3k:G0l6975L6077Vgo>>a^XbWeDOBg@ajDQLR1OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Efdw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L8768VzP;dghlNbzW`Wo^hR3DC92OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Afd_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work fd zP;dghlNbzW`Wo^hR3DC92l8782L8781Vl1j<e6`U=mZcLk:@9zE2[0OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Efd_1w1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L8822VS6e:zi5SbZG7>ET;k>@1;0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Afd_1_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work fd_1 S6e:zi5SbZG7>ET;k>@1;0l8836L8835VLA;OMb:Ln529bGFg?PfA?2OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Efdcw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L8874VYY]VzoZmF0TV>_i@AF=LI2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Afdc_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work fdc YY]VzoZmF0TV>_i@AF=LI2l8889L8888V`7B_<F3XUADRVKmQOm0RD2OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Efdc_1w1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L8931V6IzfI3QS89TM7Kc94[^nI1OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Afdc_1_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work fdc_1 6IzfI3QS89TM7Kc94[^nI1l8946L8945V2=YMHB3LIIo?S72i2^ihP2OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Efdcew1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L8988V@CnAUn`>C1jL<9>BjfI0X0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Afdce_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work fdce @CnAUn`>C1jL<9>BjfI0X0l9004L9003VW^VkX]LJ5><6bOH`QH[gn3OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Efdce_1w1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L9048VnjkSG7>=8NnQFcYdeK37H2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Afdce_1_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work fdce_1 njkSG7>=8NnQFcYdeK37H2l9064L9063V=SD4>2HaX^CMPD_2X[I=I3OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Efdcpw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L9108VjM02RYYX`S@_5D;9BhImQ3OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Afdcp_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work fdcp jM02RYYX`S@_5D;9BhImQ3l9124L9123V]0@FFa;=Z60il:^aOV;e[0OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Efdcp_1w1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L9168V>?Ck4fTM`CfXQFD3XHAHL2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Afdcp_1_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work fdcp_1 >?Ck4fTM`CfXQFD3XHAHL2l9185L9184Vg<jD]=>`29o@:_m<I^_WI0OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Efdcpew1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L9229VS@P[eLA2o:ZXKj8ZQHUVM0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtE⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -