📄 e__xilinx_vhdl_mti_se_unisim__info
字号:
31o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abscan_virtex2_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bscan_virtex2 <JXe6CCg0P0ni=b_Y:]a_2l1107L1106VKUZjjYo[JLK<YXKDIZJJC3OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebscan_virtex4w1107957124DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L130652V2VhRQ<XLSZJ=nOnKO;ebe0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abscan_virtex4_vDP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bscan_virtex4 2VhRQ<XLSZJ=nOnKO;ebe0l130676L130671VXSBJ7`7?c@mjI6Ne=YL^h1OE;C;6.2b;3531M2 ieee std_logic_1164M1 unisim vcomponentso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebscntrlw1107957124DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L137581Vz>@jHU5jQ_2LcY3l6B6:D2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abscntrl_vDP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bscntrl z>@jHU5jQ_2LcY3l6B6:D2l137625L137604V8QGgDiJ_5Ea3_>WAmGEG92OE;C;6.2b;3531M7 ieee std_logic_1164M6 ieee std_logic_arithM5 unisim vpkgM4 std textioM3 ieee vital_timingM2 ieee vital_primitivesM1 unisim vcomponentso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1143VgPFXO>U60lY_GEbRA=M=l3OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abuf_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work buf gPFXO>U60lY_GEbRA=M=l3l1152L1151V^J]EY4@nj1=0HZ3kg_A>>2OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufcfw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1178VLIl0S_2]B04EKKbdJ77HM1OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufcf_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufcf LIl0S_2]B04EKKbdJ77HM1l1187L1186VfZJ?zFC6XMVXAgWBFJ@zY1OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufew1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1215VUGh8SLJe^Lfkg4j4nHQ^A2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufe_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufe UGh8SLJe^Lfkg4j4nHQ^A2l1225L1224Vid[mEgeTb8:@inam8SN3@3OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebuffoew1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1272VV`2=5e8[MmXgL^85nKJeg2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abuffoe_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work buffoe V`2=5e8[MmXgL^85nKJeg2l1281L1280Vz;aGcHHnPDRa:0Un>R5H>0OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1309VZlAQ;mf6DB5Mh4kTdADiK1OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufg_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufg ZlAQ;mf6DB5Mh4kTdADiK1l1318L1317VnXSJ_nakf=ZBA0RBBl1^E1OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgcew1107957124DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L130463V^cK`=[YWVA8N>VYH2j<5>1OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufgce_vDP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufgce ^cK`=[YWVA8N>VYH2j<5>1l130477L130472VnOe[_aDlz8l_:R=lSVSR91OE;C;6.2b;3531M2 ieee std_logic_1164M1 unisim vcomponentso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgce_1w1107957124DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L130519VGaUD5:WU;8i:cAZ90XLzf3OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufgce_1_vDP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufgce_1 GaUD5:WU;8i:cAZ90XLzf3l130532L130527VP07bQVLU_@i29i7jgY[8V0OE;C;6.2b;3531M2 ieee std_logic_1164M1 unisim vcomponentso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgctrlw1107957124DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L130768VEFMUChCT?Bi?i]g6RzLoI2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufgctrl_vDP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufgctrl EFMUChCT?Bi?i]g6RzLoI2l130833L130793V?BJ1^O:d^EA[7AA`M?JI>1OE;C;6.2b;3531M5 ieee std_logic_1164M4 unisim vpkgM3 std textioM2 ieee vital_timingM1 ieee vital_primitiveso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgdllw1107957124DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L130574V?cA6iFPCj2oVV6J>9kKXD2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufgdll_vDP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufgdll ?cA6iFPCj2oVV6J>9kKXD2l130591L130585V;c2?_mW27gg49]8C0CX:R0OE;C;6.2b;3531M2 ieee std_logic_1164M1 unisim vcomponentso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgmuxw1107957124DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1348VH:JiELXYb2eV0`=DK?F;a2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufgmux_vDP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufgmux H:JiELXYb2eV0`=DK?F;a2l1362L1361V5NibaaXOjM6L1[gnc6]G?2OE;C;6.2b;3531M3 ieee std_logic_1164M2 ieee vital_timingM1 ieee vital_primitiveso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgmux_1w1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1424V?_9:2E63fMDi_NSWmlO5i3OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufgmux_1_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufgmux_1 ?_9:2E63fMDi_NSWmlO5i3l1435L1434VUd<7YfZj4j^hEeMF0emNc0OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgmux_virtex4w1107957124DP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L131084VjE]W6k3G5IY[34m`1L`<S3OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufgmux_virtex4_vDP unisim vcomponents Mgc?1DO:gobG6MeLhjRoA1DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufgmux_virtex4 jE]W6k3G5IY[34m`1L`<S3l131104L131097Vf>zaQ8NJ?nR404hY@N[Ra2OE;C;6.2b;3531M7 ieee std_logic_1164M6 ieee std_logic_arithM5 unisim vpkgM4 std textioM3 ieee vital_timingM2 ieee vital_primitivesM1 unisim vcomponentso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgpw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1529V3]=6`OiLRVV?AR]hT=TEX1OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufgp_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufgp 3]=6`OiLRVV?AR]hT=TEX1l1538L1537VjPG`Xz@RZ?^N57`=T88TP3OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgsrw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1566V?mR:hbTFLKV^F]b6CF37M0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufgsr_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufgsr ?mR:hbTFLKV^F]b6CF37M0l1575L1574Vk:DVGTOChlPLLB9eW^JGc3OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufgtsw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1603VfPDQbH>VTeJ33<TO5LP2P2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufgts_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufgts fPDQbH>VTeJ33<TO5LP2P2l1612L1611V39hVKRchg2PHe7?hi66[[3OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufiow1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L131153VbYg;[`@?P^2=e:MWaz5F23OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufio_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufio bYg;[`@?P^2=e:MWaz5F23l131163L131162Vda[KlPmZdCga]l:V?eN=V2OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebufrw1107957124DP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L131191VQ1DcEhU=6Cz88b]O^z0470OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abufr_vDP ieee vital_primitives E9g6AWKAc2T]enMfl94If3DP ieee vital_timing OBWK>;kUYmkG<OChK2lhV1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP unisim vpkg F^fCCF2^cBPlHWmF419dn1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work bufr Q1DcEhU=6Cz88b]O^z0470l131234L131208VK7;X4Fb6_E0M^<EYI?VdF2OE;C;6.2b;3531M5 ieee std_logic_1164M4 unisim vpkgM3 std textioM2 ieee vital_timingM1 ieee vital_primitiveso-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ebuftw1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1640VBh90<S`?[AIEze5=kF5cT2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Abuft_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work buft Bh90<S`?[AIEze5=kF5cT2l1650L1649VFABOOd5BSHQa04LfNoLG13OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ecapture_fpgacorew1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1697V2T326<TZVLg:J4?6H7PNS2OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Acapture_fpgacore_vDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2DE work capture_fpgacore 2T326<TZVLg:J4?6H7PNS2l1708L1707V`OU`05Rb`<0>6kSz5zdPE1OE;C;6.2b;3531M1 ieee std_logic_1164o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Ecapture_spartan2w1107957124DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2dE:\Modeltech_6.2b\examplesFE:\Xilinx\vhdl\src\unisims\unisim_VITAL.vhdl0L1735VcDWT[8CPE]No`]?;ZDnDK0OE;C;6.2b;3531o-source -93 -work E:\Xilinx\vhdl\mti_se\unisimtExplicit 1Acapture_spartan2_v⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -