📄 watchdog.lst
字号:
__text_start:
__start:
001A E5CF LDI R28,0x5F
001B E0D2 LDI R29,2
001C BFCD OUT 0x3D,R28
001D BFDE OUT 0x3E,R29
001E 51C0 SUBI R28,0x10
001F 40D0 SBCI R29,0
0020 EA0A LDI R16,0xAA
0021 8308 STD Y+0,R16
0022 2400 CLR R0
0023 E6E2 LDI R30,0x62
0024 E0F0 LDI R31,0
0025 E010 LDI R17,0
0026 36E2 CPI R30,0x62
0027 07F1 CPC R31,R17
0028 F011 BEQ 0x002B
0029 9201 ST R0,Z+
002A CFFB RJMP 0x0026
002B 8300 STD Z+0,R16
002C E3E2 LDI R30,0x32
002D E0F0 LDI R31,0
002E E6A0 LDI R26,0x60
002F E0B0 LDI R27,0
0030 E010 LDI R17,0
0031 33E4 CPI R30,0x34
0032 07F1 CPC R31,R17
0033 F021 BEQ 0x0038
0034 95C8 LPM
0035 9631 ADIW R30,1
0036 920D ST R0,X+
0037 CFF9 RJMP 0x0031
0038 D054 RCALL _main
_exit:
0039 CFFF RJMP _exit
FILE: C:\ATMega8515\看门狗\init.c
(0001) //ICC-AVR application builder : 2006-4-29 3:07:04
(0002) // Target : M8515
(0003) // Crystal: 11.059Mhz
(0004)
(0005) #include <iom8515v.h>
(0006) #include <macros.h>
(0007)
(0008) #define uchar unsigned char
(0009) void port_init(void)
(0010) {
(0011) PORTA = 0x00;
_port_init:
003A 2422 CLR R2
003B BA2B OUT 0x1B,R2
(0012) DDRA = 0xFF;
003C EF8F LDI R24,0xFF
003D BB8A OUT 0x1A,R24
(0013) PORTB = 0x00;
003E BA28 OUT 0x18,R2
(0014) DDRB = 0x00;
003F BA27 OUT 0x17,R2
(0015) PORTC = 0x00;
0040 BA25 OUT 0x15,R2
(0016) DDRC = 0xC0;
0041 EC80 LDI R24,0xC0
0042 BB84 OUT 0x14,R24
(0017) PORTD = 0x00;
0043 BA22 OUT 0x12,R2
(0018) DDRD = 0x00;
0044 BA21 OUT 0x11,R2
(0019) PORTE = 0x00;
0045 B827 OUT 0x07,R2
(0020) DDRE = 0x00;
0046 B826 OUT 0x06,R2
0047 9508 RET
(0021) }
(0022)
(0023) //Watchdog initialize
(0024) // prescale: 2048K
(0025) void watchdog_init(void)
(0026) {
(0027) WDR(); //this prevents a timout on enabling
_watchdog_init:
0048 95A8 WDR
(0028) WDTCR = 0x0F; //WATCHDOG ENABLED - dont forget WDR
0049 E08F LDI R24,0xF
004A BD81 OUT 0x21,R24
004B 9508 RET
(0029) }
(0030)
(0031) //TIMER1 initialize - prescale:1
(0032) // WGM: 0) Normal, TOP=0xFFFF
(0033) // desired value: 1mSec
(0034) // actual value: 1.000mSec (0.0%)
(0035) void timer1_init(void)
(0036) {
(0037) TCCR1B = 0x00; //stop
_timer1_init:
004C 2422 CLR R2
004D BC2E OUT 0x2E,R2
(0038) TCNT1H = 0xD4; //setup
004E ED84 LDI R24,0xD4
004F BD8D OUT 0x2D,R24
(0039) TCNT1L = 0xCE;
0050 EC8E LDI R24,0xCE
0051 BD8C OUT 0x2C,R24
(0040) OCR1AH = 0x2B;
0052 E28B LDI R24,0x2B
0053 BD8B OUT 0x2B,R24
(0041) OCR1AL = 0x32;
0054 E382 LDI R24,0x32
0055 BD8A OUT 0x2A,R24
(0042) OCR1BH = 0x2B;
0056 E28B LDI R24,0x2B
0057 BD89 OUT 0x29,R24
(0043) OCR1BL = 0x32;
0058 E382 LDI R24,0x32
0059 BD88 OUT 0x28,R24
(0044) TCCR1A = 0x00;
005A BC2F OUT 0x2F,R2
(0045) TCCR1B = 0x01; //start Timer
005B E081 LDI R24,1
005C BD8E OUT 0x2E,R24
005D 9508 RET
_timer1_ovf_isr:
005E 922A ST R2,-Y
005F 923A ST R3,-Y
0060 938A ST R24,-Y
0061 939A ST R25,-Y
0062 B62F IN R2,0x3F
0063 922A ST R2,-Y
(0046) }
(0047)
(0048) uchar count=0;
(0049) extern uchar shuma;
(0050) #pragma interrupt_handler timer1_ovf_isr:7
(0051) void timer1_ovf_isr(void)
(0052) {
(0053) TCNT1H = 0xD4; //reload counter high value
0064 ED84 LDI R24,0xD4
0065 BD8D OUT 0x2D,R24
(0054) TCNT1L = 0xCE; //reload counter low value
0066 EC8E LDI R24,0xCE
0067 BD8C OUT 0x2C,R24
(0055) if(count++==500){count=0;shuma++;}
0068 90200060 LDS R2,count
006A 2433 CLR R3
006B 2D82 MOV R24,R2
006C 5F8F SUBI R24,0xFF
006D 93800060 STS count,R24
006F 2D82 MOV R24,R2
0070 3F84 CPI R24,0xF4
0071 F441 BNE 0x007A
0072 2422 CLR R2
0073 92200060 STS count,R2
0075 91800061 LDS R24,shuma
0077 5F8F SUBI R24,0xFF
0078 93800061 STS shuma,R24
007A 9029 LD R2,Y+
007B BE2F OUT 0x3F,R2
007C 9199 LD R25,Y+
007D 9189 LD R24,Y+
007E 9039 LD R3,Y+
007F 9029 LD R2,Y+
0080 9518 RETI
(0056) }
(0057)
(0058) //call this routine to initialize all peripherals
(0059) void init_devices(void)
(0060) {
(0061) //stop errant interrupts until set up
(0062) CLI(); //disable all interrupts
_init_devices:
0081 94F8 BCLR 7
(0063) port_init();
0082 DFB7 RCALL _port_init
(0064) watchdog_init();
0083 DFC4 RCALL _watchdog_init
(0065) timer1_init();
0084 DFC7 RCALL _timer1_init
(0066)
(0067) MCUCR = 0x00;
0085 2422 CLR R2
0086 BE25 OUT 0x35,R2
(0068) EMCUCR = 0x00;
0087 BE26 OUT 0x36,R2
(0069) GICR = 0x00;
0088 BE2B OUT 0x3B,R2
(0070) TIMSK = 0x80;
0089 E880 LDI R24,0x80
008A BF89 OUT 0x39,R24
(0071) SEI(); //re-enable interrupts
008B 9478 BSET 7
008C 9508 RET
FILE: C:\ATMega8515\看门狗\main.c
(0001) #include <iom8515v.h>
(0002) #include"ForATmega8515.h"
(0003)
(0004) void display();
(0005) void delay(uint ticks);
(0006) uchar shuma=0;
(0007) void main()
(0008) {
(0009) init_devices();
_main:
008D DFF3 RCALL _init_devices
008E C005 RJMP 0x0094
(0010) while(1)
(0011) {
(0012) display();
008F D006 RCALL _display
(0013) WDTCR=(1<<WDCE)|(1<<WDE);//
0090 E188 LDI R24,0x18
0091 BD81 OUT 0x21,R24
(0014) WDTCR=0; //清看门狗
0092 2422 CLR R2
0093 BC21 OUT 0x21,R2
0094 CFFA RJMP 0x008F
0095 9508 RET
(0015) }
(0016)
(0017)
(0018) }
(0019)
(0020) void display()
(0021) {
(0022) PORTA=Tab[shuma>>4];
_display:
0096 E282 LDI R24,0x22
0097 E090 LDI R25,0
0098 91E00061 LDS R30,shuma
009A 27FF CLR R31
009B 95F5 ASR R31
009C 95E7 ROR R30
009D 95F5 ASR R31
009E 95E7 ROR R30
009F 95F5 ASR R31
00A0 95E7 ROR R30
00A1 95F5 ASR R31
00A2 95E7 ROR R30
00A3 0FE8 ADD R30,R24
00A4 1FF9 ADC R31,R25
00A5 91E4 LPM R30,0(Z)
00A6 BBEB OUT 0x1B,R30
(0023) PORTC&=~SEG0;
00A7 98AF CBI 0x15,7
(0024) delay(1);
00A8 E001 LDI R16,1
00A9 E010 LDI R17,0
00AA D012 RCALL _delay
(0025) PORTC|=SEG0;
00AB 9AAF SBI 0x15,7
(0026) /////////////////
(0027) PORTA=Tab[shuma&0x0f];
00AC E282 LDI R24,0x22
00AD E090 LDI R25,0
00AE 91E00061 LDS R30,shuma
00B0 27FF CLR R31
00B1 70EF ANDI R30,0xF
00B2 70F0 ANDI R31,0
00B3 0FE8 ADD R30,R24
00B4 1FF9 ADC R31,R25
00B5 91E4 LPM R30,0(Z)
00B6 BBEB OUT 0x1B,R30
(0028) PORTC&=~SEG1;
00B7 98AE CBI 0x15,6
(0029) delay(1);
00B8 E001 LDI R16,1
00B9 E010 LDI R17,0
00BA D002 RCALL _delay
(0030) PORTC|=SEG1;
00BB 9AAE SBI 0x15,6
00BC 9508 RET
_delay:
x --> R20
ticks --> R16
00BD D015 RCALL push_gset1
(0031)
(0032)
(0033) }
(0034)
(0035)
(0036) void delay(uint ticks)
(0037) {
(0038) uchar x;
(0039) for(;ticks!=0;ticks--)for(x=100;x!=0;x--);
FILE: <library>
00BE C007 RJMP 0x00C6
00BF E644 LDI R20,0x64
00C0 C001 RJMP 0x00C2
00C1 954A DEC R20
00C2 2344 TST R20
00C3 F7E9 BNE 0x00C1
00C4 5001 SUBI R16,1
00C5 4010 SBCI R17,0
00C6 3000 CPI R16,0
00C7 0701 CPC R16,R17
00C8 F7B1 BNE 0x00BF
00C9 D00C RCALL pop_gset1
00CA 9508 RET
push_gset5:
00CB 92FA ST R15,-Y
00CC 92EA ST R14,-Y
push_gset4:
00CD 92DA ST R13,-Y
00CE 92CA ST R12,-Y
push_gset3:
00CF 92BA ST R11,-Y
00D0 92AA ST R10,-Y
push_gset2:
00D1 937A ST R23,-Y
00D2 936A ST R22,-Y
push_gset1:
00D3 935A ST R21,-Y
00D4 934A ST R20,-Y
00D5 9508 RET
pop_gset1:
00D6 E0E1 LDI R30,1
pop:
00D7 9149 LD R20,Y+
00D8 9159 LD R21,Y+
00D9 FDE0 SBRC R30,0
00DA 9508 RET
00DB 9169 LD R22,Y+
00DC 9179 LD R23,Y+
00DD FDE1 SBRC R30,1
00DE 9508 RET
00DF 90A9 LD R10,Y+
00E0 90B9 LD R11,Y+
00E1 FDE2 SBRC R30,2
00E2 9508 RET
00E3 90C9 LD R12,Y+
00E4 90D9 LD R13,Y+
00E5 FDE3 SBRC R30,3
00E6 9508 RET
00E7 90E9 LD R14,Y+
00E8 90F9 LD R15,Y+
00E9 9508 RET
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