📄 c8051f040.lst
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C51 COMPILER V6.23a C8051F040 12/14/2004 13:09:06 PAGE 1
C51 COMPILER V6.23a, COMPILATION OF MODULE C8051F040
OBJECT MODULE PLACED IN c8051f040.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE c8051f040.h BROWSE DEBUG OBJECTEXTEND
stmt level source
1 /*---------------------------------------------------------------------------
2 ;
3 ;
4 ;
5 ;
6 ; FILE NAME : C8051F040.H
7 ; TARGET MCU : C8051F040, 'F041, 'F042, 'F043
8 ; DESCRIPTION : Register and bit definitions for the C8051F04x product
9 ; family.
10 ; REVISION 1.2
11 ;---------------------------------------------------------------------------*/
12
13 /* BYTE Registers */
14 sfr P0 = 0x80; /* PORT 0 */
15 sfr SP = 0x81; /* STACK POINTER */
16 sfr DPL = 0x82; /* DATA POINTER - LOW BYTE */
17 sfr DPH = 0x83; /* DATA POINTER - HIGH BYTE */
18 sfr SFRPAGE = 0x84; /* SFR PAGE SELECT */
19 sfr SFRNEXT = 0x85; /* SFR STACK NEXT PAGE */
20 sfr SFRLAST = 0x86; /* SFR STACK LAST PAGE */
21 sfr PCON = 0x87; /* POWER CONTROL */
22 sfr TCON = 0x88; /* TIMER CONTROL */
23 sfr CPT0CN = 0x88; /* COMPARATOR 0 CONTROL */
24 sfr CPT1CN = 0x88; /* COMPARATOR 1 CONTROL */
25 sfr CPT2CN = 0x88; /* COMPARATOR 2 CONTROL */
26 sfr TMOD = 0x89; /* TIMER MODE */
27 sfr CPT0MD = 0x89; /* COMPARATOR 0 MODE */
28 sfr CPT1MD = 0x89; /* COMPARATOR 1 MODE */
29 sfr CPT2MD = 0x89; /* COMPARATOR 2 MODE */
30 sfr TL0 = 0x8A; /* TIMER 0 - LOW BYTE */
31 sfr OSCICN = 0x8A; /* INTERNAL OSCILLATOR CONTROL */
32 sfr TL1 = 0x8B; /* TIMER 1 - LOW BYTE */
33 sfr OSCICL = 0x8B; /* INTERNAL OSCILLATOR CALIBRATION */
34 sfr TH0 = 0x8C; /* TIMER 0 - HIGH BYTE */
35 sfr OSCXCN = 0x8C; /* EXTERNAL OSCILLATOR CONTROL */
36 sfr TH1 = 0x8D; /* TIMER 1 - HIGH BYTE */
37 sfr CKCON = 0x8E; /* TIMER 0/1 CLOCK CONTROL */
38 sfr PSCTL = 0x8F; /* FLASH WRITE/ERASE CONTROL */
39 sfr P1 = 0x90; /* PORT 1 */
40 sfr SSTA0 = 0x91; /* UART 0 STATUS */
41 sfr SFRPGCN = 0x96; /* SFR PAGE CONTROL */
42 sfr CLKSEL = 0x97; /* SYSTEM CLOCK SELECT */
43 sfr SCON0 = 0x98; /* UART 0 CONTROL */
44 sfr SCON1 = 0x98; /* UART 1 CONTROL */
45 sfr SBUF0 = 0x99; /* UART 0 BUFFER */
46 sfr SBUF1 = 0x99; /* UART 1 BUFFER */
47 sfr SPI0CFG = 0x9A; /* SPI 0 CONFIGURATION */
48 sfr SPI0DAT = 0x9B; /* SPI 0 DATA */
49 sfr P4MDOUT = 0x9C; /* PORT 4 OUTPUT MODE */
50 sfr SPI0CKR = 0x9D; /* SPI 0 CLOCK RATE CONTROL */
51 sfr P5MDOUT = 0x9D; /* PORT 5 OUTPUT MODE */
52 sfr P6MDOUT = 0x9E; /* PORT 6 OUTPUT MODE */
53 sfr P7MDOUT = 0x9F; /* PORT 7 OUTPUT MODE */
54 sfr P2 = 0xA0; /* PORT 2 */
55 sfr EMI0TC = 0xA1; /* EMIF TIMING CONTROL */
C51 COMPILER V6.23a C8051F040 12/14/2004 13:09:06 PAGE 2
56 sfr EMI0CN = 0xA2; /* EMIF CONTROL */
57 sfr EMI0CF = 0xA3; /* EMIF CONFIGURATION */
58 sfr P0MDOUT = 0xA4; /* PORT 0 OUTPUT MODE */
59 sfr P1MDOUT = 0xA5; /* PORT 1 OUTPUT MODE */
60 sfr P2MDOUT = 0xA6; /* PORT 2 OUTPUT MODE CONFIGURATION */
61 sfr P3MDOUT = 0xA7; /* PORT 3 OUTPUT MODE CONFIGURATION */
62 sfr IE = 0xA8; /* INTERRUPT ENABLE */
63 sfr SADDR0 = 0xA9; /* UART 0 SLAVE ADDRESS */
64 sfr SADDR1 = 0xA9; /* UART 1 SLAVE ADDRESS */
65 sfr P1MDIN = 0xAD; /* PORT 1 INPUT MODE */
66 sfr P2MDIN = 0xAE; /* PORT 2 INPUT MODE */
67 sfr P3MDIN = 0xAF; /* PORT 3 INPUT MODE */
68 sfr P3 = 0xB0; /* PORT 3 */
69 sfr FLSCL = 0xB7; /* FLASH TIMING PRESCALAR */
70 sfr FLACL = 0xB7; /* FLASH ACCESS LIMIT */
71 sfr IP = 0xB8; /* INTERRUPT PRIORITY */
72 sfr SADEN0 = 0xB9; /* UART 0 SLAVE ADDRESS MASK */
73 sfr AMX2CF = 0xBA; /* ADC 2 MUX CONFIGURATION */
74 sfr AMX0PRT = 0xBD; /* ADC 0 MUX PORT PIN SELECT REGISTER */
75 sfr AMX0CF = 0xBA; /* ADC 0 CONFIGURATION REGISTER */
76 sfr AMX0SL = 0xBB; /* ADC 0 AND ADC 1 MODE SELECTION */
77 sfr AMX2SL = 0xBB; /* ADC 2 MUX CHANNEL SELECTION */
78 sfr ADC0CF = 0xBC; /* ADC 0 CONFIGURATION */
79 sfr ADC2CF = 0xBC; /* ADC 2 CONFIGURATION */
80 sfr ADC0L = 0xBE; /* ADC 0 DATA - LOW BYTE */
81 sfr ADC2 = 0xBE; /* ADC 2 DATA - LOW BYTE */
82 sfr ADC0H = 0xBF; /* ADC 0 DATA - HIGH BYTE */
83 sfr SMB0CN = 0xC0; /* SMBUS 0 CONTROL */
84 sfr CAN0STA = 0xC0; /* CAN 0 STATUS */
85 sfr SMB0STA = 0xC1; /* SMBUS 0 STATUS */
86 sfr SMB0DAT = 0xC2; /* SMBUS 0 DATA */
87 sfr SMB0ADR = 0xC3; /* SMBUS 0 SLAVE ADDRESS */
88 sfr ADC0GTL = 0xC4; /* ADC 0 GREATER-THAN REGISTER - LOW BYTE */
89 sfr ADC2GT = 0xC4; /* ADC 2 GREATER-THAN REGISTER - LOW BYTE */
90 sfr ADC0GTH = 0xC5; /* ADC 0 GREATER-THAN REGISTER - HIGH BYTE */
91 sfr ADC0LTL = 0xC6; /* ADC 0 LESS-THAN REGISTER - LOW BYTE */
92 sfr ADC2LT = 0xC6; /* ADC 2 LESS-THAN REGISTER - LOW BYTE */
93 sfr ADC0LTH = 0xC7; /* ADC 0 LESS-THAN REGISTER - HIGH BYTE */
94 sfr TMR2CN = 0xC8; /* TIMER 2 CONTROL */
95 sfr TMR3CN = 0xC8; /* TIMER 3 CONTROL */
96 sfr TMR4CN = 0xC8; /* TIMER 4 CONTROL */
97 sfr P4 = 0xC8; /* PORT 4 */
98 sfr TMR2CF = 0xC9; /* TIMER 2 CONFIGURATION */
99 sfr TMR3CF = 0xC9; /* TIMER 3 CONFIGURATION */
100 sfr TMR4CF = 0xC9; /* TIMER 4 CONFIGURATION */
101 sfr RCAP2L = 0xCA; /* TIMER 2 CAPTURE REGISTER - LOW BYTE */
102 sfr RCAP3L = 0xCA; /* TIMER 3 CAPTURE REGISTER - LOW BYTE */
103 sfr RCAP4L = 0xCA; /* TIMER 4 CAPTURE REGISTER - LOW BYTE */
104 sfr RCAP2H = 0xCB; /* TIMER 2 CAPTURE REGISTER - HIGH BYTE */
105 sfr RCAP3H = 0xCB; /* TIMER 3 CAPTURE REGISTER - HIGH BYTE */
106 sfr RCAP4H = 0xCB; /* TIMER 4 CAPTURE REGISTER - HIGH BYTE */
107 sfr TMR2L = 0xCC; /* TIMER 2 - LOW BYTE */
108 sfr TMR3L = 0xCC; /* TIMER 3 - LOW BYTE */
109 sfr TMR4L = 0xCC; /* TIMER 4 - LOW BYTE */
110 sfr TMR2H = 0xCD; /* TIMER 2 - HIGH BYTE */
111 sfr TMR3H = 0xCD; /* TIMER 3 - HIGH BYTE */
112 sfr TMR4H = 0xCD; /* TIMER 4 - HIGH BYTE */
113 sfr SMB0CR = 0xCF; /* SMBUS 0 CLOCK RATE */
114 sfr PSW = 0xD0; /* PROGRAM STATUS WORD */
115 sfr REF0CN = 0xD1; /* VOLTAGE REFERENCE 0 CONTROL */
116 sfr DAC0L = 0xD2; /* DAC 0 REGISTER - LOW BYTE */
117 sfr DAC1L = 0xD2; /* DAC 1 REGISTER - LOW BYTE */
C51 COMPILER V6.23a C8051F040 12/14/2004 13:09:06 PAGE 3
118 sfr DAC0H = 0xD3; /* DAC 0 REGISTER - HIGH BYTE */
119 sfr DAC1H = 0xD3; /* DAC 1 REGISTER - HIGH BYTE */
120 sfr DAC0CN = 0xD4; /* DAC 0 CONTROL */
121 sfr DAC1CN = 0xD4; /* DAC 1 CONTROL */
122 sfr HVA0CN = 0xD6; /* HVDA CONTROL REGISTER */
123 sfr PCA0CN = 0xD8; /* PCA 0 COUNTER CONTROL */
124 sfr CAN0DATL = 0xD8; /* CAN 0 DATA - LOW BYTE */
125 sfr P5 = 0xD8; /* PORT 5 */
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