tlc5615_asm.lst

基于tlc5615芯片的DAC源码

A51 MACRO ASSEMBLER  TLC5615_ASM                                                          02/08/2007 18:50:20 PAGE     1


MACRO ASSEMBLER A51 V7.10
OBJECT MODULE PLACED IN tlc5615_asm.OBJ
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE tlc5615_asm.asm SET(SMALL) DEBUG EP

LOC  OBJ            LINE     SOURCE

                       1     ;*********************************************
                       2     ; example program for 51 download board
                       3     ;  @11.0592MHz
                       4     ; test TLC5615
                       5     ; www.mcufan.com
                       6     ;*********************************************/
  0091                 7             SCLK  BIT p1.1                  ; modem control signals
  0092                 8             CS   BIT p1.2                   ;
  00A0                 9             DIN BIT p2.0 
                      10     
                      11     
0000                  12             ORG 0h
                      13             
0000 0200A0           14             LJMP main       
00A0                  15                 ORG     00A0H
00A0 78FF             16     main:   mov r0,#255
00A2 79FF             17             mov r1,#255
00A4 1200A9           18             lcall dac
00A7 01A0             19                 ajmp main
                      20                 
00A9 C291             21     dac:    CLR SCLK        ;SCLK=0;                /*INITIAL*/
00AB 1200E3           22             LCALL DELAY     ;delay(5);
00AE C2A0             23             CLR DIN ;DIN=0;
00B0 1200E3           24             LCALL DELAY     ;delay(5);
00B3 D292             25             SETB CS ;CS=1;
00B5 1200E3           26             LCALL DELAY     ;delay(5);
00B8 C292             27             CLR CS  ;CS=0;
00BA E9               28             MOV A,R1
00BB 33               29             RLC A
00BC 33               30             RLC A
00BD 33               31             RLC A
00BE 33               32             RLC A
00BF 33               33             RLC A
00C0 7D02             34             MOV R5,#2
00C2 33               35     LOOP1:  RLC A
00C3 92A0             36             MOV DIN,C
00C5 D291             37             SETB SCLK       ;SCLK=1;        
00C7 1200E3           38             LCALL DELAY     ;delay(5);
00CA C291             39             CLR SCLK        ;SCLK=0;
00CC DDF4             40             DJNZ r5,loop1
00CE E8               41             MOV A,R0
00CF 7D0A             42             MOV R5,#10
00D1 33               43     LOOP2:  RLC A
00D2 92A0             44             MOV DIN,C
00D4 D291             45             SETB SCLK       ;SCLK=1;        
00D6 1200E3           46             LCALL DELAY     ;delay(5);
00D9 C291             47             CLR SCLK        ;SCLK=0;
00DB DDF4             48             DJNZ r5,loop2
00DD 1200E3           49             LCALL DELAY     ;delay(5);
00E0 D292             50             SETB CS ;CS=1;          
00E2 22               51             RET
                      52     
00E3 7B0A             53     delay:  mov r3,#10
00E5 DBFE             54             DJNZ    r3,$
00E7 22               55             ret
                      56             end             
A51 MACRO ASSEMBLER  TLC5615_ASM                                                          02/08/2007 18:50:20 PAGE     2

SYMBOL TABLE LISTING
------ ----- -------


N A M E             T Y P E  V A L U E   ATTRIBUTES

CS . . . . . . . .  B ADDR   0090H.2 A   
DAC. . . . . . . .  C ADDR   00A9H   A   
DELAY. . . . . . .  C ADDR   00E3H   A   
DIN. . . . . . . .  B ADDR   00A0H.0 A   
LOOP1. . . . . . .  C ADDR   00C2H   A   
LOOP2. . . . . . .  C ADDR   00D1H   A   
MAIN . . . . . . .  C ADDR   00A0H   A   
P1 . . . . . . . .  D ADDR   0090H   A   
P2 . . . . . . . .  D ADDR   00A0H   A   
SCLK . . . . . . .  B ADDR   0090H.1 A   


REGISTER BANK(S) USED: 0 


ASSEMBLY COMPLETE.  0 WARNING(S), 0 ERROR(S)