sfr80144.h

一款收款机C源代码！因为是几年前的代码了

#pragma ADDRESS     ad3_addr    0386H       /* A-D register 3 */
#pragma ADDRESS     ad4_addr    0388H       /* A-D register 4 */
#pragma ADDRESS     ad5_addr    038aH       /* A-D register 5 */
#pragma ADDRESS     ad6_addr    038cH       /* A-D register 6 */
#pragma ADDRESS     ad7_addr    038eH       /* A-D register 7 */
#pragma ADDRESS     adcon2_addr 0394H       /* A-D control register 2 */
#pragma ADDRESS     adcon0_addr 0396H       /* A-D control register 0 */
#pragma ADDRESS     adcon1_addr 0397H       /* A-D control register 1 */
#pragma ADDRESS     da0_addr    0398H       /* D-A register 0 */
#pragma ADDRESS     da1_addr    039aH       /* D-A register 1 */
#pragma ADDRESS     dacon_addr  039cH       /* D-A control register */
#pragma ADDRESS     psc_addr    03afH       /* Function select register C */
#pragma ADDRESS     ps0_addr    03b0H       /* Function select register A0 */
#pragma ADDRESS     ps1_addr    03b1H       /* Function select register A1 */
#pragma ADDRESS     psl0_addr   03b2H       /* Function select register B0 */
#pragma ADDRESS     psl1_addr   03b3H       /* Function select register B1 */
#pragma ADDRESS     ps2_addr    03b4H       /* Function select register A2 */
#pragma ADDRESS     ps3_addr    03b5H       /* Function select register A3 */
#pragma ADDRESS     psl2_addr   03b6H       /* Function select register B2 */
#pragma ADDRESS     psl3_addr   03b7H       /* Function select register B3 */
#pragma ADDRESS     p6_addr     03c0H       /* Port P6 register */
#pragma ADDRESS     p7_addr     03c1H       /* Port P7 register */
#pragma ADDRESS     pd6_addr    03c2H       /* Port P6 direction register */
#pragma ADDRESS     pd7_addr    03c3H       /* Port P7 direction register */
#pragma ADDRESS     p8_addr     03c4H       /* Port P8 register */
#pragma ADDRESS     p9_addr     03c5H       /* Port P9 register */
#pragma ADDRESS     pd8_addr    03c6H       /* Port P8 direction register */
#pragma ADDRESS     pd9_addr    03c7H       /* Port P9 direction register */
#pragma ADDRESS     p10_addr    03c8H       /* Port P10 register */
#pragma ADDRESS     p11_addr    03c9H       /* Port P11 register */
#pragma ADDRESS     pd10_addr   03caH       /* Port P10 direction register */
#pragma ADDRESS     pd11_addr   03cbH       /* Port P11 direction register */
#pragma ADDRESS     p12_addr    03ccH       /* Port P12 register */
#pragma ADDRESS     p13_addr    03cdH       /* Port P13 register */
#pragma ADDRESS     pd12_addr   03ceH       /* Port P12 direction register */
#pragma ADDRESS     pd13_addr   03cfH       /* Port P13 direction register */
#pragma ADDRESS     p14_addr    03d0H       /* Port P14 register */
#pragma ADDRESS     p15_addr    03d1H       /* Port P15 register */
#pragma ADDRESS     pd14_addr   03d2H       /* Port P14 direction register */
#pragma ADDRESS     pd15_addr   03d3H       /* Port P15 direction register */
#pragma ADDRESS     pur2_addr   03daH       /* Pull-up control register 2 */
#pragma ADDRESS     pur3_addr   03dbH       /* Pull-up control register 3 */
#pragma ADDRESS     pur4_addr   03dcH       /* Pull-up control register 4 */
#pragma ADDRESS     p0_addr     03e0H       /* Port P0 register */
#pragma ADDRESS     p1_addr     03e1H       /* Port P1 register */
#pragma ADDRESS     pd0_addr    03e2H       /* Port P0 direction register */
#pragma ADDRESS     pd1_addr    03e3H       /* Port P1 direction register */
#pragma ADDRESS     p2_addr     03e4H       /* Port P2 register */
#pragma ADDRESS     p3_addr     03e5H       /* Port P3 register */
#pragma ADDRESS     pd2_addr    03e6H       /* Port P2 direction register */
#pragma ADDRESS     pd3_addr    03e7H       /* Port P3 direction register */
#pragma ADDRESS     p4_addr     03e8H       /* Port P4 register */
#pragma ADDRESS     p5_addr     03e9H       /* Port P5 register */
#pragma ADDRESS     pd4_addr    03eaH       /* Port P4 direction register */
#pragma ADDRESS     pd5_addr    03ebH       /* Port P5 direction register */
#pragma ADDRESS     pur0_addr   03f0H       /* Pull-up control register 0 */
#pragma ADDRESS     pur1_addr   03f1H       /* Pull-up control register 1 */
#pragma ADDRESS     pcr_addr    03ffH       /* Port control register */
/********************************************************
*   declare  SFR char                                   *
********************************************************/
unsigned char   da0_addr;               /* D-A register 0 */
#define     da0     da0_addr

unsigned char   da1_addr;               /* D-A register 1 */
#define     da1     da1_addr

unsigned char   udf_addr;               /* Up/down flag */ /* modify 2000.06.30 ; Use "MOV" instruction when writing to this register. */
#define     udf     udf_addr

/********************************************************
*   declare  SFR short                                  *
********************************************************/
/*---------------------------------------------------------------------
    Timer registers ; Read and write to this register in 16-bit units.
-----------------------------------------------------------------------*/
unsigned short   ta11_addr;             /* Timer A1-1 register */ /* modify 2000.06.30 */
#define     ta11     ta11_addr

unsigned short   ta21_addr;             /* Timer A2-1 register */ /* modify 2000.06.30 */
#define     ta21     ta21_addr

unsigned short   ta41_addr;             /* Timer A4-1 register */ /* modify 2000.06.30 */
#define     ta41     ta41_addr

unsigned short   tb3_addr;              /* Timer B3 register */ /* modify 2000.06.30 */
#define     tb3     tb3_addr

unsigned short   tb4_addr;              /* Timer B4 register */ /* modify 2000.06.30 */
#define     tb4     tb4_addr

unsigned short   tb5_addr;              /* Timer B5 register */ /* modify 2000.06.30 */
#define     tb5     tb5_addr

unsigned short   ta0_addr;              /* Timer A0 register */ /* modify 2000.06.30 */
#define     ta0     ta0_addr

unsigned short   ta1_addr;              /* Timer A1 register */ /* modify 2000.06.30 */
#define     ta1     ta1_addr

unsigned short   ta2_addr;              /* Timer A2 register */ /* modify 2000.06.30 */
#define     ta2     ta2_addr

unsigned short   ta3_addr;              /* Timer A3 register */ /* modify 2000.06.30 */
#define     ta3     ta3_addr

unsigned short   ta4_addr;              /* Timer A4 register */ /* modify 2000.06.30 */
#define     ta4     ta4_addr

unsigned short   tb0_addr;              /* Timer B0 register */ /* modify 2000.06.30 */
#define     tb0     tb0_addr

unsigned short   tb1_addr;              /* Timer B1 register */ /* modify 2000.06.30 */
#define     tb1     tb1_addr

unsigned short   tb2_addr;              /* Timer B2 register */ /* modify 2000.06.30 */
#define     tb2     tb2_addr

/********************************************************
*   declare SFR bit                                     *
********************************************************/
struct bit_def {
        char    b0:1;
        char    b1:1;
        char    b2:1;
        char    b3:1;
        char    b4:1;
        char    b5:1;
        char    b6:1;
        char    b7:1;
};
union byte_def{
    struct bit_def bit;
    char    byte;
};

/*------------------------------------------------------
    DRAM control register
------------------------------------------------------*/
union byte_def dramcont_addr;
#define     dramcont        dramcont_addr.byte

#define     wt      dramcont_addr.bit.b0
#define     ar0     dramcont_addr.bit.b1
#define     ar1     dramcont_addr.bit.b2
#define     ar2     dramcont_addr.bit.b3
#define     sref    dramcont_addr.bit.b7

/*------------------------------------------------------
    DRAM refresh interval set register
------------------------------------------------------*/
union byte_def refcnt_addr;
#define     refcnt      refcnt_addr.byte

#define     refcnt0     refcnt_addr.bit.b0
#define     refcnt1     refcnt_addr.bit.b1
#define     refcnt2     refcnt_addr.bit.b2
#define     refcnt3     refcnt_addr.bit.b3
#define     refcnt4     refcnt_addr.bit.b4
#define     refcnt5     refcnt_addr.bit.b5
#define     refcnt6     refcnt_addr.bit.b6
#define     refcnt7     refcnt_addr.bit.b7

/*------------------------------------------------------
    Processor mode register 0
------------------------------------------------------*/
union byte_def pm0_addr;
#define     pm0     pm0_addr.byte

#define     pm00        pm0_addr.bit.b0     /* Processor mode bit */
#define     pm01        pm0_addr.bit.b1     /* Processor mode bit */
#define     pm02        pm0_addr.bit.b2     /* R/W mode select bit */
#define     pm03        pm0_addr.bit.b3     /* Software reset bit */
#define     pm04        pm0_addr.bit.b4     /* Multiplexed bus space select bit */
#define     pm05        pm0_addr.bit.b5     /* Multiplexed bus space select bit */
// #define     pm06        pm0_addr.bit.b6     /* Reserved bit */ /* remove 2000.06.30 */
#define     pm07        pm0_addr.bit.b7     /* BCLK output function select bit */

/*------------------------------------------------------
    Processor mode register 1
------------------------------------------------------*/
union byte_def pm1_addr;
#define     pm1     pm1_addr.byte

#define     pm10        pm1_addr.bit.b0     /* External memory area mode bit */
#define     pm11        pm1_addr.bit.b1     /* External memory area mode bit */
#define     pm12        pm1_addr.bit.b2     /* Internal memory Wait bit */
#define     pm14        pm1_addr.bit.b4     /* ALE pin select bit */
#define     pm15        pm1_addr.bit.b5     /* ALE pin select bit */

/*------------------------------------------------------
    System clock control register 0
------------------------------------------------------*/
union byte_def cm0_addr;
#define     cm0     cm0_addr.byte

#define     cm00        cm0_addr.bit.b0     /* Clock output function select bit */
#define     cm01        cm0_addr.bit.b1     /* Clock output function select bit */
#define     cm02        cm0_addr.bit.b2     /* WAIT peripheral function clock stop bit */
#define     cm03        cm0_addr.bit.b3     /* Xcin-Xcout drive capacity select bit */
#define     cm04        cm0_addr.bit.b4     /* Port Xc select bit */
#define     cm05        cm0_addr.bit.b5     /* Main clock stop bit */
#define     cm06        cm0_addr.bit.b6     /* WDT function select bit */
#define     cm07        cm0_addr.bit.b7     /* System clock select bit */

/*------------------------------------------------------
    System clock control register 1
------------------------------------------------------*/
union byte_def cm1_addr;
#define     cm1     cm1_addr.byte

#define     cm10        cm1_addr.bit.b0     /* All clock stop control bit */
#define     cm15        cm1_addr.bit.b5     /* Xin-Xout drive capacity select bit */

/*------------------------------------------------------
    Wait control register
------------------------------------------------------*/
union byte_def wcr_addr;
#define     wcr     wcr_addr.byte

#define     wcr0        wcr_addr.bit.b0
#define     wcr1        wcr_addr.bit.b1
#define     wcr2        wcr_addr.bit.b2
#define     wcr3        wcr_addr.bit.b3
#define     wcr4        wcr_addr.bit.b4
#define     wcr5        wcr_addr.bit.b5
#define     wcr6        wcr_addr.bit.b6
#define     wcr7        wcr_addr.bit.b7

/*------------------------------------------------------
    Address match interrupt enable register
------------------------------------------------------*/
union byte_def aier_addr;
#define     aier        aier_addr.byte

#define     aier0       aier_addr.bit.b0    /* Address match interrupt 0 enable bit */
#define     aier1       aier_addr.bit.b1    /* Address match interrupt 1 enable bit */
#define     aier2       aier_addr.bit.b2    /* Address match interrupt 2 enable bit */  /*99.08.30*/
#define     aier3       aier_addr.bit.b3    /* Address match interrupt 3 enable bit */  /*99.08.30*/

/*------------------------------------------------------