bridge.h

ARM8008光盘linux-kernel

#define BRIDGE_PCI_IO_LIMIT		BRIDGE_PCIIO_XTALK_ALIAS_LIMIT

/*
 * Macros for Bridge bus (PCI/GIO) to Xtalk DMA
 */
/* Bridge Bus DMA addresses */
#define BRIDGE_LOCAL_BASE		0
#define BRIDGE_DMA_MAPPED_BASE		0x40000000
#define BRIDGE_DMA_MAPPED_SIZE		0x40000000	/* 1G Bytes */
#define BRIDGE_DMA_DIRECT_BASE		0x80000000
#define BRIDGE_DMA_DIRECT_SIZE		0x80000000	/* 2G Bytes */

#define PCI32_LOCAL_BASE		BRIDGE_LOCAL_BASE

/* PCI addresses of regions decoded by Bridge for DMA */
#define PCI32_MAPPED_BASE		BRIDGE_DMA_MAPPED_BASE
#define PCI32_DIRECT_BASE		BRIDGE_DMA_DIRECT_BASE

#if	LANGUAGE_C

#define IS_PCI32_LOCAL(x)	((uint64_t)(x) < PCI32_MAPPED_BASE)
#define IS_PCI32_MAPPED(x)	((uint64_t)(x) < PCI32_DIRECT_BASE && \
					(uint64_t)(x) >= PCI32_MAPPED_BASE)
#define IS_PCI32_DIRECT(x)	((uint64_t)(x) >= PCI32_MAPPED_BASE)
#define IS_PCI64(x)		((uint64_t)(x) >= PCI64_BASE)
#endif				/* LANGUAGE_C */

/*
 * The GIO address space.
 */
/* Xtalk to GIO PIO */
#define BRIDGE_GIO_MEM32_BASE		BRIDGE_PIO32_XTALK_ALIAS_BASE
#define BRIDGE_GIO_MEM32_LIMIT		BRIDGE_PIO32_XTALK_ALIAS_LIMIT

#define GIO_LOCAL_BASE			BRIDGE_LOCAL_BASE

/* GIO addresses of regions decoded by Bridge for DMA */
#define GIO_MAPPED_BASE			BRIDGE_DMA_MAPPED_BASE
#define GIO_DIRECT_BASE			BRIDGE_DMA_DIRECT_BASE

#if	LANGUAGE_C

#define IS_GIO_LOCAL(x)		((uint64_t)(x) < GIO_MAPPED_BASE)
#define IS_GIO_MAPPED(x)	((uint64_t)(x) < GIO_DIRECT_BASE && \
					(uint64_t)(x) >= GIO_MAPPED_BASE)
#define IS_GIO_DIRECT(x)	((uint64_t)(x) >= GIO_MAPPED_BASE)
#endif				/* LANGUAGE_C */

/* PCI to xtalk mapping */

/* given a DIR_OFF value and a pci/gio 32 bits direct address, determine
 * which xtalk address is accessed
 */
#define BRIDGE_DIRECT_32_SEG_SIZE	BRIDGE_DMA_DIRECT_SIZE
#define BRIDGE_DIRECT_32_TO_XTALK(dir_off,adr)		\
	((dir_off) * BRIDGE_DIRECT_32_SEG_SIZE +	\
		((adr) & (BRIDGE_DIRECT_32_SEG_SIZE - 1)) + PHYS_RAMBASE)

/* 64-bit address attribute masks */
#define PCI64_ATTR_TARG_MASK	0xf000000000000000
#define PCI64_ATTR_TARG_SHFT	60
#define PCI64_ATTR_PREF		(1ull << 59)
#define PCI64_ATTR_PREC		(1ull << 58)
#define PCI64_ATTR_VIRTUAL	(1ull << 57)
#define PCI64_ATTR_BAR		(1ull << 56)
#define PCI64_ATTR_SWAP		(1ull << 55)
#define PCI64_ATTR_RMF_MASK	0x00ff000000000000
#define PCI64_ATTR_RMF_SHFT	48

#if LANGUAGE_C
/* Address translation entry for mapped pci32 accesses */
typedef union ate_u {
    uint64_t		    ent;
    struct xb_ate_s {					/* xbridge */
	uint64_t		:16;
	uint64_t		addr:36;
	uint64_t		targ:4;
	uint64_t		reserved:2;
        uint64_t		swap:1;
	uint64_t		barrier:1;
	uint64_t		prefetch:1;
	uint64_t		precise:1;
	uint64_t		coherent:1;
	uint64_t		valid:1;
    } xb_field;
    struct ate_s {					/* bridge */
	uint64_t		rmf:16;
	uint64_t		addr:36;
	uint64_t		targ:4;
	uint64_t		reserved:3;
	uint64_t		barrier:1;
	uint64_t		prefetch:1;
	uint64_t		precise:1;
	uint64_t		coherent:1;
	uint64_t		valid:1;
    } field;
} ate_t;
#endif				/* LANGUAGE_C */

#define ATE_V		(1 << 0)
#define ATE_CO		(1 << 1)
#define ATE_PREC	(1 << 2)
#define ATE_PREF	(1 << 3)
#define ATE_BAR		(1 << 4)
#define ATE_SWAP        (1 << 5)

#define ATE_PFNSHIFT		12
#define ATE_TIDSHIFT		8
#define ATE_RMFSHIFT		48

#define mkate(xaddr, xid, attr) ((xaddr) & 0x0000fffffffff000ULL) | \
				((xid)<<ATE_TIDSHIFT) | \
				(attr)

/*
 * for xbridge, bit 29 of the pci address is the swap bit */
#define ATE_SWAPSHIFT		29
#define ATE_SWAP_ON(x)		((x) |= (1 << ATE_SWAPSHIFT))
#define ATE_SWAP_OFF(x)		((x) &= ~(1 << ATE_SWAPSHIFT))

#define is_xbridge(bridge) \
        (XWIDGET_PART_NUM(bridge->b_wid_id) == XBRIDGE_WIDGET_PART_NUM)

#if	LANGUAGE_C

/* ========================================================================
 */

#ifdef	MACROFIELD_LINE
/*
 * This table forms a relation between the byte offset macros normally
 * used for ASM coding and the calculated byte offsets of the fields
 * in the C structure.
 *
 * See bridge_check.c and bridge_html.c for further details.
 */
#ifndef MACROFIELD_LINE_BITFIELD
#define MACROFIELD_LINE_BITFIELD(m)	/* ignored */
#endif

struct macrofield_s	bridge_macrofield[] =
{

    MACROFIELD_LINE(BRIDGE_WID_ID, b_wid_id)
    MACROFIELD_LINE_BITFIELD(WIDGET_REV_NUM)
    MACROFIELD_LINE_BITFIELD(WIDGET_PART_NUM)
    MACROFIELD_LINE_BITFIELD(WIDGET_MFG_NUM)
    MACROFIELD_LINE(BRIDGE_WID_STAT, b_wid_stat)
    MACROFIELD_LINE_BITFIELD(BRIDGE_STAT_LLP_REC_CNT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_STAT_LLP_TX_CNT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_STAT_FLASH_SELECT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_STAT_PCI_GIO_N)
    MACROFIELD_LINE_BITFIELD(BRIDGE_STAT_PENDING)
    MACROFIELD_LINE(BRIDGE_WID_ERR_UPPER, b_wid_err_upper)
    MACROFIELD_LINE(BRIDGE_WID_ERR_LOWER, b_wid_err_lower)
    MACROFIELD_LINE(BRIDGE_WID_CONTROL, b_wid_control)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_FLASH_WR_EN)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_EN_CLK50)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_EN_CLK40)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_EN_CLK33)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_RST_MASK)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_IO_SWAP)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_MEM_SWAP)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_PAGE_SIZE)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_SS_PAR_BAD)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_SS_PAR_EN)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_SSRAM_SIZE_MASK)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_F_BAD_PKT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_LLP_XBAR_CRD_MASK)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_CLR_RLLP_CNT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_CLR_TLLP_CNT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_SYS_END)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_MAX_TRANS_MASK)
    MACROFIELD_LINE_BITFIELD(BRIDGE_CTRL_WIDGET_ID_MASK)
    MACROFIELD_LINE(BRIDGE_WID_REQ_TIMEOUT, b_wid_req_timeout)
    MACROFIELD_LINE(BRIDGE_WID_INT_UPPER, b_wid_int_upper)
    MACROFIELD_LINE_BITFIELD(WIDGET_INT_VECTOR)
    MACROFIELD_LINE_BITFIELD(WIDGET_TARGET_ID)
    MACROFIELD_LINE_BITFIELD(WIDGET_UPP_ADDR)
    MACROFIELD_LINE(BRIDGE_WID_INT_LOWER, b_wid_int_lower)
    MACROFIELD_LINE(BRIDGE_WID_ERR_CMDWORD, b_wid_err_cmdword)
    MACROFIELD_LINE_BITFIELD(WIDGET_DIDN)
    MACROFIELD_LINE_BITFIELD(WIDGET_SIDN)
    MACROFIELD_LINE_BITFIELD(WIDGET_PACTYP)
    MACROFIELD_LINE_BITFIELD(WIDGET_TNUM)
    MACROFIELD_LINE_BITFIELD(WIDGET_COHERENT)
    MACROFIELD_LINE_BITFIELD(WIDGET_DS)
    MACROFIELD_LINE_BITFIELD(WIDGET_GBR)
    MACROFIELD_LINE_BITFIELD(WIDGET_VBPM)
    MACROFIELD_LINE_BITFIELD(WIDGET_ERROR)
    MACROFIELD_LINE_BITFIELD(WIDGET_BARRIER)
    MACROFIELD_LINE(BRIDGE_WID_LLP, b_wid_llp)
    MACROFIELD_LINE_BITFIELD(WIDGET_LLP_MAXRETRY)
    MACROFIELD_LINE_BITFIELD(WIDGET_LLP_NULLTIMEOUT)
    MACROFIELD_LINE_BITFIELD(WIDGET_LLP_MAXBURST)
    MACROFIELD_LINE(BRIDGE_WID_TFLUSH, b_wid_tflush)
    MACROFIELD_LINE(BRIDGE_WID_AUX_ERR, b_wid_aux_err)
    MACROFIELD_LINE(BRIDGE_WID_RESP_UPPER, b_wid_resp_upper)
    MACROFIELD_LINE(BRIDGE_WID_RESP_LOWER, b_wid_resp_lower)
    MACROFIELD_LINE(BRIDGE_WID_TST_PIN_CTRL, b_wid_tst_pin_ctrl)
    MACROFIELD_LINE(BRIDGE_DIR_MAP, b_dir_map)
    MACROFIELD_LINE_BITFIELD(BRIDGE_DIRMAP_W_ID)
    MACROFIELD_LINE_BITFIELD(BRIDGE_DIRMAP_RMF_64)
    MACROFIELD_LINE_BITFIELD(BRIDGE_DIRMAP_ADD512)
    MACROFIELD_LINE_BITFIELD(BRIDGE_DIRMAP_OFF)
    MACROFIELD_LINE(BRIDGE_RAM_PERR, b_ram_perr)
    MACROFIELD_LINE(BRIDGE_ARB, b_arb)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_REQ_WAIT_TICK_MASK)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_REQ_WAIT_EN_MASK)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_FREEZE_GNT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_HPRI_RING_B2)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_HPRI_RING_B1)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_HPRI_RING_B0)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_LPRI_RING_B2)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_LPRI_RING_B1)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ARB_LPRI_RING_B0)
    MACROFIELD_LINE(BRIDGE_NIC, b_nic)
    MACROFIELD_LINE(BRIDGE_PCI_BUS_TIMEOUT, b_pci_bus_timeout)
    MACROFIELD_LINE(BRIDGE_PCI_CFG, b_pci_cfg)
    MACROFIELD_LINE(BRIDGE_PCI_ERR_UPPER, b_pci_err_upper)
    MACROFIELD_LINE(BRIDGE_PCI_ERR_LOWER, b_pci_err_lower)
    MACROFIELD_LINE(BRIDGE_INT_STATUS, b_int_status)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_MULTI_ERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PMU_ESIZE_FAULT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_UNEXP_RESP)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_BAD_XRESP_PKT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_BAD_XREQ_PKT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_RESP_XTLK_ERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_REQ_XTLK_ERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_INVLD_ADDR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_UNSUPPORTED_XOP)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_XREQ_FIFO_OFLOW)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_LLP_REC_SNERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_LLP_REC_CBERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_LLP_RCTY)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_LLP_TX_RETRY)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_LLP_TCTY)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_SSRAM_PERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_ABORT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_PARITY)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_SERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_PERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_MST_TIMEOUT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_PCI_RETRY_CNT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_XREAD_REQ_TIMEOUT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_GIO_B_ENBL_ERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_ISR_INT_MSK)
    MACROFIELD_LINE(BRIDGE_INT_ENABLE, b_int_enable)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_UNEXP_RESP)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PMU_ESIZE_FAULT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_BAD_XRESP_PKT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_BAD_XREQ_PKT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_RESP_XTLK_ERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_REQ_XTLK_ERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_INVLD_ADDR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_UNSUPPORTED_XOP)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_XREQ_FIFO_OFLOW)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_LLP_REC_SNERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_LLP_REC_CBERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_LLP_RCTY)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_LLP_TX_RETRY)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_LLP_TCTY)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_SSRAM_PERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_ABORT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_PARITY)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_SERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_PERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_MST_TIMEOUT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_PCI_RETRY_CNT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_XREAD_REQ_TIMEOUT)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_GIO_B_ENBL_ERR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IMR_INT_MSK)
    MACROFIELD_LINE(BRIDGE_INT_RST_STAT, b_int_rst_stat)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_ALL_CLR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_MULTI_CLR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_CRP_GRP_CLR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_RESP_BUF_GRP_CLR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_REQ_DSP_GRP_CLR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_LLP_GRP_CLR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_SSRAM_GRP_CLR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_IRR_PCI_GRP_CLR)
    MACROFIELD_LINE(BRIDGE_INT_MODE, b_int_mode)
    MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(7))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(6))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(5))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(4))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(3))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(2))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(1))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INTMODE_CLR_PKT_EN(0))
    MACROFIELD_LINE(BRIDGE_INT_DEVICE, b_int_device)
    MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(7))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(6))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(5))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(4))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(3))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(2))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(1))
    MACROFIELD_LINE_BITFIELD(BRIDGE_INT_DEV_MASK(0))
    MACROFIELD_LINE(BRIDGE_INT_HOST_ERR, b_int_host_err)
    MACROFIELD_LINE_BITFIELD(BRIDGE_INT_ADDR_HOST)
    MACROFIELD_LINE_BITFIELD(BRIDGE_INT_ADDR_FLD)
    MACROFIELD_LINE(BRIDGE_INT_ADDR0, b_int_addr[0].addr)
    MACROFIELD_LINE(BRIDGE_INT_ADDR(0), b_int_addr[0].addr)
    MACROFIELD_LINE(BRIDGE_INT_ADDR(1), b_int_addr[1].addr)
    MACROFIELD_LINE(BRIDGE_INT_ADDR(2), b_int_addr[2].addr)
    MACROFIELD_LINE(BRIDGE_INT_ADDR(3), b_int_addr[3].addr)
    MACROFIELD_LINE(BRIDGE_INT_ADDR(4), b_int_addr[4].addr)
    MACROFIELD_LINE(BRIDGE_INT_ADDR(5), b_int_addr[5].addr)
    MACROFIELD_LINE(BRIDGE_INT_ADDR(6), b_int_addr[6].addr)
    MACROFIELD_LINE(BRIDGE_INT_ADDR(7), b_int_addr[7].addr)
    MACROFIELD_LINE(BRIDGE_DEVICE0, b_device[0].reg)
    MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_ERR_LOCK_EN)
    MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_PAGE_CHK_DIS)
    MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_FORCE_PCI_PAR)
    MACROFIELD_LINE_BITFIELD(BRIDGE_DEV_VI