sys_event.h

基于ADI 公司的blackfin芯片的通用中断框架程序

#ifndef	SYSTEM_INTERRUPT_EVENT

#define SYSTEM_INTERRUPT_EVENT


#include "..\common\common.h"


// event id

#define PLL_INT			0x1UL

#define DMAERR_INT		0x2UL

#define IPORTERR_INT	0x4UL

#define RTC_INT			0x8UL

#define DMA0_INT		0x10UL

#define DMA3_INT		0x20UL

#define DMA4_INT		0x40UL

#define DMA5_INT		0x80UL

#define DMA6_INT		0x100UL

#define TWI_INT			0x200UL

#define DMA7_INT		0x400UL

#define DMA8_INT		0x800UL

#define DMA9_INT		0x1000UL

#define DMA10_INT		0x2000UL

#define DMA11_INT		0x4000UL

#define CANRx_INT		0x8000UL

#define CANTx_INT		0x10000UL

#define DMA1_INT		0x20000UL
#define PORTH_A_INT		0x20000UL

#define DMA2_INT		0x40000UL
#define PORTH_B_INT		0x40000UL

#define TMR0_INT		0x80000UL

#define TMR1_INT		0x100000UL

#define TMR2_INT		0x200000UL

#define TMR3_INT		0x400000UL

#define TMR4_INT		0x800000UL

#define TMR5_INT		0x1000000UL

#define TMR6_INT		0x2000000UL

#define TMR7_INT		0x4000000UL

#define PORTFG_A_INT	0x8000000UL

#define PORTG_B_INT		0x10000000UL

#define MDMA0_INT		0x20000000UL

#define MDMA1_INT		0x40000000UL

#define WTDTMR_INT		0x80000000UL
#define PORTF_B_INT		0x80000000UL


// event location in sys_callback table

#define POS_PLL_INT			0

#define POS_DMAERR_INT		1

#define POS_IPORTERR_INT	2

#define POS_RTC_INT			3

#define POS_DMA0_INT		4

#define POS_DMA3_INT		5

#define POS_DMA4_INT		6

#define POS_DMA5_INT		7

#define POS_DMA6_INT		8

#define POS_TWI_INT			9

#define POS_DMA7_INT		10

#define POS_DMA8_INT		11

#define POS_DMA9_INT		12

#define POS_DMA10_INT		13

#define POS_DMA11_INT		14

#define POS_CANRx_INT		15

#define POS_CANTx_INT		16

#define POS_DMA1_INT		17
#define POS_PORTH_A_INT		17

#define POS_DMA2_INT		18
#define POS_PORTH_B_INT		18

#define POS_TMR0_INT		19

#define POS_TMR1_INT		20

#define POS_TMR2_INT		21

#define POS_TMR3_INT		22

#define POS_TMR4_INT		23

#define POS_TMR5_INT		24

#define POS_TMR6_INT		25

#define POS_TMR7_INT		26

#define POS_PORTFG_A_INT	27

#define POS_PORTG_B_INT		28

#define POS_MDMA0_INT		29

#define POS_MDMA1_INT		30

#define POS_WTDTMR_INT		31
#define POS_PORTF_B_INT		31




// GPIO resgisters

//! Port Multiplexer Control Register
#define PORT_MUX		*(volatile unsigned short*)0xffc0320c

//! Function Enable Registers
#define PORTF_FER		*(volatile unsigned short*)0xffc03200

//! GPIO Direction Registers
#define PORTFIO_DIR		*(volatile unsigned short*)0xffc00730

//! GPIO Input Enable Registers
#define PORTFIO_INEN	*(volatile unsigned short*)0xffc00740

//! GPIO Data Registers
#define PORTFIO			*(volatile unsigned short*)0xffc00700

//! GPIO Set Registers
#define PORTFIO_SET		*(volatile unsigned short*)0xffc00708

//! GPIO Clear Register
#define PORTFIO_CLEAR	*(volatile unsigned short*)0xffc00704

//! GPIO Toggle Register
#define PORTFIO_TOGGLE	*(volatile unsigned short*)0xffc0070c

//! Interrupt Sensitivity Registers
#define PORTFIO_EDGE	*(volatile unsigned short*)0xffc00738

//! GPIO Mask Interrupt A Registers
#define PORTFIO_MASKA	*(volatile unsigned short*)0xffc00710

//! GPIO Mask Interrupt B Registers
#define PORTFIO_MASKB	*(volatile unsigned short*)0xffc00720

//! GPIO Mask Interrupt A Set Registers
#define PORTFIO_MASKA_SET	*(volatile unsigned short*)0xffc00718

//! GPIO Mask Interrupt B Set Registers
#define PORTFIO_MASKB_SET	*(volatile unsigned short*)0xffc00728

//! GPIO Mask Interrupt A Clear Registers
#define PORTFIO_MASKA_CLEAR	*(volatile unsigned short*)0xffc00714

//! GPIO Mask Interrupt B Clear Registers
#define PORTFIO_MASKB_CLEAR	*(volatile unsigned short*)0xffc00724

//! GPIO Mask Interrupt A Toggle Registers
#define PORTFIO_MASKA_TOGGLE	*(volatile unsigned short*)0xffc0071c

//! GPIO Mask Interrupt B Toggle Registers
#define PORTFIO_MASKB_TOGGLE	*(volatile unsigned short*)0xffc0072c



//! Enable System Interrupt
EXTERN void set_sys_mask(unsigned event_id);


//! Disable System Interrupt
EXTERN void clear_sys_mask(unsigned event_id);


#endif