📄 mstar.c
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// <Parameter>: - <Flow> - <Description>
//-----------------------------------------------------------------------------
// IntSel - In - interrupt setting
///////////////////////////////////////////////////////////////////////////////
void msSetInterrupt(msInterruptType IntSel)
{
BYTE ucBank;
ucBank = msReadByte( BK0_00_REGBK);
msWriteByte(BK0_00_REGBK,REG_BANK_SCALER);
msWriteByte(BK0_1D_INTENC, 0x00); // Interrupt enable control byte C
msWriteByte(BK0_1F_INTEND, 0x00); // Interrupt enable control byte D
switch( IntSel )
{
case INTERRUPT_PC:
msWriteByte(BK0_1F_INTEND, 0x0E); // V change,H loss,V loss
break;
case INTERRUPT_YPBPR:
msWriteByte(BK0_1F_INTEND, 0x06); // H loss,V loss
break;
case INTERRUPT_INPUT_VSYNC:
msWriteByte(BK0_1D_INTENC, 0x40); // H loss,V loss
break;
default:
break;
}
msWriteByte(BK0_00_REGBK, ucBank);
}
void ChipPowerUpcontrol(void)
{
BYTE vbk0_e0,vbk0_e1,vbk1_31,vbk1_32,ucBank;
ucBank=msReadByte(BK0_00_REGBK);
if( IsCVBSInUse())
{
vbk0_e0=0x80;
vbk0_e1=0x1C;
vbk1_31=0x24;
vbk1_32=0x76;
}
else if(IsSVideoInUse())
{
vbk0_e0=0x90;
vbk0_e1=0x18;
vbk1_31=0x20;
vbk1_32=0x34;
}
#if VGA_ENABLE
else if(IsVGAInUse())
{
vbk0_e0=0xb0;
vbk0_e1=0x11;
vbk1_31=0x00;
vbk1_32=0x04;
}
#endif
msWriteByte(BK0_00_REGBK, REG_BANK_SCALER); // switch to Bank 1
msWriteByte(BK0_E0_PDMD0, vbk0_e0);
msWriteByte(BK0_E1_PDMD1, vbk0_e1);
Delay1ms(5);//(50);
msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU); // switch to Bank 1
msWriteByte(BK1_31, vbk1_31);
msWriteByte(BK1_32, vbk1_32);
msWriteByte(BK0_00_REGBK, ucBank);
}
void msSetupInputPort(void)
{
SwitchInputPort(g_VideoSetting.InputType);
ChipPowerUpcontrol();
#if VGA_ENABLE
if( IsVGAInUse()) // PC
{
msWriteByte(BK0_0D_LYL, 0x00);
msWriteByte(BK0_16_INTCTROL, 0x00); // 060815 by jony for VGA
msAdjustPCRGB(0x80, 0x80, 0x80);
msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU );
msWriteByte( BK1_24, 0x50 );
msWriteByte( BK1_25, 0 ); // FPLL_DIVN => Divide by 1
msWriteByte( BK1_29, 0x18 ); // 20051007
msWriteByte( BK1_2C, 0x00 ); // I clamp
msWriteByte( BK0_00_REGBK, REG_BANK_SCALER);
//msWriteByte( BK0_37, 0 ); // 20051004 Lizst: Disable D-Edge
msWriteByte( BK0_83_DELTA_L, 0 );
msWriteByte( BK0_84_DELTA_H, 0 );
//should turn off in VGA mode,we don't support YPBPR here
//msLPFCtl(LPF_CTL_ANALOG_PORT);
msLPFCtl(LPF_CTL_TURN_OFF);
msWriteRegsTbl(tProgVGAPort); // program VGA port
}
else // CVBS/SV/CCIR656
#endif
{
msWriteByte(BK0_0D_LYL, 0x03);
#if (ENABLE_DDC2BI)
msWriteByte(BK0_16_INTCTROL, 0x01); // 060815 by jony for DDC2BI
#endif
msWriteByte(BK0_10_COCTRL1,COCTRL1_VALUE);
#if (ENABLE_SECAM)
msWriteByte(BK0_00_REGBK, REG_BANK2_VD); //junjian 061205 for SECAM to NTSC
msWriteByte(BK2_19_MVDET_EN, 0xC0);
msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
#endif
if( IsVideoPortInUse())
{
//msWriteByte( BK0_00_REGBK, REG_BANK3_COMB );
//msWriteBit( BK3_11_COMBCFGB, 1, _BIT5 ); // Patch IC
msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU );
msWriteByte( BK1_24, 0x40 );
msWriteByte( BK1_25, 0x01 ); // FPLL_DIVN => Divide by 2
msWriteByte( BK1_29, 0x1F ); // 20051007
msWriteByte( BK1_2C, 0xF0 ); // 20050624 David.Shen: I clamp
// Reset ADC register for internal VD
msWriteByte( BK1_04_RGAIN_ADC, 0x80);
msWriteByte( BK1_05_GGAIN_ADC, 0x80);
msWriteByte( BK1_06_BGAIN_ADC, 0x80);
msWriteByte( BK1_07_ROFFS_ADC, 0x80);
msWriteByte( BK1_08_GOFFS_ADC, 0x80);
msWriteByte( BK1_09_BOFFS_ADC, 0x80);
msWriteByte( BK1_18_CALEN, 0);
//if( g_ucmsVDCtl&MSVD_CTL_FLAG_NOISE_HANDLER )
msVDNoiseHandlerReset();
if( IsCVBSInUse())
{
msWriteRegsTbl(tProgMsAvPort); // program CVBS port
msWriteByte(BK0_00_REGBK, REG_BANK2_VD);
msWriteByteMask(BK2_1A_SVD_EN, 0x00, 0xC0); // Disable SV
msWriteBit(BK2_1F, 0, _BIT7); // Disable clamp C
msWriteByte(BK2_7F,0x63);
msWriteByte(BK0_00_REGBK, REG_BANK3_COMB);
msWriteBit(BK3_10_COMBCFGA, 0, _BIT7); // Enable comb filter
msWriteBit(BK3_A1_SCM_IDSET1, 0, _BIT3); // Disable Secam-SV
}
else if( IsSVideoInUse())
{
msWriteRegsTbl(tProgMsSvPort); // program SV port
msWriteByte(BK0_00_REGBK, REG_BANK2_VD);
msWriteByteMask(BK2_1A_SVD_EN, 0xC0, 0xC0); // Enable SV
msWriteBit(BK2_1F, 1, _BIT7); // Enable clamp C
#if PANEL_DIGITAL_TCON
msWriteByte(BK2_7F,0x63);
#else
msWriteByte(BK2_7F,0x62);
#endif
msWriteByte(BK0_00_REGBK, REG_BANK3_COMB);
msWriteBit(BK3_10_COMBCFGA, 1, _BIT7); // Bypass comb
msWriteBit(BK3_A1_SCM_IDSET1, 1, _BIT3); // Disable Secam-SV
}
msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
msVDCombLineBufferCtl( MSVD_COMB_LINE_BUFFER_CTL_HW_AUTO );
#if TV_ENABLE
if( IsTVInUse() )
{
hw_SetTunerOn();
msWriteByte(BK0_00_REGBK, REG_BANK2_VD);
msWriteBit( BK2_38_VSTROBE_LIMIT, 1,_BIT7);
#if(!ENABLE_VCR_HANDLER)
msWriteByteMask(BK2_6A_VCR_DETECT1, 0x80, 0xC0); // 20051128.Eric.Lin: Force non-VCR mode
#endif
msWriteByte(BK0_00_REGBK, REG_BANK3_COMB);
msWriteByte( BK3_63_REG_CTST, 0x80);
msWriteByte( BK3_64_REG_BRHT, 0x80);
//msWriteByte( BK3_2F, 0x00 ); // IF_COEF for tuner input
msWriteByte(BK3_24_TH2DHOR, 0x0A); // C-Trap disable: For PAL-DEM
msWriteByteMask(BK3_21_COMB2DCFGB, 0x00, 0x08); //
}
else
#endif
{
hw_SetTunerOff();
msWriteByte(BK0_00_REGBK, REG_BANK2_VD);
msWriteBit( BK2_38_VSTROBE_LIMIT, 0,_BIT7);
#if(!ENABLE_VCR_HANDLER)
msWriteByteMask(BK2_6A_VCR_DETECT1, 0x40, 0xC0); // 20051128.Eric.Lin: Auto VCR mode
#endif
msWriteByte(BK0_00_REGBK, REG_BANK3_COMB);
msWriteByte( BK3_63_REG_CTST, INIT_MSVD_COMB_CONTRAST);
msWriteByte( BK3_64_REG_BRHT, INIT_MSVD_COMB_BRIGHTNESS);
//msWriteByte( BK3_2F, 0x00 );
msWriteByte(BK3_24_TH2DHOR, 0x20); // C-Trap disable: For PAL-DEM
msWriteByteMask(BK3_21_COMB2DCFGB, 0x08, 0x08); //
}
msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
}
}
msLineBufferDelayCtl( 0 ); // For Change source
/*
if(!IsVGAInUse())
msFieldDetectCtl();
#if SOG_ENABLE
msFieldDetectCtl();
#endif
*/
msFieldDetectCtl();
if( IsVideoPortInUse())
{
#if(ENABLE_VD_DSP)
//g_ucmsVDCtl |= MSVD_CTL_FLAG_VSYNC;
#endif
msVDReset(); // When change source
}
else
{
#if(ENABLE_VD_DSP)
//g_ucmsVDCtl &= (~MSVD_CTL_FLAG_VSYNC);
VD_DSP_Ctl( _DISABLE, 525 ); // Disable DSP
#endif
//if( g_ucmsVDCtl2&MSVD_CTL2_FLAG_AGC_PROCESSOR )
VD_AGC_Ctl( 0 ); // Disable SW AGC
}
msSetUserPref();
msWriteByte( BK0_00_REGBK, REG_BANK_SCALER);
}
//*******************************************************************
// Function Name: msPowerUp
//
// Decscription: Power on chip from power down mode
//
// callee: msWriteByte() in ms_rwreg.c
//
// caller: Power_PowerOnSystem() in power.c
//*******************************************************************
void msPowerUp(void)
{
msWriteByte(BK0_21_PLLCTRL2, 0); // power on master & output PLL
msWriteByte(BK0_E2_SWRST0, OP2R_B|ADCR_B); // reset graphic port RO register
msWriteByte(BK0_E2_SWRST0, 0);
ChipPowerUpcontrol();
Delay1ms(5);//(50);
msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU); // switch to Bank 1
#if PANEL_ANALOG_TCON
msWriteByte(BK1_A9_PD_VDAC, 0x00);
#else
msWriteByte(BK1_4C, 0x5F);
#endif
msWriteByte(BK0_00_REGBK, REG_BANK_SCALER); // switch to Bank 0
Delay1ms(5);//(50);
msWriteByte(BK0_F4_TRISTATE, 0);
#if ENABLE_MCU_USE_INTERNAL_CLOCK
if( g_bMcuUseNewClock == 0 )
McuUseInternalClock();
#endif
}
///////////////////////////////////////////////////////////////////////////////
// <Function>: msSoftwareReset
//
// <Description>: MST chip software reset.
//
// <Parameter>: - <Flow> - <Description>
//-----------------------------------------------------------------------------
// ucParam - In - Software reset parameter
// ucDelayTime - In - Delay time(unit: 1ms)
///////////////////////////////////////////////////////////////////////////////
void msSoftwareReset(BYTE wParam, BYTE ucDelayTime)
{
msWriteByte(BK0_E2_SWRST0, wParam);
Delay1ms(ucDelayTime);
msWriteByte(BK0_E2_SWRST0, 0x00);
}
//*******************************************************************
// Function Name: msPowerDown
//
// Decscription: Power down chip
//
// callee: msWriteByte() in ms_rwreg.c
//
// caller: Power_PowerOffSystem() in power.c
//*******************************************************************
void msPowerDown(void)
{
BYTE ucBank;
ucBank = msReadByte(BK0_00_REGBK);
msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
#if ENABLE_MCU_USE_INTERNAL_CLOCK
msWriteByte(BK0_EE_PDMD2, 0 );
g_bMcuUseNewClock = 0;
#endif
msWriteByte(BK0_F4_TRISTATE, 0xFF);
msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU); // switch to Bank 1
msWriteByte(BK1_31, 0x7F);
msWriteByte(BK1_32, 0xFF);
msWriteByte(BK1_45, 0x01);
#if PANEL_ANALOG_TCON
msWriteByte(BK1_A9_PD_VDAC, 0x0F);
#else
msWriteByte(BK1_4C, 0x5F);
#endif
msWriteByte(BK0_00_REGBK, REG_BANK_SCALER); // switch to Bank 0
msWriteByte(BK0_E0_PDMD0, 0xB0);
msWriteByte(BK0_E1_PDMD1, 0xFF);
msWriteByte(BK0_00_REGBK, ucBank);
TH1 = TIMER1_MODE2_TH1; // set timer1(buad rate)
TR1 = 1; // timer1 run
PX1 = 1; // set INT1 priority high //Nicolee 20051231 add for low power mode ir power on set
#if(IR_FORMAT == IR_RC5)
PT2 = 1;
#endif
}
void LoadGammaTbl(void)
{
BYTE i;
BYTE count;
msWriteByte(BK0_91_GAMMA_ADR_PORT,0x00);
msWriteByte(BK0_90_GAMMA_EN,msReadByte(BK0_90_GAMMA_EN)|_BIT1);
for (i=0;i<3;i++)
{
for(count=0;count<33;count++)
msWriteByte(BK0_92_GAMMA_DAT_PORT,tGammaTableNormal[i][count]);
}
}
void msInitGamma(void)
{
msWriteByte(BK0_90_GAMMA_EN, GAMMA_EN_B);
LoadGammaTbl();
}
void SystemDelay_translate_To_Dsp_Processor(BYTE wDelaycount)
{
BYTE i;
for( i = 0; i < wDelaycount; i ++ )
{
Delay1ms(10);
#if( ENABLE_VD_DSP&&((DSP_RUN_MODE == DSP_RUN_MODE_POLLING)||(DSP_RUN_MODE == DSP_RUN_MODE_TIMER_AND_POLLING)) )
//if( g_ucmsVDCtl & MSVD_CTL_FLAG_VSYNC )
{
VD_DSP();
}
#endif
}
}
void Delay1ms_AGC_Processor(WORD wDelaycount)
{
if( IsVideoPortInUse() && PowerOnFlag)
{
VD_AGC_Processor();
while( wDelaycount )
{
if( wDelaycount > 20 )
{
Delay1ms(20);
wDelaycount -= 20;
VD_AGC_Processor();
}
else
{
Delay1ms(wDelaycount);
wDelaycount = 0;
}
}
VD_AGC_Processor();
}
else
Delay1ms(wDelaycount);
}
WORD GetStdModeHFreq( BYTE ucModeIdx )
{
return tStandardMode[ucModeIdx].HFreq;
}
WORD GetStdModeHTotal( BYTE ucModeIdx )
{
if (tStandardModeResolution[tStandardMode[ucModeIdx].ResIndex].DispWidth < PanelWidth)
return tStandardMode[ucModeIdx].HTotal* 2;
else
return tStandardMode[ucModeIdx].HTotal;
}
WORD msCalculateHFreqX10( WORD wHPeriod )
{
return ((((DWORD)MST_CLOCK_KHZ * 10) + (wHPeriod / 2)) / wHPeriod); // kHz
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