8563.s

基于ATMEGA16的时钟芯片原代码

; {
	ldd R16,y+4
	xcall _BCD_ASCII
	xcall _WR_dat
	.dbline -2
L38:
	xcall pop_gset2
	.dbline 0 ; func end
	ret
	.dbsym l number 4 c
	.dbsym r Y 22 c
	.dbsym r X 20 c
	.dbend
	.dbfunc e lcd_write2 _lcd_write2 fV
;         number -> y+4
;              Y -> R22
;              X -> R20
	.even
_lcd_write2::
	xcall push_gset2
	mov R22,R18
	mov R20,R16
	.dbline -1
	.dbline 160
; 	temp[2]=0;
; 	temp[1]=(c&0x0f)+0x30;
; 	temp[0]=((c&0xf0)>>4)+0x30;
; }
	.dbline 161
; /*******************************************************/
	mov R18,R22
	mov R16,R20
	xcall _LCD_address
	.dbline 162
; /******   函数名称: Twi_Init()                    ******/
	ldi R17,100
	ldd R16,y+4
	xcall mod8u
	ldi R17,10
	xcall div8u
	xcall _BCD_ASCII
	xcall _WR_dat
	.dbline 163
; /******   功    能: 初始化TWI总线                 ******/
	ldi R17,10
	ldd R16,y+4
	xcall mod8u
	xcall _BCD_ASCII
	xcall _WR_dat
	.dbline -2
L39:
	xcall pop_gset2
	.dbline 0 ; func end
	ret
	.dbsym l number 4 c
	.dbsym r Y 22 c
	.dbsym r X 20 c
	.dbend
	.dbfile H:\bbi项目源程序\8563时钟芯片/delay.h
	.dbfunc e delay_nus _delay_nus fV
;           time -> R16,R17
	.even
_delay_nus::
	.dbline -1
	.dbline 33
	xjmp L42
L41:
	.dbline 35
	.dbline 36
	nop
	.dbline 36
	nop
	.dbline 36
	nop
	.dbline 36
	nop
	.dbline 36
	nop
	.dbline 36
	nop
	.dbline 36
	nop
	.dbline 37
	subi R16,1
	sbci R17,0
	.dbline 38
L42:
	.dbline 34
	cpi R16,0
	cpc R16,R17
	brne L41
X2:
	.dbline -2
L40:
	.dbline 0 ; func end
	ret
	.dbsym r time 16 i
	.dbend
	.dbfunc e delay_nms _delay_nms fV
;              i -> R20,R21
;           time -> R16,R17
	.even
_delay_nms::
	xcall push_gset1
	.dbline -1
	.dbline 41
	xjmp L46
L45:
	.dbline 44
	.dbline 45
	clr R20
	clr R21
	xjmp L51
L48:
	.dbline 45
L49:
	.dbline 45
	subi R20,255  ; offset = 1
	sbci R21,255
L51:
	.dbline 45
	cpi R20,44
	ldi R30,6
	cpc R21,R30
	brlo L48
	.dbline 46
	subi R16,1
	sbci R17,0
	.dbline 47
L46:
	.dbline 43
	cpi R16,0
	cpc R16,R17
	brne L45
X3:
	.dbline -2
L44:
	xcall pop_gset1
	.dbline 0 ; func end
	ret
	.dbsym r i 20 i
	.dbsym r time 16 i
	.dbend
	.area data(ram, con, rel)
	.dbfile H:\bbi项目源程序\8563时钟芯片/delay.h
_read_shijian::
	.blkb 2
	.area idata
	.byte 2,33
	.area data(ram, con, rel)
	.dbfile H:\bbi项目源程序\8563时钟芯片/delay.h
	.blkb 2
	.area idata
	.byte 22,36
	.area data(ram, con, rel)
	.dbfile H:\bbi项目源程序\8563时钟芯片/delay.h
	.blkb 2
	.area idata
	.byte 0,18
	.area data(ram, con, rel)
	.dbfile H:\bbi项目源程序\8563时钟芯片/delay.h
	.blkb 1
	.area idata
	.byte 39
	.area data(ram, con, rel)
	.dbfile H:\bbi项目源程序\8563时钟芯片/delay.h
	.dbfile H:\bbi项目源程序\8563时钟芯片\8563.c
	.dbsym e read_shijian _read_shijian A[7:7]c
_write_shijian::
	.blkb 2
	.area idata
	.byte 0,'H
	.area data(ram, con, rel)
	.dbfile H:\bbi项目源程序\8563时钟芯片\8563.c
	.blkb 2
	.area idata
	.byte 16,16
	.area data(ram, con, rel)
	.dbfile H:\bbi项目源程序\8563时钟芯片\8563.c
	.blkb 2
	.area idata
	.byte 0,6
	.area data(ram, con, rel)
	.dbfile H:\bbi项目源程序\8563时钟芯片\8563.c
	.blkb 1
	.area idata
	.byte 7
	.area data(ram, con, rel)
	.dbfile H:\bbi项目源程序\8563时钟芯片\8563.c
	.dbsym e write_shijian _write_shijian A[7:7]c
	.area text(rom, con, rel)
	.dbfile H:\bbi项目源程序\8563时钟芯片\8563.c
	.dbfunc e Start _Start fV
	.even
_Start::
	.dbline -1
	.dbline 48
	.dbline 48
	ldi R24,164
	out 0x36,R24
	.dbline -2
L52:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e Wait _Wait fV
	.even
_Wait::
	.dbline -1
	.dbline 50
L54:
	.dbline 50
L55:
	.dbline 50
	in R24,0x36
	andi R24,128
	cpi R24,128
	brne L54
	.dbline -2
L53:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e TestAck _TestAck fc
;           twsr -> R16
	.even
_TestAck::
	.dbline -1
	.dbline 52
	.dbline 52
	in R16,0x1
	andi R16,248
	.dbline 52
	.dbline -2
L57:
	.dbline 0 ; func end
	ret
	.dbsym r twsr 16 c
	.dbend
	.dbfunc e Write8Bit _Write8Bit fV
;           data -> R16
	.even
_Write8Bit::
	.dbline -1
	.dbline 54
	.dbline 54
	out 0x3,R16
	.dbline 54
	ldi R24,132
	out 0x36,R24
	.dbline -2
L58:
	.dbline 0 ; func end
	ret
	.dbsym r data 16 c
	.dbend
	.dbfunc e Stop _Stop fV
	.even
_Stop::
	.dbline -1
	.dbline 56
	.dbline 56
	ldi R24,148
	out 0x36,R24
	.dbline -2
L59:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e Ack _Ack fV
	.even
_Ack::
	.dbline -1
	.dbline 58
	.dbline 58
	ldi R24,196
	out 0x36,R24
	.dbline -2
L60:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e Twi _Twi fV
	.even
_Twi::
	.dbline -1
	.dbline 60
	.dbline 60
	ldi R24,132
	out 0x36,R24
	.dbline -2
L61:
	.dbline 0 ; func end
	ret
	.dbend
	.dbfunc e i2c_Write _i2c_Write fc
;     RomAddress -> R22
;        command -> R20
	.even
_i2c_Write::
	xcall push_gset2
	mov R22,R18
	mov R20,R16
	.dbline -1
	.dbline 70
	.dbline 71
	xcall _Start
	.dbline 72
	xcall _Wait
	.dbline 73
	xcall _TestAck
	cpi R16,8
	breq L63
	.dbline 73
	ldi R16,1
	xjmp L62
L63:
	.dbline 74
	ldi R16,162
	xcall _Write8Bit
	.dbline 75
	xcall _Wait
	.dbline 76
	xcall _TestAck
	cpi R16,24
	breq L65
	.dbline 76
	ldi R16,2
	xjmp L62
L65:
	.dbline 77
	mov R16,R22
	xcall _Write8Bit
	.dbline 78
	xcall _Wait
	.dbline 79
	xcall _TestAck
	cpi R16,40
	breq L67
	.dbline 79
	ldi R16,3
	xjmp L62
L67:
	.dbline 80
	mov R16,R20
	xcall _Write8Bit
	.dbline 81
	xcall _Wait
	.dbline 82
	xcall _TestAck
	cpi R16,40
	breq L69
	.dbline 82
	ldi R16,4
	xjmp L62
L69:
	.dbline 83
	xcall _Stop
	.dbline 84
	ldi R16,10
	ldi R17,0
	xcall _delay_nms
	.dbline 85
	clr R16
	.dbline -2
L62:
	xcall pop_gset2
	.dbline 0 ; func end
	ret
	.dbsym r RomAddress 22 c
	.dbsym r command 20 c
	.dbend
	.dbfunc e i2c_WriteData _i2c_WriteData fc
;              i -> R20
;     RomAddress -> R20
	.even
_i2c_WriteData::
	xcall push_gset1
	mov R20,R16
	.dbline -1
	.dbline 94
	.dbline 96
	xcall _Start
	.dbline 97
	xcall _Wait
	.dbline 98
	xcall _TestAck
	cpi R16,8
	breq L72
	.dbline 98
	ldi R16,1
	xjmp L71
L72:
	.dbline 99
	ldi R16,162
	xcall _Write8Bit
	.dbline 100
	xcall _Wait
	.dbline 101
	xcall _TestAck
	cpi R16,24
	breq L74
	.dbline 101
	ldi R16,2
	xjmp L71
L74:
	.dbline 102
	mov R16,R20
	xcall _Write8Bit
	.dbline 103
	xcall _Wait
	.dbline 104
	xcall _TestAck
	cpi R16,40
	breq L76
	.dbline 104
	ldi R16,3
	xjmp L71
L76:
	.dbline 105
	clr R20
	xjmp L81
L78:
	.dbline 106
	.dbline 107
	ldi R24,<_write_shijian
	ldi R25,>_write_shijian
	mov R30,R20
	clr R31
	add R30,R24
	adc R31,R25
	ldd R16,z+0
	xcall _Write8Bit
	.dbline 108
	xcall _Wait
	.dbline 109
	xcall _TestAck
	cpi R16,40
	breq L82
	.dbline 109
	ldi R16,4
	xjmp L71
L82:
	.dbline 110
L79:
	.dbline 105
	inc R20
L81:
	.dbline 105
	cpi R20,7
	brlo L78
	.dbline 111
	xcall _Stop
	.dbline 112
	ldi R16,10
	ldi R17,0
	xcall _delay_nms
	.dbline 113
	clr R16
	.dbline -2
L71:
	xcall pop_gset1
	.dbline 0 ; func end
	ret
	.dbsym r i 20 c
	.dbsym r RomAddress 20 c
	.dbend
	.dbfunc e i2c_Read _i2c_Read fc
;              i -> R20
;     RomAddress -> R20
	.even
_i2c_Read::
	xcall push_gset1
	mov R20,R16
	.dbline -1
	.dbline 122
	.dbline 124
	xcall _Start
	.dbline 125
	xcall _Wait
	.dbline 126
	xcall _TestAck
	cpi R16,8
	breq L85
	.dbline 126
	ldi R16,1
	xjmp L84
L85:
	.dbline 127
	ldi R16,162
	xcall _Write8Bit
	.dbline 128
	xcall _Wait
	.dbline 129
	xcall _TestAck
	cpi R16,24
	breq L87
	.dbline 129
	ldi R16,2
	xjmp L84
L87:
	.dbline 130
	mov R16,R20
	xcall _Write8Bit
	.dbline 131
	xcall _Wait
	.dbline 132
	xcall _TestAck
	cpi R16,40
	breq L89
	.dbline 132
	ldi R16,3
	xjmp L84
L89:
	.dbline 133
	xcall _Start
	.dbline 134
	xcall _Wait
	.dbline 135
	xcall _TestAck
	cpi R16,16
	breq L91
	.dbline 135
	ldi R16,4
	xjmp L84
L91:
	.dbline 136
	ldi R16,163
	xcall _Write8Bit
	.dbline 137
	xcall _Wait
	.dbline 138
	xcall _TestAck
	cpi R16,64
	breq L93
	.dbline 138
	ldi R16,5
	xjmp L84
L93:
	.dbline 139
	clr R20
	xjmp L98
L95:
	.dbline 140
	.dbline 141
	xcall _Ack
	.dbline 142
	xcall _Wait
	.dbline 143
	xcall _TestAck
	cpi R16,80
	breq L99
	.dbline 143
	ldi R16,6
	xjmp L84
L99:
	.dbline 144
	ldi R24,<_read_shijian
	ldi R25,>_read_shijian
	mov R30,R20
	clr R31
	add R30,R24
	adc R31,R25
	in R2,0x3
	std z+0,R2
	.dbline 145
L96:
	.dbline 139
	inc R20
L98:
	.dbline 139
	cpi R20,7
	brlo L95
	.dbline 146
	xcall _Stop
	.dbline 147