📄 epi.c
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//
HWREG(ulBase + EPI_O_GPCFG) = ulConfig;
}
//*****************************************************************************
//
//! Configures the address map for the external interface.
//!
//! \param ulBase is the EPI module base address.
//! \param ulMap is the address mapping configuration.
//!
//! This function is used to configure the address mapping for the external
//! interface. This determines the base address of the external memory or
//! device within the processor peripheral and/or memory space.
//!
//! The parameter \e ulMap is the logical OR of the following:
//!
//! - \b EPI_ADDR_PER_SIZE_256B, \b EPI_ADDR_PER_SIZE_64KB,
//! \b EPI_ADDR_PER_SIZE_16MB, or \b EPI_ADDR_PER_SIZE_512MB to choose a
//! peripheral address space of 256 bytes, 64 Kbytes, 16 Mbytes or 512 Mbytes
//! - \b EPI_ADDR_PER_BASE_NONE, \b EPI_ADDR_PER_BASE_A, or
//! \b EPI_ADDR_PER_BASE_C to choose the base address of the peripheral
//! space as none, 0xA0000000, or 0xC0000000
//! - \b EPI_ADDR_RAM_SIZE_256B, \b EPI_ADDR_RAM_SIZE_64KB,
//! \b EPI_ADDR_RAM_SIZE_16MB, or \b EPI_ADDR_RAM_SIZE_512MB to choose a
//! RAM address space of 256 bytes, 64 Kbytes, 16 Mbytes or 512 Mbytes
//! - \b EPI_ADDR_RAM_BASE_NONE, \b EPI_ADDR_RAM_BASE_6, or
//! \b EPI_ADDR_RAM_BASE_8 to choose the base address of the RAM space
//! as none, 0x60000000, or 0x80000000
//!
//! \return None.
//
//*****************************************************************************
void
EPIAddressMapSet(unsigned long ulBase, unsigned long ulMap)
{
//
// Check the arguments.
//
ASSERT(ulBase == EPI0_BASE);
ASSERT(ulMap < 0x100);
//
// Set the value of the address mapping register.
//
HWREG(ulBase + EPI_O_ADDRMAP) = ulMap;
}
//*****************************************************************************
//
//! Configures a non-blocking read transaction.
//!
//! \param ulBase is the EPI module base address.
//! \param ulChannel is the read channel (0 or 1).
//! \param ulDataSize is the size of the data items to read.
//! \param ulAddress is the starting address to read.
//!
//! This function is used to configure a non-blocking read channel for a
//! transaction. Two channels are available which can be used in a ping-pong
//! method for continuous reading. It is not necessary to use both channels
//! to perform a non-blocking read.
//!
//! The parameter \e ulDataSize is one of \b EPI_NBCONFIG_SIZE_8,
//! \b EPI_NBCONFIG_SIZE_16, or \b EPI_NBCONFIG_SIZE_32 for 8-bit, 16-bit,
//! or 32-bit sized data transfers.
//!
//! The parameter \e ulAddress is the starting address for the read, relative
//! to the external device. The start of the device is address 0.
//!
//! Once configured, the non-blocking read is started by calling
//! EPINonBlockingReadStart(). If the addresses to be read from the device
//! are in a sequence, it is not necessary to call this function multiple
//! times. Until it is changed, the EPI module will remember the last address
//! that was used for a non-blocking read (per channel).
//!
//! \return None.
//
//*****************************************************************************
void
EPINonBlockingReadConfigure(unsigned long ulBase, unsigned long ulChannel,
unsigned long ulDataSize, unsigned long ulAddress)
{
unsigned long ulOffset;
//
// Check the arguments.
//
ASSERT(ulBase == EPI0_BASE);
ASSERT(ulChannel < 2);
ASSERT(ulDataSize < 4);
ASSERT(ulAddress < 0x20000000);
//
// Compute the offset needed to select the correct channel regs.
//
ulOffset = ulChannel * (EPI_O_RSIZE1 - EPI_O_RSIZE0);
//
// Write the data size register for the channel.
//
HWREG(ulBase + EPI_O_RSIZE0 + ulOffset) = ulDataSize;
//
// Write the starting address register for the channel.
//
HWREG(ulBase + EPI_O_RADDR0 + ulOffset) = ulAddress;
}
//*****************************************************************************
//
//! Starts a non-blocking read transaction.
//!
//! \param ulBase is the EPI module base address.
//! \param ulChannel is the read channel (0 or 1).
//! \param ulCount is the number of items to read (1-4095).
//!
//! This function starts a non-blocking read that was previously configured
//! with the function EPINonBlockingReadConfigure(). Once this function is
//! called, the EPI module will begin reading data from the external device
//! into the read FIFO. The EPI will stop reading when the FIFO fills up
//! and resume reading when the application drains the FIFO, until the
//! total specified count of data items has been read.
//!
//! Once a read transaction is completed and the FIFO drained, another
//! transaction can be started from the next address by calling this
//! function again.
//!
//! \return None.
//
//*****************************************************************************
void
EPINonBlockingReadStart(unsigned long ulBase, unsigned long ulChannel,
unsigned long ulCount)
{
unsigned long ulOffset;
//
// Check the arguments.
//
ASSERT(ulBase == EPI0_BASE);
ASSERT(ulChannel < 2);
ASSERT(ulCount < 4096);
//
// Compute the offset needed to select the correct channel regs.
//
ulOffset = ulChannel * (EPI_O_RPSTD1 - EPI_O_RPSTD0);
//
// Write to the read count register.
//
HWREG(ulBase + EPI_O_RPSTD0 + ulOffset) = ulCount;
}
//*****************************************************************************
//
//! Stops a non-blocking read transaction.
//!
//! \param ulBase is the EPI module base address.
//! \param ulChannel is the read channel (0 or 1).
//!
//! This function cancels a non-blocking read transaction that is already
//! in progress.
//!
//! \return None.
//
//*****************************************************************************
void
EPINonBlockingReadStop(unsigned long ulBase, unsigned long ulChannel)
{
unsigned long ulOffset;
//
// Check the arguments.
//
ASSERT(ulBase == EPI0_BASE);
ASSERT(ulChannel < 2);
//
// Compute the offset needed to select the correct channel regs.
//
ulOffset = ulChannel * (EPI_O_RPSTD1 - EPI_O_RPSTD0);
//
// Write a 0 to the read count register, which will cancel the transaction.
//
HWREG(ulBase + EPI_O_RPSTD0 + ulOffset) = 0;
}
//*****************************************************************************
//
//! Get the count remaining for a non-blocking transaction.
//!
//! \param ulBase is the EPI module base address.
//! \param ulChannel is the read channel (0 or 1).
//!
//! This function gets the remaining count of items for a non-blocking read
//! transaction.
//!
//! \return The number of items remaining in the non-blocking read transaction.
//
//*****************************************************************************
unsigned long
EPINonBlockingReadCount(unsigned long ulBase, unsigned long ulChannel)
{
unsigned long ulOffset;
//
// Check the arguments.
//
ASSERT(ulBase == EPI0_BASE);
ASSERT(ulChannel < 2);
//
// Compute the offset needed to select the correct channel regs.
//
ulOffset = ulChannel * (EPI_O_RPSTD1 - EPI_O_RPSTD0);
//
// Read the count remaining and return the value to the caller.
//
return(HWREG(ulBase + EPI_O_RPSTD0 + ulOffset));
}
//*****************************************************************************
//
//! Get the count of items available in the read FIFO.
//!
//! \param ulBase is the EPI module base address.
//!
//! This function gets the number of items that are available to read in
//! the read FIFO. The read FIFO is filled by a non-blocking read transaction
//! which is configured by the functions EPINonBlockingReadConfigure() and
//! EPINonBlockingReadStart().
//!
//! \return The number of items available to read in the read FIFO.
//
//*****************************************************************************
unsigned long
EPINonBlockingReadAvail(unsigned long ulBase)
{
//
// Check the arguments.
//
ASSERT(ulBase == EPI0_BASE);
//
// Read the FIFO count and return it to the caller.
//
return(HWREG(ulBase + EPI_O_RFIFOCNT));
}
//*****************************************************************************
//
//! Read available data from the read FIFO, as 32-bit data items.
//!
//! \param ulBase is the EPI module base address.
//! \param ulCount is the maximum count of items to read.
//! \param pulBuf is the caller supplied buffer where the read data should
//! be stored.
//!
//! This function reads 32-bit data items from the read FIFO and stores
//! the values in a caller supplied buffer. The function will read and store
//! data from the FIFO until there is no more data in the FIFO or the maximum
//! count is reached as specified in the parameter \e ulCount. The actual
//! count of items will be returned.
//!
//! \return The number of items read from the FIFO.
//
//*****************************************************************************
unsigned long
EPINonBlockingReadGet32(unsigned long ulBase, unsigned long ulCount,
unsigned long *pulBuf)
{
unsigned long ulCountRead = 0;
//
// Check the arguments.
//
ASSERT(ulBase == EPI0_BASE);
ASSERT(ulCount < 4096);
ASSERT(pulBuf);
//
// Read from the FIFO while there are any items to read, and
// the callers specified count is not exceeded.
//
while(HWREG(ulBase + EPI_O_RFIFOCNT) && ulCount--)
{
//
// Read from the FIFO and store in the caller supplied buffer.
//
*pulBuf = HWREG(ulBase + EPI_O_READFIFO);
//
// Update the caller's buffer pointer and the count of items read.
//
pulBuf++;
ulCountRead++;
}
//
// Return the count of items read to the caller.
//
return(ulCountRead);
}
//*****************************************************************************
//
//! Read available data from the read FIFO, as 16-bit data items.
//!
//! \param ulBase is the EPI module base address.
//! \param ulCount is the maximum count of items to read.
//! \param pusBuf is the caller supplied buffer where the read data should
//! be stored.
//!
//! This function reads 16-bit data items from the read FIFO and stores
//! the values in a caller supplied buffer. The function will read and store
//! data from the FIFO until there is no more data in the FIFO or the maximum
//! count is reached as specified in the parameter \e ulCount. The actual
//! count of items will be returned.
//!
//! \return The number of items read from the FIFO.
//
//*****************************************************************************
unsigned long
EPINonBlockingReadGet16(unsigned long ulBase, unsigned long ulCount,
unsigned short *pusBuf)
{
unsigned long ulCountRead = 0;
//
// Check the arguments.
//
ASSERT(ulBase == EPI0_BASE);
ASSERT(ulCount < 4096);
ASSERT(pusBuf);
//
// Read from the FIFO while there are any items to read, and
// the callers specified count is not exceeded.
//
while(HWREG(ulBase + EPI_O_RFIFOCNT) && ulCount--)
{
//
// Read from the FIFO and store in the caller supplied buffer.
//
*pusBuf = (unsigned short)HWREG(ulBase + EPI_O_READFIFO);
//
// Update the caller's buffer pointer and the count of items read.
//
pusBuf++;
ulCountRead++;
}
//
// Return the count of items read to the caller.
//
return(ulCountRead);
}
//*****************************************************************************
//
//! Read available data from the read FIFO, as 8-bit data items.
//!
//! \param ulBase is the EPI module base address.
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