📄 hw_pwm.h
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#define PWM_X_GENB_ACTCMPAD_INV 0x00000040 // Invert the output signal
#define PWM_X_GENB_ACTCMPAD_ZERO \
0x00000080 // Set the output signal to 0
#define PWM_X_GENB_ACTCMPAD_ONE 0x000000C0 // Set the output signal to 1
#define PWM_X_GENB_ACTCMPAU_M 0x00000030 // Action for Comparator A Up
#define PWM_X_GENB_ACTCMPAU_NONE \
0x00000000 // Do nothing
#define PWM_X_GENB_ACTCMPAU_INV 0x00000010 // Invert the output signal
#define PWM_X_GENB_ACTCMPAU_ZERO \
0x00000020 // Set the output signal to 0
#define PWM_X_GENB_ACTCMPAU_ONE 0x00000030 // Set the output signal to 1
#define PWM_X_GENB_ACTLOAD_M 0x0000000C // Action for Counter=Load
#define PWM_X_GENB_ACTLOAD_NONE 0x00000000 // Do nothing
#define PWM_X_GENB_ACTLOAD_INV 0x00000004 // Invert the output signal
#define PWM_X_GENB_ACTLOAD_ZERO 0x00000008 // Set the output signal to 0
#define PWM_X_GENB_ACTLOAD_ONE 0x0000000C // Set the output signal to 1
#define PWM_X_GENB_ACTZERO_M 0x00000003 // Action for Counter=0
#define PWM_X_GENB_ACTZERO_NONE 0x00000000 // Do nothing
#define PWM_X_GENB_ACTZERO_INV 0x00000001 // Invert the output signal
#define PWM_X_GENB_ACTZERO_ZERO 0x00000002 // Set the output signal to 0
#define PWM_X_GENB_ACTZERO_ONE 0x00000003 // Set the output signal to 1
//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_X_DBCTL register.
//
//*****************************************************************************
#define PWM_X_DBCTL_ENABLE 0x00000001 // Dead-Band Generator Enable
//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_X_DBRISE register.
//
//*****************************************************************************
#define PWM_X_DBRISE_DELAY_M 0x00000FFF // Dead-Band Rise Delay
#define PWM_X_DBRISE_DELAY_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_X_DBFALL register.
//
//*****************************************************************************
#define PWM_X_DBFALL_DELAY_M 0x00000FFF // Dead-Band Fall Delay
#define PWM_X_DBFALL_DELAY_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_X_FLTSRC0
// register.
//
//*****************************************************************************
#define PWM_X_FLTSRC0_FAULT3 0x00000008 // Fault3
#define PWM_X_FLTSRC0_FAULT2 0x00000004 // Fault2
#define PWM_X_FLTSRC0_FAULT1 0x00000002 // Fault1
#define PWM_X_FLTSRC0_FAULT0 0x00000001 // Fault0
//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_X_FLTSRC1
// register.
//
//*****************************************************************************
#define PWM_X_FLTSRC1_DCMP7 0x00000080 // Digital Comparator 7
#define PWM_X_FLTSRC1_DCMP6 0x00000040 // Digital Comparator 6
#define PWM_X_FLTSRC1_DCMP5 0x00000020 // Digital Comparator 5
#define PWM_X_FLTSRC1_DCMP4 0x00000010 // Digital Comparator 4
#define PWM_X_FLTSRC1_DCMP3 0x00000008 // Digital Comparator 3
#define PWM_X_FLTSRC1_DCMP2 0x00000004 // Digital Comparator 2
#define PWM_X_FLTSRC1_DCMP1 0x00000002 // Digital Comparator 1
#define PWM_X_FLTSRC1_DCMP0 0x00000001 // Digital Comparator 0
//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_X_MINFLTPER
// register.
//
//*****************************************************************************
#define PWM_X_MINFLTPER_M 0x0000FFFF // Minimum Fault Period
#define PWM_X_MINFLTPER_S 0
//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_X_FLTSEN register.
//
//*****************************************************************************
#define PWM_X_FLTSEN_FAULT3 0x00000008 // Fault3 Sense
#define PWM_X_FLTSEN_FAULT2 0x00000004 // Fault2 Sense
#define PWM_X_FLTSEN_FAULT1 0x00000002 // Fault1 Sense
#define PWM_X_FLTSEN_FAULT0 0x00000001 // Fault0 Sense
//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_X_FLTSTAT0
// register.
//
//*****************************************************************************
#define PWM_X_FLTSTAT0_FAULT3 0x00000008 // Fault Input 3
#define PWM_X_FLTSTAT0_FAULT2 0x00000004 // Fault Input 2
#define PWM_X_FLTSTAT0_FAULT1 0x00000002 // Fault Input 1
#define PWM_X_FLTSTAT0_FAULT0 0x00000001 // Fault Input 0
//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_X_FLTSTAT1
// register.
//
//*****************************************************************************
#define PWM_X_FLTSTAT1_DCMP7 0x00000080 // Digital Comparator 7 Trigger
#define PWM_X_FLTSTAT1_DCMP6 0x00000040 // Digital Comparator 6 Trigger
#define PWM_X_FLTSTAT1_DCMP5 0x00000020 // Digital Comparator 5 Trigger
#define PWM_X_FLTSTAT1_DCMP4 0x00000010 // Digital Comparator 4 Trigger
#define PWM_X_FLTSTAT1_DCMP3 0x00000008 // Digital Comparator 3 Trigger
#define PWM_X_FLTSTAT1_DCMP2 0x00000004 // Digital Comparator 2 Trigger
#define PWM_X_FLTSTAT1_DCMP1 0x00000002 // Digital Comparator 1 Trigger
#define PWM_X_FLTSTAT1_DCMP0 0x00000001 // Digital Comparator 0 Trigger
//*****************************************************************************
//
// The following definitions are deprecated.
//
//*****************************************************************************
#ifndef DEPRECATED
//*****************************************************************************
//
// The following are deprecated defines for the bit fields in the PWM_O_CTL
// register.
//
//*****************************************************************************
#define PWM_CTL_GLOBAL_SYNC2 0x00000004 // Global sync generator 2
#define PWM_CTL_GLOBAL_SYNC1 0x00000002 // Global sync generator 1
#define PWM_CTL_GLOBAL_SYNC0 0x00000001 // Global sync generator 0
//*****************************************************************************
//
// The following are deprecated defines for the bit fields in the PWM_O_STATUS
// register.
//
//*****************************************************************************
#define PWM_STATUS_FAULT 0x00000001 // Fault status
//*****************************************************************************
//
// The following are deprecated defines for the PWM Interrupt Register bit
// definitions.
//
//*****************************************************************************
#define PWM_INT_INTFAULT 0x00010000 // Fault interrupt pending
//*****************************************************************************
//
// The following are deprecated defines for the PWM_X Interrupt Status Register
// bit definitions.
//
//*****************************************************************************
#define PWM_X_INT_INTCMPBD 0x00000020 // PWM_X_COUNT = PWM_X_CMPB D rcvd
#define PWM_X_INT_INTCMPBU 0x00000010 // PWM_X_COUNT = PWM_X_CMPB U rcvd
#define PWM_X_INT_INTCMPAD 0x00000008 // PWM_X_COUNT = PWM_X_CMPA D rcvd
#define PWM_X_INT_INTCMPAU 0x00000004 // PWM_X_COUNT = PWM_X_CMPA U rcvd
#define PWM_X_INT_INTCNTLOAD 0x00000002 // PWM_X_COUNT = PWM_X_LOAD rcvd
#define PWM_X_INT_INTCNTZERO 0x00000001 // PWM_X_COUNT = 0 received
//*****************************************************************************
//
// The following are deprecated defines for the PWM_X Generator A/B Control
// Register bit definitions.
//
//*****************************************************************************
#define PWM_X_GEN_Y_ACTCMPBD 0x00000C00 // Act PWM_X_COUNT = PWM_X_CMPB D
#define PWM_X_GEN_Y_ACTCMPBU 0x00000300 // Act PWM_X_COUNT = PWM_X_CMPB U
#define PWM_X_GEN_Y_ACTCMPAD 0x000000C0 // Act PWM_X_COUNT = PWM_X_CMPA D
#define PWM_X_GEN_Y_ACTCMPAU 0x00000030 // Act PWM_X_COUNT = PWM_X_CMPA U
#define PWM_X_GEN_Y_ACTLOAD 0x0000000C // Act PWM_X_COUNT = PWM_X_LOAD
#define PWM_X_GEN_Y_ACTZERO 0x00000003 // Act PWM_X_COUNT = 0
//*****************************************************************************
//
// The following are deprecated defines for the PWM_X Generator A/B Control
// Register action definitions.
//
//*****************************************************************************
#define PWM_GEN_ACT_ONE 0x00000003 // Set the output signal to one
#define PWM_GEN_ACT_ZERO 0x00000002 // Set the output signal to zero
#define PWM_GEN_ACT_INV 0x00000001 // Invert the output signal
#define PWM_GEN_ACT_NONE 0x00000000 // Do nothing
#define PWM_GEN_ACT_B_DN_SHIFT 10 // Shift amount for the B dn action
#define PWM_GEN_ACT_B_UP_SHIFT 8 // Shift amount for the B up action
#define PWM_GEN_ACT_A_DN_SHIFT 6 // Shift amount for the A dn action
#define PWM_GEN_ACT_A_UP_SHIFT 4 // Shift amount for the A up action
#define PWM_GEN_ACT_LOAD_SHIFT 2 // Shift amount for the load action
#define PWM_GEN_ACT_ZERO_SHIFT 0 // Shift amount for the zero action
//*****************************************************************************
//
// The following are deprecated defines for the PWM_X Dead Band Control
// Register bit definitions.
//
//*****************************************************************************
#define PWM_DBCTL_ENABLE 0x00000001 // Enable dead band insertion
//*****************************************************************************
//
// The following are deprecated defines for the PWM Register reset values.
//
//*****************************************************************************
#define PWM_RV_X_DBCTL 0x00000000 // Control the dead band generator
#define PWM_RV_STATUS 0x00000000 // Status
#define PWM_RV_X_ISC 0x00000000 // Interrupt status and clearing
#define PWM_RV_X_RIS 0x00000000 // Raw interrupt status
#define PWM_RV_X_CTL 0x00000000 // Master control of the PWM
// generator block
#define PWM_RV_SYNC 0x00000000 // Counter synch for PWM generators
#define PWM_RV_X_DBFALL 0x00000000 // The dead band falling edge delay
// count
#define PWM_RV_X_INTEN 0x00000000 // Interrupt and trigger enable
#define PWM_RV_X_LOAD 0x00000000 // The load value for the counter
#define PWM_RV_X_GENA 0x00000000 // Controls PWM generator A
#define PWM_RV_CTL 0x00000000 // Master control of the PWM module
#define PWM_RV_FAULT 0x00000000 // Fault handling for the PWM
// output pins
#define PWM_RV_RIS 0x00000000 // Raw interrupt status
#define PWM_RV_X_CMPA 0x00000000 // The comparator A value
#define PWM_RV_INVERT 0x00000000 // Inversion control for PWM output
// pins
#define PWM_RV_X_DBRISE 0x00000000 // The dead band rising edge delay
// count
#define PWM_RV_ENABLE 0x00000000 // Master enable for the PWM output
// pins
#define PWM_RV_X_GENB 0x00000000 // Controls PWM generator B
#define PWM_RV_X_CMPB 0x00000000 // The comparator B value
#define PWM_RV_ISC 0x00000000 // Interrupt status and clearing
#define PWM_RV_INTEN 0x00000000 // Interrupt enable
#define PWM_RV_X_COUNT 0x00000000 // The current counter value
#endif
#endif // __HW_PWM_H__
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