📄 hw_sysctl.h
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#define SYSCTL_DID1_PRTNO_2793 0x006D0000 // LM3S2793
#define SYSCTL_DID1_PRTNO_2911 0x00E30000 // LM3S2911
#define SYSCTL_DID1_PRTNO_2918 0x00E20000 // LM3S2918
#define SYSCTL_DID1_PRTNO_2939 0x00540000 // LM3S2939
#define SYSCTL_DID1_PRTNO_2948 0x008F0000 // LM3S2948
#define SYSCTL_DID1_PRTNO_2950 0x00580000 // LM3S2950
#define SYSCTL_DID1_PRTNO_2965 0x00550000 // LM3S2965
#define SYSCTL_DID1_PRTNO_3651 0x00430000 // LM3S3651
#define SYSCTL_DID1_PRTNO_3739 0x00440000 // LM3S3739
#define SYSCTL_DID1_PRTNO_3748 0x00490000 // LM3S3748
#define SYSCTL_DID1_PRTNO_3749 0x00450000 // LM3S3749
#define SYSCTL_DID1_PRTNO_5632 0x00810000 // LM3S5632
#define SYSCTL_DID1_PRTNO_5652 0x008A0000 // LM3S5652
#define SYSCTL_DID1_PRTNO_5662 0x00910000 // LM3S5662
#define SYSCTL_DID1_PRTNO_5732 0x00960000 // LM3S5732
#define SYSCTL_DID1_PRTNO_5737 0x00970000 // LM3S5737
#define SYSCTL_DID1_PRTNO_5739 0x00A00000 // LM3S5739
#define SYSCTL_DID1_PRTNO_5747 0x00990000 // LM3S5747
#define SYSCTL_DID1_PRTNO_5749 0x00A70000 // LM3S5749
#define SYSCTL_DID1_PRTNO_5752 0x009A0000 // LM3S5752
#define SYSCTL_DID1_PRTNO_5762 0x009C0000 // LM3S5762
#define SYSCTL_DID1_PRTNO_5791 0x00690000 // LM3S5791
#define SYSCTL_DID1_PRTNO_6100 0x00A10000 // LM3S6100
#define SYSCTL_DID1_PRTNO_6110 0x00740000 // LM3S6110
#define SYSCTL_DID1_PRTNO_6420 0x00A50000 // LM3S6420
#define SYSCTL_DID1_PRTNO_6422 0x00820000 // LM3S6422
#define SYSCTL_DID1_PRTNO_6432 0x00750000 // LM3S6432
#define SYSCTL_DID1_PRTNO_6537 0x00760000 // LM3S6537
#define SYSCTL_DID1_PRTNO_6610 0x00710000 // LM3S6610
#define SYSCTL_DID1_PRTNO_6611 0x00E70000 // LM3S6611
#define SYSCTL_DID1_PRTNO_6618 0x00E60000 // LM3S6618
#define SYSCTL_DID1_PRTNO_6633 0x00830000 // LM3S6633
#define SYSCTL_DID1_PRTNO_6637 0x008B0000 // LM3S6637
#define SYSCTL_DID1_PRTNO_6730 0x00A30000 // LM3S6730
#define SYSCTL_DID1_PRTNO_6753 0x00770000 // LM3S6753
#define SYSCTL_DID1_PRTNO_6911 0x00E90000 // LM3S6911
#define SYSCTL_DID1_PRTNO_6918 0x00E80000 // LM3S6918
#define SYSCTL_DID1_PRTNO_6938 0x00890000 // LM3S6938
#define SYSCTL_DID1_PRTNO_6950 0x00720000 // LM3S6950
#define SYSCTL_DID1_PRTNO_6952 0x00780000 // LM3S6952
#define SYSCTL_DID1_PRTNO_6965 0x00730000 // LM3S6965
#define SYSCTL_DID1_PRTNO_8530 0x00640000 // LM3S8530
#define SYSCTL_DID1_PRTNO_8538 0x008E0000 // LM3S8538
#define SYSCTL_DID1_PRTNO_8630 0x00610000 // LM3S8630
#define SYSCTL_DID1_PRTNO_8730 0x00630000 // LM3S8730
#define SYSCTL_DID1_PRTNO_8733 0x008D0000 // LM3S8733
#define SYSCTL_DID1_PRTNO_8738 0x00860000 // LM3S8738
#define SYSCTL_DID1_PRTNO_8930 0x00650000 // LM3S8930
#define SYSCTL_DID1_PRTNO_8933 0x008C0000 // LM3S8933
#define SYSCTL_DID1_PRTNO_8938 0x00880000 // LM3S8938
#define SYSCTL_DID1_PRTNO_8962 0x00A60000 // LM3S8962
#define SYSCTL_DID1_PRTNO_8970 0x00620000 // LM3S8970
#define SYSCTL_DID1_PRTNO_8971 0x00D70000 // LM3S8971
#define SYSCTL_DID1_PRTNO_9790 0x00670000 // LM3S9790
#define SYSCTL_DID1_PRTNO_9792 0x006B0000 // LM3S9792
#define SYSCTL_DID1_PINCNT_M 0x0000E000 // Package Pin Count
#define SYSCTL_DID1_PINCNT_28 0x00000000 // 28 pin package
#define SYSCTL_DID1_PINCNT_48 0x00002000 // 48 pin package
#define SYSCTL_DID1_PINCNT_100 0x00004000 // 100 pin package
#define SYSCTL_DID1_PINCNT_64 0x00006000 // 64 pin package
#define SYSCTL_DID1_TEMP_M 0x000000E0 // Temperature range mask
#define SYSCTL_DID1_TEMP_C 0x00000000 // Commercial temp range (0..70C)
#define SYSCTL_DID1_TEMP_I 0x00000020 // Industrial temp range (-40..85C)
#define SYSCTL_DID1_TEMP_E 0x00000040 // Extended temperature range (-40C
// to 105C)
#define SYSCTL_DID1_PKG_M 0x00000018 // Package Type
#define SYSCTL_DID1_PKG_28SOIC 0x00000000 // 28-pin SOIC
#define SYSCTL_DID1_PKG_48QFP 0x00000008 // 48-pin QFP
#define SYSCTL_DID1_PKG_BGA 0x00000010 // BGA package
#define SYSCTL_DID1_ROHS 0x00000004 // Part is RoHS compliant
#define SYSCTL_DID1_QUAL_M 0x00000003 // Qualification status mask
#define SYSCTL_DID1_QUAL_ES 0x00000000 // Engineering sample (unqualified)
#define SYSCTL_DID1_QUAL_PP 0x00000001 // Pilot production (unqualified)
#define SYSCTL_DID1_QUAL_FQ 0x00000002 // Fully qualified
#define SYSCTL_DID1_PRTNO_S 16 // Part number shift
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_DC0 register.
//
//*****************************************************************************
#define SYSCTL_DC0_SRAMSZ_M 0xFFFF0000 // SRAM size mask
#define SYSCTL_DC0_SRAMSZ_2KB 0x00070000 // 2 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_4KB 0x000F0000 // 4 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_8KB 0x001F0000 // 8 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_16KB 0x003F0000 // 16 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_32KB 0x007F0000 // 32 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_64KB 0x00FF0000 // 64 KB of SRAM
#define SYSCTL_DC0_SRAMSZ_96KB 0x017F0000 // 96 KB of SRAM
#define SYSCTL_DC0_FLASHSZ_M 0x0000FFFF // Flash size mask
#define SYSCTL_DC0_FLASHSZ_8KB 0x00000003 // 8 KB of flash
#define SYSCTL_DC0_FLASHSZ_16KB 0x00000007 // 16 KB of flash
#define SYSCTL_DC0_FLASHSZ_32KB 0x0000000F // 32 KB of flash
#define SYSCTL_DC0_FLASHSZ_64KB 0x0000001F // 64 KB of flash
#define SYSCTL_DC0_FLASHSZ_96KB 0x0000002F // 96 KB of flash
#define SYSCTL_DC0_FLASHSZ_128K 0x0000003F // 128 KB of flash
#define SYSCTL_DC0_FLASHSZ_256K 0x0000007F // 256 KB of flash
#define SYSCTL_DC0_SRAMSZ_S 16 // SRAM size shift
#define SYSCTL_DC0_FLASHSZ_S 0 // Flash size shift
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_DC1 register.
//
//*****************************************************************************
#define SYSCTL_DC1_WDT1 0x10000000 // Watchdog Timer1 Present
#define SYSCTL_DC1_CAN2 0x04000000 // CAN2 module present
#define SYSCTL_DC1_CAN1 0x02000000 // CAN1 module present
#define SYSCTL_DC1_CAN0 0x01000000 // CAN0 module present
#define SYSCTL_DC1_PWM 0x00100000 // PWM module present
#define SYSCTL_DC1_ADC1 0x00020000 // ADC Module 1 Present
#define SYSCTL_DC1_ADC0 0x00010000 // ADC Module 0 Present
#define SYSCTL_DC1_MINSYSDIV_M 0x0000F000 // System Clock Divider
#define SYSCTL_DC1_MINSYSDIV_100 \
0x00001000 // Specifies a 100-MHz clock with a
// PLL divider of 2
#define SYSCTL_DC1_MINSYSDIV_66 0x00002000 // Specifies a 66-MHz clock with a
// PLL divider of 3
#define SYSCTL_DC1_MINSYSDIV_50 0x00003000 // Specifies a 50-MHz clock with a
// PLL divider of 4
#define SYSCTL_DC1_MINSYSDIV_25 0x00007000 // Specifies a 25-MHz clock with a
// PLL divider of 8
#define SYSCTL_DC1_MINSYSDIV_20 0x00009000 // Specifies a 20-MHz clock with a
// PLL divider of 10
#define SYSCTL_DC1_ADCSPD_M 0x00000F00 // ADC speed mask
#define SYSCTL_DC1_ADCSPD_125K 0x00000000 // 125Ksps ADC
#define SYSCTL_DC1_ADCSPD_250K 0x00000100 // 250Ksps ADC
#define SYSCTL_DC1_ADCSPD_500K 0x00000200 // 500Ksps ADC
#define SYSCTL_DC1_ADCSPD_1M 0x00000300 // 1Msps ADC
#define SYSCTL_DC1_ADC1SPD_M 0x00000C00 // Max ADC1 Speed
#define SYSCTL_DC1_ADC1SPD_1M 0x00000C00 // 1M samples/second
#define SYSCTL_DC1_ADC0SPD_M 0x00000300 // Max ADC0 Speed
#define SYSCTL_DC1_ADC0SPD_1M 0x00000300 // 1M samples/second
#define SYSCTL_DC1_MPU 0x00000080 // Cortex M3 MPU present
#define SYSCTL_DC1_HIB 0x00000040 // Hibernation module present
#define SYSCTL_DC1_TEMP 0x00000020 // Temperature sensor present
#define SYSCTL_DC1_PLL 0x00000010 // PLL present
#define SYSCTL_DC1_WDT0 0x00000008 // Watchdog Timer 0 Present
#define SYSCTL_DC1_SWO 0x00000004 // Serial wire output present
#define SYSCTL_DC1_SWD 0x00000002 // Serial wire debug present
#define SYSCTL_DC1_JTAG 0x00000001 // JTAG debug present
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_DC2 register.
//
//*****************************************************************************
#define SYSCTL_DC2_EPI0 0x40000000 // EPI0 Present
#define SYSCTL_DC2_I2S0 0x10000000 // I2S 0 Present
#define SYSCTL_DC2_COMP2 0x04000000 // Analog comparator 2 present
#define SYSCTL_DC2_COMP1 0x02000000 // Analog comparator 1 present
#define SYSCTL_DC2_COMP0 0x01000000 // Analog comparator 0 present
#define SYSCTL_DC2_TIMER3 0x00080000 // Timer 3 present
#define SYSCTL_DC2_TIMER2 0x00040000 // Timer 2 present
#define SYSCTL_DC2_TIMER1 0x00020000 // Timer 1 present
#define SYSCTL_DC2_TIMER0 0x00010000 // Timer 0 present
#define SYSCTL_DC2_I2C1 0x00004000 // I2C 1 present
#define SYSCTL_DC2_I2C0 0x00001000 // I2C 0 present
#define SYSCTL_DC2_QEI1 0x00000200 // QEI 1 present
#define SYSCTL_DC2_QEI0 0x00000100 // QEI 0 present
#define SYSCTL_DC2_SSI1 0x00000020 // SSI 1 present
#define SYSCTL_DC2_SSI0 0x00000010 // SSI 0 present
#define SYSCTL_DC2_UART2 0x00000004 // UART 2 present
#define SYSCTL_DC2_UART1 0x00000002 // UART 1 present
#define SYSCTL_DC2_UART0 0x00000001 // UART 0 present
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_DC3 register.
//
//*****************************************************************************
#define SYSCTL_DC3_32KHZ 0x80000000 // 32KHz Pin Present
#define SYSCTL_DC3_CCP5 0x20000000 // CCP5 pin present
#define SYSCTL_DC3_CCP4 0x10000000 // CCP4 pin present
#define SYSCTL_DC3_CCP3 0x08000000 // CCP3 pin present
#define SYSCTL_DC3_CCP2 0x04000000 // CCP2 pin present
#define SYSCTL_DC3_CCP1 0x02000000 // CCP1 pin present
#define SYSCTL_DC3_CCP0 0x01000000 // CCP0 pin present
#define SYSCTL_DC3_ADC0AIN7 0x00800000 // AIN7 Pin Present
#define SYSCTL_DC3_ADC0AIN6 0x00400000 // AIN6 Pin Present
#define SYSCTL_DC3_ADC0AIN5 0x00200000 // AIN5 Pin Present
#define SYSCTL_DC3_ADC0AIN4 0x00100000 // AIN4 Pin Present
#define SYSCTL_DC3_ADC0AIN3 0x00080000 // AIN3 Pin Present
#define SYSCTL_DC3_ADC0AIN2 0x00040000 // AIN2 Pin Present
#define SYSCTL_DC3_ADC0AIN1 0x00020000 // AIN1 Pin Present
#define SYSCTL_DC3_ADC0AIN0 0x00010000 // AIN0 Pin Present
#define SYSCTL_DC3_PWMFAULT 0x00008000 // PWM Fault Pin Present
#define SYSCTL_DC3_C2O 0x00004000 // C2o pin present
#define SYSCTL_DC3_C2PLUS 0x00002000 // C2+ pin present
#define SYSCTL_DC3_C2MINUS 0x00001000 // C2- pin present
#define SYSCTL_DC3_C1O 0x00000800 // C1o pin present
#define SYSCTL_DC3_C1PLUS 0x00000400 // C1+ pin present
#define SYSCTL_DC3_C1MINUS 0x00000200 // C1- pin present
#define SYSCTL_DC3_C0O 0x00000100 // C0o pin present
#define SYSCTL_DC3_C0PLUS 0x00000080 // C0+ pin present
#define SYSCTL_DC3_C0MINUS 0x00000040 // C0- pin present
#define SYSCTL_DC3_PWM5 0x00000020 // PWM5 pin present
#define SYSCTL_DC3_PWM4 0x00000010 // PWM4 pin present
#define SYSCTL_DC3_PWM3 0x00000008 // PWM3 pin present
#define SYSCTL_DC3_PWM2 0x00000004 // PWM2 pin present
#define SYSCTL_DC3_PWM1 0x00000002 // PWM1 pin present
#define SYSCTL_DC3_PWM0 0x00000001 // PWM0 pin present
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSCTL_DC4 register.
//
//*****************************************************************************
#define SYSCTL_DC4_ETH 0x50000000 // Ethernet present
#define SYSCTL_DC4_EPHY0 0x40000000 // Ethernet PHY0 Present
#define SYSCTL_DC4_EMAC0 0x10000000 // Ethernet MAC0 Present
#define SYSCTL_DC4_E1588 0x01000000 // 1588 Capable
#define SYSCTL_DC4_PICAL 0x00040000 // When set, indicates that the
// USER can calibrate the PIOSC
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