📄 hw_adc.h
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#define ADC_DCRIC_DCTRIG0 0x00010000 // Digital Comparator Trigger 0
#define ADC_DCRIC_DCINT7 0x00000080 // Digital Comparator Interrupt 7
#define ADC_DCRIC_DCINT6 0x00000040 // Digital Comparator Interrupt 6
#define ADC_DCRIC_DCINT5 0x00000020 // Digital Comparator Interrupt 5
#define ADC_DCRIC_DCINT4 0x00000010 // Digital Comparator Interrupt 4
#define ADC_DCRIC_DCINT3 0x00000008 // Digital Comparator Interrupt 3
#define ADC_DCRIC_DCINT2 0x00000004 // Digital Comparator Interrupt 2
#define ADC_DCRIC_DCINT1 0x00000002 // Digital Comparator Interrupt 1
#define ADC_DCRIC_DCINT0 0x00000001 // Digital Comparator Interrupt 0
//*****************************************************************************
//
// The following are defines for the bit fields in the ADC_O_DCCTL0 register.
//
//*****************************************************************************
#define ADC_DCCTL0_CTE 0x00001000 // Comparison Trigger Enable
#define ADC_DCCTL0_CTC_M 0x00000C00 // Comparison Trigger Condition
#define ADC_DCCTL0_CTC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL0_CTC_MID 0x00000400 // COMP0 >= CV < COMP1
#define ADC_DCCTL0_CTC_HIGH 0x00000C00 // CV <= COMP0 and <= COMP1
#define ADC_DCCTL0_CTM_M 0x00000300 // Comparison Trigger Mode
#define ADC_DCCTL0_CTM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL0_CTM_ONCE 0x00000100 // Once
#define ADC_DCCTL0_CTM_HALWAYS 0x00000200 // Hysteresis always
#define ADC_DCCTL0_CTM_HONCE 0x00000300 // Hysteresis once
#define ADC_DCCTL0_CIE 0x00000010 // Comparison Interrupt Enable
#define ADC_DCCTL0_CIC_M 0x0000000C // Comparison Interrupt Condition
#define ADC_DCCTL0_CIC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL0_CIC_MID 0x00000004 // COMP0 >= CV < COMP1
#define ADC_DCCTL0_CIC_HIGH 0x0000000C // CV <= COMP0 and <= COMP1
#define ADC_DCCTL0_CIM_M 0x00000003 // Comparison Interrupt Mode
#define ADC_DCCTL0_CIM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL0_CIM_ONCE 0x00000001 // Once
#define ADC_DCCTL0_CIM_HALWAYS 0x00000002 // Hysteresis always
#define ADC_DCCTL0_CIM_HONCE 0x00000003 // Hysteresis once
//*****************************************************************************
//
// The following are defines for the bit fields in the ADC_O_DCCTL1 register.
//
//*****************************************************************************
#define ADC_DCCTL1_CTE 0x00001000 // Comparison Trigger Enable
#define ADC_DCCTL1_CTC_M 0x00000C00 // Comparison Trigger Condition
#define ADC_DCCTL1_CTC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL1_CTC_MID 0x00000400 // COMP0 >= CV < COMP1
#define ADC_DCCTL1_CTC_HIGH 0x00000C00 // CV <= COMP0 and <= COMP1
#define ADC_DCCTL1_CTM_M 0x00000300 // Comparison Trigger Mode
#define ADC_DCCTL1_CTM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL1_CTM_ONCE 0x00000100 // Once
#define ADC_DCCTL1_CTM_HALWAYS 0x00000200 // Hysteresis always
#define ADC_DCCTL1_CTM_HONCE 0x00000300 // Hysteresis once
#define ADC_DCCTL1_CIE 0x00000010 // Comparison Interrupt Enable
#define ADC_DCCTL1_CIC_M 0x0000000C // Comparison Interrupt Condition
#define ADC_DCCTL1_CIC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL1_CIC_MID 0x00000004 // COMP0 >= CV < COMP1
#define ADC_DCCTL1_CIC_HIGH 0x0000000C // CV <= COMP0 and <= COMP1
#define ADC_DCCTL1_CIM_M 0x00000003 // Comparison Interrupt Mode
#define ADC_DCCTL1_CIM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL1_CIM_ONCE 0x00000001 // Once
#define ADC_DCCTL1_CIM_HALWAYS 0x00000002 // Hysteresis always
#define ADC_DCCTL1_CIM_HONCE 0x00000003 // Hysteresis once
//*****************************************************************************
//
// The following are defines for the bit fields in the ADC_O_DCCTL2 register.
//
//*****************************************************************************
#define ADC_DCCTL2_CTE 0x00001000 // Comparison Trigger Enable
#define ADC_DCCTL2_CTC_M 0x00000C00 // Comparison Trigger Condition
#define ADC_DCCTL2_CTC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL2_CTC_MID 0x00000400 // COMP0 >= CV < COMP1
#define ADC_DCCTL2_CTC_HIGH 0x00000C00 // CV <= COMP0 and <= COMP1
#define ADC_DCCTL2_CTM_M 0x00000300 // Comparison Trigger Mode
#define ADC_DCCTL2_CTM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL2_CTM_ONCE 0x00000100 // Once
#define ADC_DCCTL2_CTM_HALWAYS 0x00000200 // Hysteresis always
#define ADC_DCCTL2_CTM_HONCE 0x00000300 // Hysteresis once
#define ADC_DCCTL2_CIE 0x00000010 // Comparison Interrupt Enable
#define ADC_DCCTL2_CIC_M 0x0000000C // Comparison Interrupt Condition
#define ADC_DCCTL2_CIC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL2_CIC_MID 0x00000004 // COMP0 >= CV < COMP1
#define ADC_DCCTL2_CIC_HIGH 0x0000000C // CV <= COMP0 and <= COMP1
#define ADC_DCCTL2_CIM_M 0x00000003 // Comparison Interrupt Mode
#define ADC_DCCTL2_CIM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL2_CIM_ONCE 0x00000001 // Once
#define ADC_DCCTL2_CIM_HALWAYS 0x00000002 // Hysteresis always
#define ADC_DCCTL2_CIM_HONCE 0x00000003 // Hysteresis once
//*****************************************************************************
//
// The following are defines for the bit fields in the ADC_O_DCCTL3 register.
//
//*****************************************************************************
#define ADC_DCCTL3_CTE 0x00001000 // Comparison Trigger Enable
#define ADC_DCCTL3_CTC_M 0x00000C00 // Comparison Trigger Condition
#define ADC_DCCTL3_CTC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL3_CTC_MID 0x00000400 // COMP0 >= CV < COMP1
#define ADC_DCCTL3_CTC_HIGH 0x00000C00 // CV <= COMP0 and <= COMP1
#define ADC_DCCTL3_CTM_M 0x00000300 // Comparison Trigger Mode
#define ADC_DCCTL3_CTM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL3_CTM_ONCE 0x00000100 // Once
#define ADC_DCCTL3_CTM_HALWAYS 0x00000200 // Hysteresis always
#define ADC_DCCTL3_CTM_HONCE 0x00000300 // Hysteresis once
#define ADC_DCCTL3_CIE 0x00000010 // Comparison Interrupt Enable
#define ADC_DCCTL3_CIC_M 0x0000000C // Comparison Interrupt Condition
#define ADC_DCCTL3_CIC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL3_CIC_MID 0x00000004 // COMP0 >= CV < COMP1
#define ADC_DCCTL3_CIC_HIGH 0x0000000C // CV <= COMP0 and <= COMP1
#define ADC_DCCTL3_CIM_M 0x00000003 // Comparison Interrupt Mode
#define ADC_DCCTL3_CIM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL3_CIM_ONCE 0x00000001 // Once
#define ADC_DCCTL3_CIM_HALWAYS 0x00000002 // Hysteresis always
#define ADC_DCCTL3_CIM_HONCE 0x00000003 // Hysteresis once
//*****************************************************************************
//
// The following are defines for the bit fields in the ADC_O_DCCTL4 register.
//
//*****************************************************************************
#define ADC_DCCTL4_CTE 0x00001000 // Comparison Trigger Enable
#define ADC_DCCTL4_CTC_M 0x00000C00 // Comparison Trigger Condition
#define ADC_DCCTL4_CTC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL4_CTC_MID 0x00000400 // COMP0 >= CV < COMP1
#define ADC_DCCTL4_CTC_HIGH 0x00000C00 // CV <= COMP0 and <= COMP1
#define ADC_DCCTL4_CTM_M 0x00000300 // Comparison Trigger Mode
#define ADC_DCCTL4_CTM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL4_CTM_ONCE 0x00000100 // Once
#define ADC_DCCTL4_CTM_HALWAYS 0x00000200 // Hysteresis always
#define ADC_DCCTL4_CTM_HONCE 0x00000300 // Hysteresis once
#define ADC_DCCTL4_CIE 0x00000010 // Comparison Interrupt Enable
#define ADC_DCCTL4_CIC_M 0x0000000C // Comparison Interrupt Condition
#define ADC_DCCTL4_CIC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL4_CIC_MID 0x00000004 // COMP0 >= CV < COMP1
#define ADC_DCCTL4_CIC_HIGH 0x0000000C // CV <= COMP0 and <= COMP1
#define ADC_DCCTL4_CIM_M 0x00000003 // Comparison Interrupt Mode
#define ADC_DCCTL4_CIM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL4_CIM_ONCE 0x00000001 // Once
#define ADC_DCCTL4_CIM_HALWAYS 0x00000002 // Hysteresis always
#define ADC_DCCTL4_CIM_HONCE 0x00000003 // Hysteresis once
//*****************************************************************************
//
// The following are defines for the bit fields in the ADC_O_DCCTL5 register.
//
//*****************************************************************************
#define ADC_DCCTL5_CTE 0x00001000 // Comparison Trigger Enable
#define ADC_DCCTL5_CTC_M 0x00000C00 // Comparison Trigger Condition
#define ADC_DCCTL5_CTC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL5_CTC_MID 0x00000400 // COMP0 >= CV < COMP1
#define ADC_DCCTL5_CTC_HIGH 0x00000C00 // CV <= COMP0 and <= COMP1
#define ADC_DCCTL5_CTM_M 0x00000300 // Comparison Trigger Mode
#define ADC_DCCTL5_CTM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL5_CTM_ONCE 0x00000100 // Once
#define ADC_DCCTL5_CTM_HALWAYS 0x00000200 // Hysteresis always
#define ADC_DCCTL5_CTM_HONCE 0x00000300 // Hysteresis once
#define ADC_DCCTL5_CIE 0x00000010 // Comparison Interrupt Enable
#define ADC_DCCTL5_CIC_M 0x0000000C // Comparison Interrupt Condition
#define ADC_DCCTL5_CIC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL5_CIC_MID 0x00000004 // COMP0 >= CV < COMP1
#define ADC_DCCTL5_CIC_HIGH 0x0000000C // CV <= COMP0 and <= COMP1
#define ADC_DCCTL5_CIM_M 0x00000003 // Comparison Interrupt Mode
#define ADC_DCCTL5_CIM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL5_CIM_ONCE 0x00000001 // Once
#define ADC_DCCTL5_CIM_HALWAYS 0x00000002 // Hysteresis always
#define ADC_DCCTL5_CIM_HONCE 0x00000003 // Hysteresis once
//*****************************************************************************
//
// The following are defines for the bit fields in the ADC_O_DCCTL6 register.
//
//*****************************************************************************
#define ADC_DCCTL6_CTE 0x00001000 // Comparison Trigger Enable
#define ADC_DCCTL6_CTC_M 0x00000C00 // Comparison Trigger Condition
#define ADC_DCCTL6_CTC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL6_CTC_MID 0x00000400 // COMP0 >= CV < COMP1
#define ADC_DCCTL6_CTC_HIGH 0x00000C00 // CV <= COMP0 and <= COMP1
#define ADC_DCCTL6_CTM_M 0x00000300 // Comparison Trigger Mode
#define ADC_DCCTL6_CTM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL6_CTM_ONCE 0x00000100 // Once
#define ADC_DCCTL6_CTM_HALWAYS 0x00000200 // Hysteresis always
#define ADC_DCCTL6_CTM_HONCE 0x00000300 // Hysteresis once
#define ADC_DCCTL6_CIE 0x00000010 // Comparison Interrupt Enable
#define ADC_DCCTL6_CIC_M 0x0000000C // Comparison Interrupt Condition
#define ADC_DCCTL6_CIC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL6_CIC_MID 0x00000004 // COMP0 >= CV < COMP1
#define ADC_DCCTL6_CIC_HIGH 0x0000000C // CV <= COMP0 and <= COMP1
#define ADC_DCCTL6_CIM_M 0x00000003 // Comparison Interrupt Mode
#define ADC_DCCTL6_CIM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL6_CIM_ONCE 0x00000001 // Once
#define ADC_DCCTL6_CIM_HALWAYS 0x00000002 // Hysteresis always
#define ADC_DCCTL6_CIM_HONCE 0x00000003 // Hysteresis once
//*****************************************************************************
//
// The following are defines for the bit fields in the ADC_O_DCCTL7 register.
//
//*****************************************************************************
#define ADC_DCCTL7_CTE 0x00001000 // Comparison Trigger Enable
#define ADC_DCCTL7_CTC_M 0x00000C00 // Comparison Trigger Condition
#define ADC_DCCTL7_CTC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL7_CTC_MID 0x00000400 // COMP0 >= CV < COMP1
#define ADC_DCCTL7_CTC_HIGH 0x00000C00 // CV <= COMP0 and <= COMP1
#define ADC_DCCTL7_CTM_M 0x00000300 // Comparison Trigger Mode
#define ADC_DCCTL7_CTM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL7_CTM_ONCE 0x00000100 // Once
#define ADC_DCCTL7_CTM_HALWAYS 0x00000200 // Hysteresis always
#define ADC_DCCTL7_CTM_HONCE 0x00000300 // Hysteresis once
#define ADC_DCCTL7_CIE 0x00000010 // Comparison Interrupt Enable
#define ADC_DCCTL7_CIC_M 0x0000000C // Comparison Interrupt Condition
#define ADC_DCCTL7_CIC_LOW 0x00000000 // CV < COMP0 and < COMP1
#define ADC_DCCTL7_CIC_MID 0x00000004 // COMP0 >= CV < COMP1
#define ADC_DCCTL7_CIC_HIGH 0x0000000C // CV <= COMP0 and <= COMP1
#define ADC_DCCTL7_CIM_M 0x00000003 // Comparison Interrupt Mode
#define ADC_DCCTL7_CIM_ALWAYS 0x00000000 // Always
#define ADC_DCCTL7_CIM_ONCE 0x00000001 // Once
#define ADC_DCCTL7_CIM_HALWAYS 0x00000002 // Hysteresis always
#define ADC_DCCTL7_CIM_HONCE 0x00000003 // Hysteresis once
//*****************************************************************************
//
// The following are defines for the bit fields in the ADC_O_DCCMP0 register.
//
//*****************************************************************************
#define ADC_DCCMP0_COMP1_M 0x03FF0000 // Compare 1
#define ADC_DCCMP0_COMP0_M 0x000003FF // Compare 0
#define ADC_DCCMP0_COMP1_S 16
#define ADC_DCCMP0_COMP0_S 0
//*****************************************************************************
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