sis_300.c

来自「讲述linux的初始化过程」· C语言 代码 · 共 1,525 行 · 第 1/3 页

	USHORT m,n,o;
	USHORT si,di,bx,dl;
	USHORT al,ah,dh;
	USHORT *table=VGA_DAC;

	time=256;
	table=VGA_DAC;
	j=16;

	SetReg3(P3c6,0xFF);
	SetReg3(P3c8,0x00);

	for(i=0;i<j;i++) {
		data=table[i];
		for(k=0;k<3;k++) {
			data2=0;
			if(data&0x01) data2=0x2A;
			if(data&0x02) data2=data2+0x15;
			SetReg3(P3c9,data2);
			data=data>>2;
		}
	}

	if(time==256) {
		for(i=16;i<32;i++) {
			data=table[i];
			for(k=0;k<3;k++) SetReg3(P3c9,data);
		}
		si=32;
		for(m=0;m<9;m++) {
			di=si;
			bx=si+0x04;
			dl=0;
			for(n=0;n<3;n++) {
				for(o=0;o<5;o++) {
					dh=table[si];
					ah=table[di];
					al=table[bx];
					si++;
					WriteDAC(dl,ah,al,dh);
				}	
				si=si-2;
				for(o=0;o<3;o++) {
					dh=table[bx];
					ah=table[di];
					al=table[si];
					si--;
					WriteDAC(dl,ah,al,dh);
				}	
				dl++;
			}
			si=si+5;
		}
	}
}

VOID WriteDAC(USHORT dl, USHORT ah, USHORT al, USHORT dh)
{
	USHORT temp;
	USHORT bh,bl;

	bh=ah;
	bl=al;
	if(dl!=0) {
		temp=bh;
		bh=dh;
		dh=temp;
		if(dl==1) {
			temp=bl;
			bl=dh;
			dh=temp;
		}
		else {
			temp=bl;
			bl=bh;
			bh=temp;
		}
	}
	SetReg3(P3c9,(USHORT)dh);
	SetReg3(P3c9,(USHORT)bh);
	SetReg3(P3c9,(USHORT)bl);
}


VOID DisplayOn()
{
	USHORT data;

	data=GetReg1(P3c4,0x01);
	data=data&0xDF;
	SetReg1(P3c4,0x01,data);
}


#else
BOOLEAN SiSSetMode(PHW_DEVICE_EXTENSION HwDeviceExtension,
						 USHORT ModeNo)
{
	ULONG	temp;
	USHORT  cr30flag,cr31flag;
	ULONG	ROMAddr  = (ULONG)HwDeviceExtension->VirtualRomBase;
	USHORT  BaseAddr = (USHORT)HwDeviceExtension->IOAddress;

	P3c4=BaseAddr+0x14;
	P3d4=BaseAddr+0x24;
	P3c0=BaseAddr+0x10;
	P3ce=BaseAddr+0x1e;
	P3c2=BaseAddr+0x12;
	P3ca=BaseAddr+0x1a;
	P3c6=BaseAddr+0x16;
	P3c7=BaseAddr+0x17;
	P3c8=BaseAddr+0x18;
	P3c9=BaseAddr+0x19;
	P3da=BaseAddr+0x2A;
	if(ModeNo&0x80){
	  ModeNo=ModeNo&0x7F;
	  flag_clearbuffer=0;		  
	}else{
	  flag_clearbuffer=1;
	}

	PresetScratchregister(P3d4,HwDeviceExtension); //add for CRT2

	SetReg1(P3c4,0x05,0x86);				// 1.Openkey
	temp=SearchModeID(ROMAddr,ModeNo);		// 2.Get ModeID Table
	if(temp==0)  return(0);
	
	SetTVSystem(HwDeviceExtension,ROMAddr);	//add for CRT2
	GetLCDDDCInfo(HwDeviceExtension);		//add for CRT2
	GetVBInfo(BaseAddr,ROMAddr);			//add for CRT2
	GetLCDResInfo(ROMAddr,P3d4);			//add for CRT2

	temp=CheckMemorySize(ROMAddr);			// 3.Check memory size
	if(temp==0) return(0);
	cr30flag=(UCHAR)GetReg1(P3d4,0x30);
	if(((cr30flag&0x01)==1)||((cr30flag&0x02)==0)){
		// if cr30 d[0]=1 or d[1]=0 set crt1  
		SetReg1(P3d4,0x34,ModeNo); 
		// set CR34->CRT1 ModeNofor CRT2 FIFO
		GetModePtr(ROMAddr,ModeNo);			// 4.GetModePtr
		SetSeqRegs(ROMAddr);				// 5.SetSeqRegs
		SetMiscRegs(ROMAddr);				// 6.SetMiscRegs
		SetCRTCRegs(ROMAddr);				// 7.SetCRTCRegs
		SetATTRegs(ROMAddr);				// 8.SetATTRegs
		SetGRCRegs(ROMAddr);				// 9.SetGRCRegs
		ClearExt1Regs();					// 10.Clear Ext1Regs
		temp=GetRatePtr(ROMAddr,ModeNo);	// 11.GetRatePtr
		if(temp) {
			SetSync(ROMAddr);				// 12.SetSync
			SetCRT1CRTC(ROMAddr);			// 13.SetCRT1CRTC
			SetCRT1Offset(ROMAddr);			// 14.SetCRT1Offset
			SetCRT1VCLK(HwDeviceExtension, ROMAddr);	// 15.SetCRT1VCLK
			SetVCLKState(HwDeviceExtension, ROMAddr, ModeNo);
			if(HwDeviceExtension->jChipID >= SIS_Trojan)
				SetCRT1FIFO2(ROMAddr);
			else
				SetCRT1FIFO(ROMAddr);
		}
		SetCRT1ModeRegs(ROMAddr, ModeNo);
		if(HwDeviceExtension->jChipID >= SIS_Trojan)
			SetInterlace(ROMAddr,ModeNo);
		LoadDAC(ROMAddr);
		if(flag_clearbuffer) ClearBuffer(HwDeviceExtension);
	}

	cr31flag=(UCHAR)GetReg1(P3d4,0x31);
	if(((cr30flag&0x01)==1)||((cr30flag&0x03)==0x02)
	  ||(((cr30flag&0x03)==0x00)&&((cr31flag&0x20)==0x20))){
		//if CR30 d[0]=1 or d[1:0]=10, set CRT2 or cr30 cr31== 0x00 0x20	
		SetCRT2Group(BaseAddr,ROMAddr,ModeNo, HwDeviceExtension); //CRT2
	}
	DisplayOn();	// 16.DisplayOn
	return(NO_ERROR);
}

BOOLEAN SearchModeID(ULONG ROMAddr, USHORT ModeNo)
{
	UCHAR ModeID;
	USHORT  usIDLength;

	ModeIDOffset=*((USHORT *)(ROMAddr+0x20A));		// Get EModeIDTable
	ModeID=*((UCHAR *)(ROMAddr+ModeIDOffset));		// Offset 0x20A
	usIDLength = GetModeIDLength(ROMAddr, ModeNo);
	while(ModeID!=0xff && ModeID!=ModeNo) {
		ModeIDOffset=ModeIDOffset+usIDLength;
		ModeID=*((UCHAR *)(ROMAddr+ModeIDOffset));
	}
	if(ModeID==0xff) return(FALSE);
	else return(TRUE);
}

BOOLEAN CheckMemorySize(ULONG ROMAddr)
{
	USHORT memorysize;
	USHORT modeflag;
	USHORT temp;

	modeflag=*((USHORT *)(ROMAddr+ModeIDOffset+0x01));	// si+St_ModeFlag
	ModeType=modeflag&ModeInfoFlag;				// Get mode type

	memorysize=modeflag&MemoryInfoFlag;
	memorysize=memorysize>MemorySizeShift;
	memorysize++;								// Get memory size

	temp=GetReg1(P3c4,0x14);					// Get DRAM Size
	temp=temp&0x3F;
	temp++;

	if(temp<memorysize) return(FALSE);
	else return(TRUE);
}

VOID GetModePtr(ULONG ROMAddr, USHORT ModeNo)
{
	UCHAR index;

	StandTable=*((USHORT *)(ROMAddr+0x202));	// Get First  0x202
												// StandTable Offset
	if(ModeNo<=13) {
		index=*((UCHAR *)(ROMAddr+ModeIDOffset+0x03));	// si+St_ModeFlag
	}
	else {
		if(ModeType <= 0x02) index=0x1B;		// 02 -> ModeEGA
		else index=0x0F;
	}

	StandTable=StandTable+64*index;				// Get ModeNo StandTable

}

VOID SetSeqRegs(ULONG ROMAddr)
{
	UCHAR SRdata;
	USHORT i;

	SetReg1(P3c4,0x00,0x03);					// Set SR0
	StandTable=StandTable+0x05;
	SRdata=*((UCHAR *)(ROMAddr+StandTable));	// Get SR01 from file
	if(IF_DEF_LVDS==1){
		if(VBInfo&SetCRT2ToLCD){
			if(VBInfo&SetInSlaveMode){
				if(LCDInfo&LCDNonExpanding){
					SRdata=SRdata|0x01;
				}
			}
		}
	}

	SRdata=SRdata|0x20;
	SetReg1(P3c4,0x01,SRdata);					// Set SR1
	for(i=02;i<=04;i++) {
		StandTable++;
		SRdata=*((UCHAR *)(ROMAddr+StandTable));	// Get SR2,3,4 from file
		SetReg1(P3c4,i,SRdata);					// Set SR2 3 4
	}
}

VOID SetMiscRegs(ULONG ROMAddr)
{
	UCHAR Miscdata;

	StandTable++;
	Miscdata=*((UCHAR *)(ROMAddr+StandTable));	// Get Misc from file
	SetReg3(P3c2,Miscdata);						// Set Misc(3c2)
}

VOID SetCRTCRegs(ULONG ROMAddr)
{
	UCHAR CRTCdata;
	USHORT i;

	CRTCdata=(UCHAR)GetReg1(P3d4,0x11);
	CRTCdata=CRTCdata&0x7f;
	SetReg1(P3d4,0x11,CRTCdata);				// Unlock CRTC

	for(i=0;i<=0x18;i++) {
		StandTable++;
		CRTCdata=*((UCHAR *)(ROMAddr+StandTable));		// Get CRTC from file
		SetReg1(P3d4,i,CRTCdata);				// Set CRTC(3d4)
	}
}

VOID SetATTRegs(ULONG ROMAddr)
{
	UCHAR ARdata;
	USHORT i;

	for(i=0;i<=0x13;i++) {
		StandTable++;
		ARdata=*((UCHAR *)(ROMAddr+StandTable));	  // Get AR for file
		if(IF_DEF_LVDS==1){  //for LVDS
			if(VBInfo&SetCRT2ToLCD){
				if(VBInfo&SetInSlaveMode){
					if(LCDInfo&LCDNonExpanding){
				 		if(i==0x13){
							ARdata=0;
				 		}
					}
				}
			}
		}
		GetReg2(P3da);			// reset 3da
		SetReg3(P3c0,i);		// set index
		SetReg3(P3c0,ARdata);	// set data
	}
	if(IF_DEF_LVDS==1){  //for LVDS
		if(VBInfo&SetCRT2ToLCD){
			if(VBInfo&SetInSlaveMode){
				if(LCDInfo&LCDNonExpanding){
				
				}
		 	}
		}
	}
	GetReg2(P3da);			// reset 3da
	SetReg3(P3c0,0x14);		// set index
	SetReg3(P3c0,0x00);		// set data

	GetReg2(P3da);			// Enable Attribute
	SetReg3(P3c0,0x20);
}

VOID SetGRCRegs(ULONG ROMAddr)
{
	UCHAR GRdata;
	USHORT i;

	for(i=0;i<=0x08;i++) {
		StandTable++;
		GRdata=*((UCHAR *)(ROMAddr+StandTable));	// Get GR from file
		SetReg1(P3ce,i,GRdata);						// Set GR(3ce)
	}
	if(ModeType>ModeVGA){
		GRdata=(UCHAR)GetReg1(P3ce,0x05);
		GRdata=GRdata&0xBF;
		SetReg1(P3ce,0x05,GRdata); 
	}
}

VOID ClearExt1Regs()
{
	USHORT i;

	for(i=0x0A;i<=0x0E;i++) SetReg1(P3c4,i,0x00);	// Clear SR0A-SR0E
}


BOOLEAN GetRatePtr(ULONG ROMAddr, USHORT ModeNo)
{
	SHORT	index;
  	USHORT temp;
  	USHORT ulRefIndexLength;

	if(ModeNo<0x14) return(FALSE);				// Mode No <= 13h then return

	index=GetReg1(P3d4,0x33);					// Get 3d4 CRTC33
	index=index&0x0F;							// Frame rate index
	if(index!=0) index--;
	REFIndex=*((USHORT *)(ROMAddr+ModeIDOffset+0x04));	// si+Ext_point

	ulRefIndexLength = GetRefindexLength(ROMAddr, ModeNo);
	do {
		temp=*((USHORT *)(ROMAddr+REFIndex));	// di => REFIndex
		if(temp==0xFFFF) break;
		temp=temp&ModeInfoFlag;
		if(temp<ModeType) break;

		REFIndex=REFIndex+ulRefIndexLength;		// rate size
		index--;
	} while(index>=0);

	REFIndex=REFIndex-ulRefIndexLength;			// rate size
	return(TRUE);
}

VOID SetSync(ULONG ROMAddr)
{
	USHORT sync;
	USHORT temp;

	sync=*((USHORT *)(ROMAddr+REFIndex));		// di+0x00
	sync=sync&0xC0;
	temp=0x2F;
	temp=temp|sync;
	SetReg3(P3c2,temp);							// Set Misc(3c2)
}

VOID SetCRT1CRTC(ULONG ROMAddr)
{
	UCHAR  index;
	UCHAR  data;
	USHORT i;

	index=*((UCHAR *)(ROMAddr+REFIndex+0x02));	// Get index
	index=index&0x03F;
	CRT1Table=*((USHORT *)(ROMAddr+0x204));		// Get CRT1Table
	CRT1Table=CRT1Table+index*CRT1Len;

	data=(UCHAR)GetReg1(P3d4,0x11);
	data=data&0x7F;
	SetReg1(P3d4,0x11,data);					// Unlock CRTC

	CRT1Table--;
	for(i=0;i<=0x05;i++) {
		CRT1Table++;
		data=*((UCHAR *)(ROMAddr+CRT1Table));
		SetReg1(P3d4,i,data);
	}
	for(i=0x06;i<=0x07;i++) {
		CRT1Table++;
		data=*((UCHAR *)(ROMAddr+CRT1Table));
		SetReg1(P3d4,i,data);
	}
	for(i=0x10;i<=0x12;i++) {
		CRT1Table++;
		data=*((UCHAR *)(ROMAddr+CRT1Table));
		SetReg1(P3d4,i,data);
	}
	for(i=0x15;i<=0x16;i++) {
		CRT1Table++;
		data=*((UCHAR *)(ROMAddr+CRT1Table));
		SetReg1(P3d4,i,data);
	}
	for(i=0x0A;i<=0x0C;i++) {
		CRT1Table++;
		data=*((UCHAR *)(ROMAddr+CRT1Table));
		SetReg1(P3c4,i,data);
	}

	CRT1Table++;
	data=*((UCHAR *)(ROMAddr+CRT1Table));
	data=data&0xE0;
	SetReg1(P3c4,0x0E,data);

	data=(UCHAR)GetReg1(P3d4,0x09);
	data=data&0xDF;
	i=*((UCHAR *)(ROMAddr+CRT1Table));
	i=i&0x01;
	i=i<<5;
	data=data|i;
	i=*((USHORT *)(ROMAddr+ModeIDOffset+0x01));
	i=i&DoubleScanMode;
	if(i) data=data|0x80;
	SetReg1(P3d4,0x09,data);

	if(ModeType>0x03) SetReg1(P3d4,0x14,0x4F);
}

VOID SetCRT1Offset(ULONG ROMAddr)
{
	USHORT temp,ah,al;
	USHORT temp2,i;
	USHORT DisplayUnit;

	temp=*((UCHAR *)(ROMAddr+ModeIDOffset+0x03));		// si+Ext_ModeInfo
	temp=temp>>4;										// index
	ScreenOffset=*((USHORT *)(ROMAddr+0x206));			// ScreenOffset
	temp=*((UCHAR *)(ROMAddr+ScreenOffset+temp));		// data

	temp2=*((USHORT *)(ROMAddr+REFIndex+0x00));
	temp2=temp2&InterlaceMode;
	if(temp2) temp=temp<<1;
	temp2=ModeType-ModeEGA;
	switch (temp2) {
		case 0 : temp2=1; break;
		case 1 : temp2=2; break;
		case 2 : temp2=4; break;
		case 3 : temp2=4; break;
		case 4 : temp2=6; break;
		case 5 : temp2=8; break;
	}
	temp=temp*temp2;
	DisplayUnit=temp;

	temp2=temp;
	temp=temp>>8;		
	temp=temp&0x0F;
	i=GetReg1(P3c4,0x0E);
	i=i&0xF0;
	i=i|temp;
	SetReg1(P3c4,0x0E,i);

	temp=(UCHAR)temp2;
	temp=temp&0xFF;		
	SetReg1(P3d4,0x13,temp);

	temp2=*((USHORT *)(ROMAddr+REFIndex+0x00));
	temp2=temp2&InterlaceMode;
	if(temp2) DisplayUnit>>=1;

	DisplayUnit=DisplayUnit<<5;
	ah=(DisplayUnit&0xff00)>>8;
	al=DisplayUnit&0x00ff;
	if(al==0) ah=ah+1;
	else ah=ah+2;
	SetReg1(P3c4,0x10,ah);
}


VOID SetCRT1VCLK(PHW_DEVICE_EXTENSION HwDeviceExtension, ULONG ROMAddr)
{
	USHORT i;
	UCHAR  index,data;

	index=*((UCHAR *)(ROMAddr+REFIndex+0x03));
	index=index&0x03F;
	CRT1VCLKLen=GetVCLKLen(ROMAddr);
	data=index*CRT1VCLKLen;
	VCLKData=*((USHORT *)(ROMAddr+0x208));