📄 pci.c
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* The architecture-dependent code can tweak these, of course. */static void pci_read_irq(struct pci_dev *dev){ unsigned char irq; pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq); if (irq) pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq); dev->irq = irq;}/* * Fill in class and map information of a device */int pci_setup_device(struct pci_dev * dev){ u32 class; sprintf(dev->slot_name, "%02x:%02x.%d", dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); sprintf(dev->name, "PCI device %04x:%04x", dev->vendor, dev->device); pci_read_config_dword(dev, PCI_CLASS_REVISION, &class); class >>= 8; /* upper 3 bytes */ dev->class = class; class >>= 8; DBG("Found %02x:%02x [%04x/%04x] %06x %02x\n", dev->bus->number, dev->devfn, dev->vendor, dev->device, class, dev->hdr_type); switch (dev->hdr_type) { /* header type */ case PCI_HEADER_TYPE_NORMAL: /* standard header */ if (class == PCI_CLASS_BRIDGE_PCI) goto bad; pci_read_irq(dev); pci_read_bases(dev, 6, PCI_ROM_ADDRESS); pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor); pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device); break; case PCI_HEADER_TYPE_BRIDGE: /* bridge header */ if (class != PCI_CLASS_BRIDGE_PCI) goto bad; pci_read_bases(dev, 2, PCI_ROM_ADDRESS1); break; case PCI_HEADER_TYPE_CARDBUS: /* CardBus bridge header */ if (class != PCI_CLASS_BRIDGE_CARDBUS) goto bad; pci_read_irq(dev); pci_read_bases(dev, 1, 0); pci_read_config_word(dev, PCI_CB_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor); pci_read_config_word(dev, PCI_CB_SUBSYSTEM_ID, &dev->subsystem_device); break; default: /* unknown header */ printk(KERN_ERR "PCI: device %s has unknown header type %02x, ignoring.\n", dev->slot_name, dev->hdr_type); return -1; bad: printk(KERN_ERR "PCI: %s: class %x doesn't match header type %02x. Ignoring class.\n", dev->slot_name, class, dev->hdr_type); dev->class = PCI_CLASS_NOT_DEFINED; } /* We found a fine healthy device, go go go... */ return 0;}/* * Read the config data for a PCI device, sanity-check it * and fill in the dev structure... */static struct pci_dev * __init pci_scan_device(struct pci_dev *temp){ struct pci_dev *dev; u32 l; if (pci_read_config_dword(temp, PCI_VENDOR_ID, &l)) return NULL; /* some broken boards return 0 or ~0 if a slot is empty: */ if (l == 0xffffffff || l == 0x00000000 || l == 0x0000ffff || l == 0xffff0000) return NULL; dev = kmalloc(sizeof(*dev), GFP_KERNEL); if (!dev) return NULL; memcpy(dev, temp, sizeof(*dev)); dev->vendor = l & 0xffff; dev->device = (l >> 16) & 0xffff; /* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer) set this higher, assuming the system even supports it. */ dev->dma_mask = 0xffffffff; if (pci_setup_device(dev) < 0) { kfree(dev); dev = NULL; } return dev;}struct pci_dev * __init pci_scan_slot(struct pci_dev *temp){ struct pci_bus *bus = temp->bus; struct pci_dev *dev; struct pci_dev *first_dev = NULL; int func = 0; int is_multi = 0; u8 hdr_type; for (func = 0; func < 8; func++, temp->devfn++) { if (func && !is_multi) /* not a multi-function device */ continue; if (pci_read_config_byte(temp, PCI_HEADER_TYPE, &hdr_type)) continue; temp->hdr_type = hdr_type & 0x7f; dev = pci_scan_device(temp); if (!dev) continue; pci_name_device(dev); if (!func) { is_multi = hdr_type & 0x80; first_dev = dev; } /* * Link the device to both the global PCI device chain and * the per-bus list of devices. */ list_add_tail(&dev->global_list, &pci_devices); list_add_tail(&dev->bus_list, &bus->devices); /* Fix up broken headers */ pci_fixup_device(PCI_FIXUP_HEADER, dev); } return first_dev;}static unsigned int __init pci_do_scan_bus(struct pci_bus *bus){ unsigned int devfn, max, pass; struct list_head *ln; struct pci_dev *dev, dev0; DBG("Scanning bus %02x\n", bus->number); max = bus->secondary; /* Create a device template */ memset(&dev0, 0, sizeof(dev0)); dev0.bus = bus; dev0.sysdata = bus->sysdata; /* Go find them, Rover! */ for (devfn = 0; devfn < 0x100; devfn += 8) { dev0.devfn = devfn; pci_scan_slot(&dev0); } /* * After performing arch-dependent fixup of the bus, look behind * all PCI-to-PCI bridges on this bus. */ DBG("Fixups for bus %02x\n", bus->number); pcibios_fixup_bus(bus); for (pass=0; pass < 2; pass++) for (ln=bus->devices.next; ln != &bus->devices; ln=ln->next) { dev = pci_dev_b(ln); if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) max = pci_scan_bridge(bus, dev, max, pass); } /* * We've scanned the bus and so we know all about what's on * the other side of any bridges that may be on this bus plus * any devices. * * Return how far we've got finding sub-buses. */ DBG("Bus scan for %02x returning with max=%02x\n", bus->number, max); return max;}int __init pci_bus_exists(const struct list_head *list, int nr){ const struct list_head *l; for(l=list->next; l != list; l = l->next) { const struct pci_bus *b = pci_bus_b(l); if (b->number == nr || pci_bus_exists(&b->children, nr)) return 1; } return 0;}struct pci_bus * __init pci_alloc_primary_bus(int bus){ struct pci_bus *b; if (pci_bus_exists(&pci_root_buses, bus)) { /* If we already got to this bus through a different bridge, ignore it */ DBG("PCI: Bus %02x already known\n", bus); return NULL; } b = pci_alloc_bus(); list_add_tail(&b->node, &pci_root_buses); b->number = b->secondary = bus; b->resource[0] = &ioport_resource; b->resource[1] = &iomem_resource; return b;}struct pci_bus * __init pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata){ struct pci_bus *b = pci_alloc_primary_bus(bus); if (b) { b->sysdata = sysdata; b->ops = ops; b->subordinate = pci_do_scan_bus(b); } return b;}#ifdef CONFIG_PM/* * PCI Power management.. * * This needs to be done centralized, so that we power manage PCI * devices in the right order: we should not shut down PCI bridges * before we've shut down the devices behind them, and we should * not wake up devices before we've woken up the bridge to the * device.. Eh? * * We do not touch devices that don't have a driver that exports * a suspend/resume function. That is just too dangerous. If the default * PCI suspend/resume functions work for a device, the driver can * easily implement them (ie just have a suspend function that calls * the pci_set_power_state() function). */static int pci_pm_suspend_device(struct pci_dev *dev){ if (dev) { struct pci_driver *driver = dev->driver; if (driver && driver->suspend) driver->suspend(dev); } return 0;}static int pci_pm_resume_device(struct pci_dev *dev){ if (dev) { struct pci_driver *driver = dev->driver; if (driver && driver->resume) driver->resume(dev); } return 0;}/* take care to suspend/resume bridges only once */static int pci_pm_suspend_bus(struct pci_bus *bus){ struct list_head *list; /* Walk the bus children list */ list_for_each(list, &bus->children) pci_pm_suspend_bus(pci_bus_b(list)); /* Walk the device children list */ list_for_each(list, &bus->devices) pci_pm_suspend_device(pci_dev_b(list)); return 0;}static int pci_pm_resume_bus(struct pci_bus *bus){ struct list_head *list; /* Walk the device children list */ list_for_each(list, &bus->devices) pci_pm_resume_device(pci_dev_b(list)); /* And then walk the bus children */ list_for_each(list, &bus->children) pci_pm_resume_bus(pci_bus_b(list)); return 0;}static int pci_pm_suspend(void){ struct list_head *list; struct pci_bus *bus; list_for_each(list, &pci_root_buses) { bus = pci_bus_b(list); pci_pm_suspend_bus(bus); pci_pm_suspend_device(bus->self); } return 0;}static int pci_pm_resume(void){ struct list_head *list; struct pci_bus *bus; list_for_each(list, &pci_root_buses) { bus = pci_bus_b(list); pci_pm_resume_device(bus->self); pci_pm_resume_bus(bus); } return 0;}static int pci_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data){ switch (rqst) { case PM_SUSPEND: return pci_pm_suspend(); case PM_RESUME: return pci_pm_resume(); } return 0;}#endifvoid __init pci_init(void){ struct pci_dev *dev; pcibios_init(); pci_for_each_dev(dev) { pci_fixup_device(PCI_FIXUP_FINAL, dev); }#ifdef CONFIG_PM pm_register(PM_PCI_DEV, 0, pci_pm_callback);#endif}static int __init pci_setup(char *str){ while (str) { char *k = strchr(str, ','); if (k) *k++ = 0; if (*str && (str = pcibios_setup(str)) && *str) { /* PCI layer options should be handled here */ printk(KERN_ERR "PCI: Unknown option `%s'\n", str); } str = k; } return 1;}__setup("pci=", pci_setup);EXPORT_SYMBOL(pci_read_config_byte);EXPORT_SYMBOL(pci_read_config_word);EXPORT_SYMBOL(pci_read_config_dword);EXPORT_SYMBOL(pci_write_config_byte);EXPORT_SYMBOL(pci_write_config_word);EXPORT_SYMBOL(pci_write_config_dword);EXPORT_SYMBOL(pci_devices);EXPORT_SYMBOL(pci_root_buses);EXPORT_SYMBOL(pci_enable_device);EXPORT_SYMBOL(pci_find_capability);EXPORT_SYMBOL(pci_find_class);EXPORT_SYMBOL(pci_find_device);EXPORT_SYMBOL(pci_find_slot);EXPORT_SYMBOL(pci_find_subsys);EXPORT_SYMBOL(pci_set_master);EXPORT_SYMBOL(pci_set_power_state);EXPORT_SYMBOL(pci_assign_resource);EXPORT_SYMBOL(pci_register_driver);EXPORT_SYMBOL(pci_unregister_driver);EXPORT_SYMBOL(pci_dev_driver);EXPORT_SYMBOL(pci_match_device);EXPORT_SYMBOL(pci_find_parent_resource);#ifdef CONFIG_HOTPLUGEXPORT_SYMBOL(pci_setup_device);EXPORT_SYMBOL(pci_insert_device);EXPORT_SYMBOL(pci_remove_device);#endif/* Obsolete functions */EXPORT_SYMBOL(pcibios_present);EXPORT_SYMBOL(pcibios_read_config_byte);EXPORT_SYMBOL(pcibios_read_config_word);EXPORT_SYMBOL(pcibios_read_config_dword);EXPORT_SYMBOL(pcibios_write_config_byte);EXPORT_SYMBOL(pcibios_write_config_word);EXPORT_SYMBOL(pcibios_write_config_dword);EXPORT_SYMBOL(pcibios_find_class);EXPORT_SYMBOL(pcibios_find_device);/* Quirk info */EXPORT_SYMBOL(isa_dma_bridge_buggy);EXPORT_SYMBOL(pci_pci_problems);
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