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32: putc ' ' dbra %d2,32b jbra 3b11: putc '\n' jbra 1b#endif /* MMU 040 Dumping code that's gory and detailed */ lea %pc@(SYMBOL_NAME(kernel_pg_dir)),%a5 movel %a5,%a0 /* a0 has the address of the root table ptr */ movel #0x00000000,%a4 /* logical address */ moveql #0,%d040: /* Increment the logical address and preserve in d5 */ movel %a4,%d5 addil #PAGESIZE<<13,%d5 movel %a0@+,%d6 btst #1,%d6 jbne 41f jbsr mmu_print_tuple_invalidate jbra 48f41: movel #0,%d1 andil #0xfffffe00,%d6 movel %d6,%a142: movel %a4,%d5 addil #PAGESIZE<<6,%d5 movel %a1@+,%d6 btst #1,%d6 jbne 43f jbsr mmu_print_tuple_invalidate jbra 47f43: movel #0,%d2 andil #0xffffff00,%d6 movel %d6,%a244: movel %a4,%d5 addil #PAGESIZE,%d5 movel %a2@+,%d6 btst #0,%d6 jbne 45f jbsr mmu_print_tuple_invalidate jbra 46f45: moveml %d0-%d1,%sp@- movel %a4,%d0 movel %d6,%d1 andil #0xfffff4e0,%d1 lea %pc@(mmu_040_print_flags),%a6 jbsr mmu_print_tuple moveml %sp@+,%d0-%d146: movel %d5,%a4 addq #1,%d2 cmpib #64,%d2 jbne 44b47: movel %d5,%a4 addq #1,%d1 cmpib #128,%d1 jbne 42b48: movel %d5,%a4 /* move to the next logical address */ addq #1,%d0 cmpib #128,%d0 jbne 40b .chip 68040 movec %dtt1,%d0 movel %d0,%d1 andiw #0x8000,%d1 /* is it valid ? */ jbeq 1f /* No, bail out */ movel %d0,%d1 andil #0xff000000,%d1 /* Get the address */ putn %d1 puts "==" putn %d1 movel %d0,%d6 jbsr mmu_040_print_flags_tt1: movec %dtt0,%d0 movel %d0,%d1 andiw #0x8000,%d1 /* is it valid ? */ jbeq 1f /* No, bail out */ movel %d0,%d1 andil #0xff000000,%d1 /* Get the address */ putn %d1 puts "==" putn %d1 movel %d0,%d6 jbsr mmu_040_print_flags_tt1: .chip 68k jbra mmu_print_donemmu_040_print_flags: btstl #10,%d6 putZc(' ','G') /* global bit */ btstl #7,%d6 putZc(' ','S') /* supervisor bit */mmu_040_print_flags_tt: btstl #6,%d6 jbne 3f putc 'C' btstl #5,%d6 putZc('w','c') /* write through or copy-back */ jbra 4f3: putc 'N' btstl #5,%d6 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */4: rtsmmu_030_print_flags: btstl #6,%d6 putZc('C','I') /* write through or copy-back */ rtsmmu_030_print: puts "\nMMU030\n" puts "\nrp:" putn %a5 putc '\n' movel %a5,%d0 andil #0xfffffff0,%d0 movel %d0,%a0 movel #0x00000000,%a4 /* logical address */ movel #0,%d030: movel %a4,%d5 addil #PAGESIZE<<13,%d5 movel %a0@+,%d6 btst #1,%d6 /* is it a ptr? */ jbne 31f /* yes */ btst #0,%d6 /* is it early terminating? */ jbeq 1f /* no */ jbsr mmu_030_print_helper jbra 38f1: jbsr mmu_print_tuple_invalidate jbra 38f31: movel #0,%d1 andil #0xfffffff0,%d6 movel %d6,%a132: movel %a4,%d5 addil #PAGESIZE<<6,%d5 movel %a1@+,%d6 btst #1,%d6 jbne 33f btst #0,%d6 jbeq 1f /* no */ jbsr mmu_030_print_helper jbra 37f1: jbsr mmu_print_tuple_invalidate jbra 37f33: movel #0,%d2 andil #0xfffffff0,%d6 movel %d6,%a234: movel %a4,%d5 addil #PAGESIZE,%d5 movel %a2@+,%d6 btst #0,%d6 jbne 35f jbsr mmu_print_tuple_invalidate jbra 36f35: jbsr mmu_030_print_helper36: movel %d5,%a4 addq #1,%d2 cmpib #64,%d2 jbne 34b37: movel %d5,%a4 addq #1,%d1 cmpib #128,%d1 jbne 32b38: movel %d5,%a4 /* move to the next logical address */ addq #1,%d0 cmpib #128,%d0 jbne 30bmmu_print_done: puts "\n\n"func_return mmu_printmmu_030_print_helper: moveml %d0-%d1,%sp@- movel %a4,%d0 movel %d6,%d1 lea %pc@(mmu_030_print_flags),%a6 jbsr mmu_print_tuple moveml %sp@+,%d0-%d1 rtsmmu_print_tuple_invalidate: moveml %a0/%d7,%sp@- lea %pc@(L(mmu_print_data)),%a0 tstl %a0@(mmu_next_valid) jbmi mmu_print_tuple_invalidate_exit movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid) putn %a4 puts "##\n"mmu_print_tuple_invalidate_exit: moveml %sp@+,%a0/%d7 rtsmmu_print_tuple: moveml %d0-%d7/%a0,%sp@- lea %pc@(L(mmu_print_data)),%a0 tstl %a0@(mmu_next_valid) jble mmu_print_tuple_print cmpl %a0@(mmu_next_physical),%d1 jbeq mmu_print_tuple_incrementmmu_print_tuple_print: putn %d0 puts "->" putn %d1 movel %d1,%d6 jbsr %a6@mmu_print_tuple_record: movel #MMU_PRINT_VALID,%a0@(mmu_next_valid) movel %d1,%a0@(mmu_next_physical)mmu_print_tuple_increment: movel %d5,%d7 subl %a4,%d7 addl %d7,%a0@(mmu_next_physical)mmu_print_tuple_exit: moveml %sp@+,%d0-%d7/%a0 rtsmmu_print_machine_cpu_types: puts "machine: " is_not_amiga(1f) puts "amiga" jbra 9f1: is_not_atari(2f) puts "atari" jbra 9f2: is_not_mac(3f) puts "macintosh" jbra 9f3: puts "unknown"9: putc '\n' puts "cputype: 0" is_not_060(1f) putc '6' jbra 9f1: is_not_040_or_060(2f) putc '4' jbra 9f2: putc '3'9: putc '0' putc '\n' rts#endif /* MMU_PRINT *//* * mmu_map_tt * * This is a specific function which works on all 680x0 machines. * On 030, 040 & 060 it will attempt to use Transparent Translation * registers (tt1). * On 020 it will call the standard mmu_map which will use early * terminating descriptors. */func_start mmu_map_tt,%d0/%d1/%a0,4 dputs "mmu_map_tt:" dputn ARG1 dputn ARG2 dputn ARG3 dputn ARG4 dputc '\n' is_020(L(do_map)) /* Extract the highest bit set */ bfffo ARG3{#0,#32},%d1 cmpw #8,%d1 jcc L(do_map) /* And get the mask */ moveq #-1,%d0 lsrl %d1,%d0 lsrl #1,%d0 /* Mask the address */ movel %d0,%d1 notl %d1 andl ARG2,%d1 /* Generate the upper 16bit of the tt register */ lsrl #8,%d0 orl %d0,%d1 clrw %d1 is_040_or_060(L(mmu_map_tt_040)) /* set 030 specific bits (read/write access for supervisor mode * (highest function code set, lower two bits masked)) */ orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1 movel ARG4,%d0 btst #6,%d0 jeq 1f orw #TTR_CI,%d11: lea STACK,%a0 dputn %d1 movel %d1,%a0@ .chip 68030 tstl ARG1 jne 1f pmove %a0@,%tt0 jra 2f1: pmove %a0@,%tt12: .chip 68k jra L(mmu_map_tt_done) /* set 040 specific bits */L(mmu_map_tt_040): orw #TTR_ENABLE+TTR_KERNELMODE,%d1 orl ARG4,%d1 dputn %d1 .chip 68040 tstl ARG1 jne 1f movec %d1,%itt0 movec %d1,%dtt0 jra 2f1: movec %d1,%itt1 movec %d1,%dtt12: .chip 68k jra L(mmu_map_tt_done)L(do_map): mmu_map_eq ARG2,ARG3,ARG4L(mmu_map_tt_done):func_return mmu_map_tt/* * mmu_map * * This routine will map a range of memory using a pointer * table and allocating the pages on the fly from the kernel. * The pointer table does not have to be already linked into * the root table, this routine will do that if necessary. * * NOTE * This routine will assert failure and use the serial_putc * routines in the case of a run-time error. For example, * if the address is already mapped. * * NOTE-2 * This routine will use early terminating descriptors * where possible for the 68020+68851 and 68030 type * processors. */func_start mmu_map,%d0-%d4/%a0-%a4 dputs "\nmmu_map:" dputn ARG1 dputn ARG2 dputn ARG3 dputn ARG4 dputc '\n' /* Get logical address and round it down to 256KB */ movel ARG1,%d0 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0 movel %d0,%a3 /* Get the end address */ movel ARG1,%a4 addl ARG3,%a4 subql #1,%a4 /* Get physical address and round it down to 256KB */ movel ARG2,%d0 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0 movel %d0,%a2 /* Add page attributes to the physical address */ movel ARG4,%d0 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0 addw %d0,%a2 dputn %a2 dputn %a3 dputn %a4 is_not_040_or_060(L(mmu_map_030)) addw #_PAGE_GLOBAL040,%a2/* * MMU 040 & 060 Support * * The MMU usage for the 040 and 060 is different enough from * the 030 and 68851 that there is separate code. This comment * block describes the data structures and algorithms built by * this code. * * The 040 does not support early terminating descriptors, as * the 030 does. Therefore, a third level of table is needed * for the 040, and that would be the page table. In Linux, * page tables are allocated directly from the memory above the * kernel. * */L(mmu_map_040): /* Calculate the offset into the root table */ movel %a3,%d0 moveq #ROOT_INDEX_SHIFT,%d1 lsrl %d1,%d0 mmu_get_root_table_entry %d0 /* Calculate the offset into the pointer table */ movel %a3,%d0 moveq #PTR_INDEX_SHIFT,%d1 lsrl %d1,%d0 andl #PTR_TABLE_SIZE-1,%d0 mmu_get_ptr_table_entry %a0,%d0 /* Calculate the offset into the page table */ movel %a3,%d0 moveq #PAGE_INDEX_SHIFT,%d1 lsrl %d1,%d0 andl #PAGE_TABLE_SIZE-1,%d0 mmu_get_page_table_entry %a0,%d0 /* The page table entry must not no be busy */ tstl %a0@ jne L(mmu_map_error) /* Do the mapping and advance the pointers */ movel %a2,%a0@2: addw #PAGESIZE,%a2 addw #PAGESIZE,%a3 /* Ready with mapping? */ lea %a3@(-1),%a0 cmpl %a0,%a4 jhi L(mmu_map_040) jra L(mmu_map_done)L(mmu_map_030): /* Calculate the offset into the root table */ movel %a3,%d0 moveq #ROOT_INDEX_SHIFT,%d1 lsrl %d1,%d0 mmu_get_root_table_entry %d0 /* Check if logical address 32MB aligned, * so we can try to map it once */ movel %a3,%d0 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0 jne 1f /* Is there enough to map for 32MB at once */ lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1 cmpl %a1,%a4 jcs 1f addql #1,%a1 /* The root table entry must not no be busy */ tstl %a0@ jne L(mmu_map_error) /* Do the mapping and advance the pointers */ dputs "early term1" dputn %a2 dputn %a3 dputn %a1 dputc '\n' movel %a2,%a0@ movel %a1,%a3
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