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📄 hwctxt.cpp

📁 SBC2410 WinCE 5.0 BSP.绝大多数驱动已经调通。
💻 CPP
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    m_Input_pbDMA_PAGES[1]  = pTemp + 3*AUDIO_DMA_PAGE_SIZE;

    return(TRUE);
	
MAP_ERROR:
	if(pTemp)
	{
		VirtualFree(pTemp, 0, MEM_RELEASE);
	}

	return(FALSE);
}



/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		UnmapDMABuffers()

Description:	Unmaps the DMA buffers used for audio input/output
				on the I2S bus.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::UnmapDMABuffers()
{
	if(m_Output_pbDMA_PAGES[0])
	{
		VirtualFree((PVOID)m_Output_pbDMA_PAGES[0], 0, MEM_RELEASE);
	}

	return TRUE;
}

BOOL HardwareContext::Codec_channel()
{
    //****** Port B Initialize *****
    g_pIOPregs->rGPBDAT |= L3M|L3C;	//start condition : L3M=H, L3C=H
    g_pIOPregs->rGPBUP  |= 0x1c;	//pull-up disable
    g_pIOPregs->rGPBCON = ((g_pIOPregs->rGPBCON & 0x3ffc0f) | 0x000150);
	
	_WrL3Addr(0x14+2); //STATUS (000101xx+10)    
	if( m_InputDMARunning & m_OutputDMARunning )
	    _WrL3Data(0xa3,0); //1,0,1,0,0,0,11	: OGS=0,IGS=1,ADC_NI,DAC_NI,sngl speed,AoffDon
	else if( m_InputDMARunning )
		_WrL3Data(0xa2,0); //1,0,1,0,0,0,10	: OGS=0,IGS=1,ADC_NI,DAC_NI,sngl speed,AoffDon
	else if( m_OutputDMARunning )
		_WrL3Data(0xa1,0); //1,0,1,0,0,0,01	: OGS=0,IGS=1,ADC_NI,DAC_NI,sngl speed,AoffDon
	else
    	_WrL3Data(0xa0,0); //1,0,1,0,0,0,00	: OGS=0,IGS=1,ADC_NI,DAC_NI,sngl speed,AoffDon

    return(TRUE);
}

/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		InitCodec()

Description:	Initializes the audio codec chip.

Notes:			The audio codec chip is intialized for output mode
				but powered down.  To conserve battery life, the chip
				is only powered up when the user starts playing a 
				file.

				Specifically, the powerup/powerdown logic is done 
				in the AudioMute() function.  If either of the 
				audio channels are unmuted, then the chip is powered
				up; otherwise the chip is powered own.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::InitCodec()
{
	
	DEBUGMSG(1, (TEXT("+++InitCodec\n")));
	
    //****** Port B Initialize *****
    g_pIOPregs->rGPBDAT |= L3M|L3C;	//start condition : L3M=H, L3C=H
    g_pIOPregs->rGPBUP  |= 0x1c;	//pull-up disable
    g_pIOPregs->rGPBCON = ((g_pIOPregs->rGPBCON & 0x3ffc0f) | 0x000150);
	
    /****** L3 Interface ******/
#if (AUDIO_CODEC_CLOCK == 256)		// test value
	RETAILMSG(1,(TEXT("256 clock\n")));
    _WrL3Addr(0x14+2); //STATUS (000101xx+10)
    _WrL3Data(0x60,0); //0,1,10,000,0	: reset,256fs,no DCfilter,iis

    _WrL3Addr(0x14+2); //STATUS (000101xx+10)
    _WrL3Data(0x20,0); //0,0,10,000,0	: no reset,256fs,no DCfilter,iis
    
    _WrL3Addr(0x14+2); //STATUS (000101xx+10)
    _WrL3Data(0xa1,0); //1,0,0,0,0,0,01	: OGS=0,IGS=0,ADC_NI,DAC_NI,sngl speed,AoffDon
#else
	RETAILMSG(1,(TEXT("384 clock\n")));
    _WrL3Addr(0x14+2); //STATUS (000101xx+10)
    _WrL3Data(0x50,0); //0,1,01,000,0	: reset,384fs,no DCfilter,iis

    _WrL3Addr(0x14+2); //STATUS (000101xx+10)
    _WrL3Data(0x10,0); //0,0,01,000,0	: no reset,384fs,no DCfilter,iis
    
    _WrL3Addr(0x14+2); //STATUS (000101xx+10)
    _WrL3Data(0xa1,0); ///1,0,1,0,0,0,01	: OGS=0,IGS=1,ADC_NI,DAC_NI,sngl speed,AoffDon
#endif
	_WrL3Addr(0x14 + 0);     //DATA0 (000101xx+00)
	_WrL3Data(0xc2,0);       //11000,010  : DATA0, Extended addr(010) 
	_WrL3Data(0x4d,0);       //010,011,01 : DATA0, MS=9dB, Ch1=on Ch2=off, 

	return(TRUE);
}



/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		InitOutputDMA()

Description:	Initializes the DMA channel for output.

Notes:			DMA Channel 2 is used for transmitting output sound
				data from system memory to the I2S controller.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::InitOutputDMA()
{
	
	//----- 1. Initialize the DMA channel for output mode and use the first output DMA buffer -----
    g_pDMAregs->rDISRC2	= (int)(AUDIO_DMA_BUFFER_PHYS); 
    g_pDMAregs->rDISRCC2 &= ~(SOURCE_PERIPHERAL_BUS | FIXED_SOURCE_ADDRESS);				// Source is system bus, increment addr

    //----- 2. Initialize the DMA channel to send data over the I2S bus -----
    g_pDMAregs->rDIDST2	= (int)IISFIF_PHYS; 
    g_pDMAregs->rDIDSTC2 |= (DESTINATION_PERIPHERAL_BUS | FIXED_DESTINATION_ADDRESS);	// Dest is  periperal bus, fixed addr

	//----- 3. Configure the DMA channel's transfer characteristics: handshake, sync PCLK, interrupt, -----
	//		   single tx, single service, I2SSDO, I2S request, no auto-reload, half-word, tx count
	g_pDMAregs->rDCON2	= (  HANDSHAKE_MODE | GENERATE_INTERRUPT | I2SSDO_DMA2 | DMA_TRIGGERED_BY_HARDWARE 
#if	DMA_FLAG
						   | TRANSFER_HALF_WORD | (AUDIO_DMA_PAGE_SIZE / 2 ) );
#else						   
						   | NO_DMA_AUTO_RELOAD | TRANSFER_HALF_WORD | (AUDIO_DMA_PAGE_SIZE / 2) );
#endif						   
	
	//----- 4. Reset the playback pointers -----
	AUDIO_RESET_PLAYBACK_POINTER();
	
	DEBUGMSG(1,(TEXT("---InitOutputDMA\n")));

	return TRUE;
}


/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		StartOutputDMA()

Description:	Starts outputting the sound data to the audio codec
				chip via DMA.

Notes:			Currently, both playback and record share the same
				DMA channel.  Consequently, we can only start this
				operation if the input channel isn't using DMA.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::StartOutputDMA()
{
	DEBUGMSG(1,(TEXT("+++StartOutputDMA\n")));
	
    if(!m_OutputDMARunning)
    {
        //----- 1. Initialize our buffer counters -----
        m_OutputDMARunning=TRUE;
        m_OutBytes[OUT_BUFFER_A]=m_OutBytes[OUT_BUFFER_B]=0;

        //----- 2. Prime the output buffer with sound data -----
		m_OutputDMAStatus = (DMA_DONEA | DMA_DONEB) & ~DMA_BIU;	
		ULONG OutputTransferred = TransferOutputBuffers(m_OutputDMAStatus);
        
		//----- 3. If we did transfer any data to the DMA buffers, go ahead and enable DMA -----
		if(OutputTransferred)
        {
			//----- 4. Configure the DMA channel for playback -----
			if(!InitOutputDMA())
			{
				DEBUGMSG(ZONE_ERROR, (TEXT("HardwareContext::StartOutputDMA() - Unable to initialize output DMA channel!\r\n")));
				goto START_ERROR;
			}
			g_pIISregs->rIISCON |= TRANSMIT_DMA_REQUEST_ENABLE;
			g_pIISregs->rIISCON &= ~TRANSMIT_IDLE_CMD;
			g_pIISregs->rIISFCON |= (  TRANSMIT_FIFO_ACCESS_DMA | TRANSMIT_FIFO_ENABLE  );
			g_pIISregs->rIISMOD  |= IIS_TRANSMIT_MODE;
			//----- 5. Make sure the audio isn't muted -----
			AudioMute(DMA_CH_OUT, FALSE);					

			//----- 6. Start the DMA controller -----
			AUDIO_RESET_PLAYBACK_POINTER();
			SELECT_AUDIO_DMA_OUTPUT_BUFFER_A();
			Codec_channel();								// Turn ON output channel
			// charlie, start A buffer
			AUDIO_OUT_DMA_ENABLE();
#if DMA_FLAG			
	        // wait for DMA to start.
	        while((g_pDMAregs->rDSTAT2&0xfffff)==0);        
	        // change the buffer pointer
	        SELECT_AUDIO_DMA_OUTPUT_BUFFER_B();
	        // Set DMA for B Buffer
#endif	        
        }
        else    // We didn't transfer any data, so DMA wasn't enabled
        {
            m_OutputDMARunning=FALSE;
        }
    }
    
    DEBUGMSG(1,(TEXT("---StartOutputDMA\n")));

	return TRUE;

START_ERROR:
	return FALSE;
}

/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		StopOutputDMA()

Description:	Stops any DMA activity on the output channel.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
void HardwareContext::StopOutputDMA()
{
	//----- 1. If the output DMA is running, stop it -----
    if (m_OutputDMARunning)
	{
		m_OutputDMAStatus = DMA_CLEAR;				
		AUDIO_OUT_DMA_DISABLE();
		AUDIO_OUT_CLEAR_INTERRUPTS();
		g_pIISregs->rIISCON &= ~TRANSMIT_DMA_REQUEST_ENABLE;
		g_pIISregs->rIISCON |= TRANSMIT_IDLE_CMD;
		g_pIISregs->rIISFCON &= ~(  TRANSMIT_FIFO_ACCESS_DMA | TRANSMIT_FIFO_ENABLE  );
		g_pIISregs->rIISMOD  &= ~IIS_TRANSMIT_MODE;
		AudioMute(DMA_CH_OUT, TRUE);		
    }

	m_OutputDMARunning = FALSE;
	Codec_channel();
}


/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		InitInputDMA()

Description:	Initializes the DMA channel for input.

Notes:			***** NOT IMPLEMENTED *****

				The following routine is not implemented due to a
				hardware bug in the revision of the Samsung SC2410
				CPU this driver was developed on.  See the header
				at the top of this file for details.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::InitInputDMA()
{

	DEBUGMSG(1,(TEXT("+++InitInputDMA\n")));
	//============================ Configure DMA Channel 1 ===========================
	//------ On platforms with the revsion of the Samsung SC2410 CPU with the IIS SLAVE bug fix, this -----
	//		 code can be used to configure DMA channel 1 for input.

	//----- 1. Initialize the DMA channel for input mode and use the first input DMA buffer -----
	g_pDMAregs->rDISRC1	= (int)IISFIF_PHYS;	
	g_pDMAregs->rDISRCC1 = (SOURCE_PERIPHERAL_BUS | FIXED_SOURCE_ADDRESS);				// Source is periperal bus, fixed addr
    
    //----- 2. Initialize the DMA channel to receive data over the I2S bus -----
    g_pDMAregs->rDIDST1	= (int)(AUDIO_DMA_BUFFER_PHYS); 
    g_pDMAregs->rDIDSTC1 &= ~(DESTINATION_PERIPHERAL_BUS | FIXED_DESTINATION_ADDRESS);	// Destination is system bus, increment addr

	//----- 3. Configure the DMA channel's transfer characteristics: handshake, sync PCLK, interrupt, -----
	//		   single tx, single service, I2SSDI, I2S request, no auto-reload, half-word, tx count
	g_pDMAregs->rDCON1	= (  HANDSHAKE_MODE | GENERATE_INTERRUPT | I2SSDI_DMA1 | DMA_TRIGGERED_BY_HARDWARE 
#if DMA_FLAG	
						   | TRANSFER_HALF_WORD | (AUDIO_DMA_PAGE_SIZE / 2) );						   
#else						   
						   | NO_DMA_AUTO_RELOAD | TRANSFER_HALF_WORD | (AUDIO_DMA_PAGE_SIZE / 2) );
#endif						   

	return(TRUE);
}


/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		StartInputDMA()

Description:	Starts inputting the recorded sound data from the 
				audio codec chip via DMA.

Notes:			***** NOT IMPLEMENTED *****

				The following routine is not implemented due to a
				hardware bug in the revision of the Samsung SC2410
				CPU this driver was developed on.  See the header
				at the top of this file for details.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
BOOL HardwareContext::StartInputDMA()
{
	
	//------ On platforms with the revsion of the Samsung SC2410 CPU with the IIS SLAVE bug fix, this -----
	//		 code can be used to configure DMA channel 1 for input.

	DEBUGMSG(1,(TEXT("+++StartInputDMA\n")));

	if(!m_InputDMARunning)
    {
        //----- 1. Initialize our buffer counters -----
        m_InputDMARunning=TRUE;
		Codec_channel();        // Turn On Input channel
        m_InBytes[IN_BUFFER_A]=m_InBytes[IN_BUFFER_B]=0;

        //----- 2. Prime the output buffer with sound data -----
		m_InputDMAStatus = (DMA_DONEA | DMA_DONEB) & ~DMA_BIU;	

		//----- 3. Configure the DMA channel for record -----
		if(!InitInputDMA())
		{
			DEBUGMSG(ZONE_ERROR, (TEXT("HardwareContext::StartInputDMA() - Unable to initialize input DMA channel!\r\n")));
			goto START_ERROR;
		}
		g_pIISregs->rIISFCON |= (RECEIVE_FIFO_ACCESS_DMA  | RECEIVE_FIFO_ENABLE);
		g_pIISregs->rIISCON  |= RECEIVE_DMA_REQUEST_ENABLE;	 
		g_pIISregs->rIISMOD  |= IIS_RECEIVE_MODE;
	
		//----- 4. Make sure the audio isn't muted -----
		AudioMute(DMA_CH_MIC, FALSE);					

		//----- 5. Start the input DMA -----
		AUDIO_RESET_RECORD_POINTER();
		SELECT_AUDIO_DMA_INPUT_BUFFER_A();

		Codec_channel();        // Turn On Input channel
		g_pDMAregs->rDMASKTRIG1 = ENABLE_DMA_CHANNEL;		
		
#if DMA_FLAG			
        // wait for DMA to start.
        while((g_pDMAregs->rDSTAT1&0xfffff)==0);        
        // change the buffer pointer
        SELECT_AUDIO_DMA_INPUT_BUFFER_B();
#endif	        
				
    }
    DEBUGMSG(1,(TEXT("---StartInputDMA\n")));
	return(TRUE);

START_ERROR:
	return(FALSE);
}


/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		StopInputDMA()

Description:	Stops any DMA activity on the input channel.

Notes:			***** NOT IMPLEMENTED *****

				The following routine is not implemented due to a
				hardware bug in the revision of the Samsung SC2410
				CPU this driver was developed on.  See the header
				at the top of this file for details.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/
void HardwareContext::StopInputDMA()
{

	//------ On platforms with the revsion of the Samsung SC2410 CPU with the IIS SLAVE bug fix, this -----
	//		 code can be used to configure DMA channel 1 for input.

	//----- 1. If the output DMA is running, stop it -----
    if (m_InputDMARunning)
	{
		m_InputDMAStatus = DMA_CLEAR;				
		
		g_pIISregs->rIISCON &= ~RECEIVE_DMA_REQUEST_ENABLE;
		g_pIISregs->rIISFCON &= ~(RECEIVE_FIFO_ACCESS_DMA  | RECEIVE_FIFO_ENABLE);
		g_pDMAregs->rDMASKTRIG1 |= STOP_DMA_TRANSFER;
		g_pDMAregs->rDMASKTRIG1 &= ~ENABLE_DMA_CHANNEL;
		g_pIISregs->rIISMOD  &= ~IIS_RECEIVE_MODE;
		AUDIO_IN_CLEAR_INTERRUPTS();
		AudioMute(DMA_CH_MIC, TRUE);		
    }

	m_InputDMARunning = FALSE;
	Codec_channel();
}


DWORD HardwareContext::GetInterruptThreadPriority()
{
    HKEY hDevKey;
    DWORD dwValType;
    DWORD dwValLen;
    DWORD dwPrio = 249; // Default priority

    hDevKey = OpenDeviceKey((LPWSTR)m_DriverIndex);
    if (hDevKey)
    {
        dwValLen = sizeof(DWORD);
        RegQueryValueEx(
            hDevKey,
            TEXT("Priority256"),
            NULL,
            &dwValType,
            (PUCHAR)&dwPrio,
            &dwValLen);
        RegCloseKey(hDevKey);
    }

    return dwPrio;
}



/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function:		InitInterruptThread()

Description:	Initializes the IST for handling DMA interrupts.

Returns:		Boolean indicating success
-------------------------------------------------------------------*/

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