📄 start390.lst
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0086 +1 269 sbit P4_6 = P4^6;
0085 +1 270 sbit P4_5 = P4^5;
0084 +1 271 sbit P4_4 = P4^4;
0083 +1 272 sbit P4_3 = P4^3;
0082 +1 273 sbit P4_2 = P4^2;
0081 +1 274 sbit P4_1 = P4^1;
0080 +1 275 sbit P4_0 = P4^0;
+1 276
0097 +1 277 sbit P1_7 = P1^7;
0096 +1 278 sbit P1_6 = P1^6;
0095 +1 279 sbit P1_5 = P1^5;
0094 +1 280 sbit P1_4 = P1^4;
0093 +1 281 sbit P1_3 = P1^3;
0092 +1 282 sbit P1_2 = P1^2;
0091 +1 283 sbit P1_1 = P1^1;
0090 +1 284 sbit P1_0 = P1^0;
+1 285
00A7 +1 286 sbit P2_7 = P2^7;
00A6 +1 287 sbit P2_6 = P2^6;
00A5 +1 288 sbit P2_5 = P2^5;
00A4 +1 289 sbit P2_4 = P2^4;
00A3 +1 290 sbit P2_3 = P2^3;
00A2 +1 291 sbit P2_2 = P2^2;
00A1 +1 292 sbit P2_1 = P2^1;
00A0 +1 293 sbit P2_0 = P2^0;
+1 294
00B7 +1 295 sbit P3_7 = P3^7;
00B6 +1 296 sbit P3_6 = P3^6;
00B5 +1 297 sbit P3_5 = P3^5;
00B4 +1 298 sbit P3_4 = P3^4;
00B3 +1 299 sbit P3_3 = P3^3;
00B2 +1 300 sbit P3_2 = P3^2;
00B1 +1 301 sbit P3_1 = P3^1;
00B0 +1 302 sbit P3_0 = P3^0;
+1 303
00D7 +1 304 sbit CY = PSW^7;
00D6 +1 305 sbit AC = PSW^6;
00D5 +1 306 sbit F0 = PSW^5;
00D4 +1 307 sbit RS1 = PSW^4;
00D3 +1 308 sbit RS0 = PSW^3;
00D2 +1 309 sbit OV = PSW^2;
00D1 +1 310 sbit F1 = PSW^1;
00D0 +1 311 sbit P = PSW^0;
+1 312
008F +1 313 sbit TF1 = TCON^7;
008E +1 314 sbit TR1 = TCON^6;
008D +1 315 sbit TF0 = TCON^5;
008C +1 316 sbit TR0 = TCON^4;
008B +1 317 sbit IE1 = TCON^3;
008A +1 318 sbit IT1 = TCON^2;
0089 +1 319 sbit IE0 = TCON^1;
0088 +1 320 sbit IT0 = TCON^0;
+1 321
A51 MACRO ASSEMBLER START390 07/17/2003 18:04:05 PAGE 6
00AF +1 322 sbit EA = IE^7;
00AE +1 323 sbit ES1 = IE^6;
00AD +1 324 sbit ET2 = IE^5;
00AC +1 325 sbit ES0 = IE^4;
00AB +1 326 sbit ET1 = IE^3;
00AA +1 327 sbit EX1 = IE^2;
00A9 +1 328 sbit ET0 = IE^1;
00A8 +1 329 sbit EX0 = IE^0;
+1 330
00BE +1 331 sbit PS1 = IP^6;
00BD +1 332 sbit PT2 = IP^5;
00BC +1 333 sbit PS0 = IP^4;
00BB +1 334 sbit PT1 = IP^3;
00BA +1 335 sbit PX1 = IP^2;
00B9 +1 336 sbit PT0 = IP^1;
00B8 +1 337 sbit PX0 = IP^0;
+1 338
009F +1 339 sbit SM0 = SCON0^7; /* Alternate SM0_FE_0 */
009E +1 340 sbit SM1 = SCON0^6; /* Alternate SM1_0 */
009D +1 341 sbit SM2 = SCON0^5; /* Alternate SM2_0 */
009C +1 342 sbit REN = SCON0^4; /* Alternate REN_0 */
009B +1 343 sbit TB8 = SCON0^3; /* Alternate TB8_0 */
009A +1 344 sbit RB8 = SCON0^2; /* Alternate RB8_0 */
0099 +1 345 sbit TI = SCON0^1; /* Alternate TI_0 */
0098 +1 346 sbit RI = SCON0^0; /* Alternate RI_0 */
+1 347
00C7 +1 348 sbit SM01 = SCON1^7; /* Alternate SM0_FE_1 */
00C6 +1 349 sbit SM11 = SCON1^6; /* Alternate SM1_1 */
00C5 +1 350 sbit SM21 = SCON1^5; /* Alternate SM2_1 */
00C4 +1 351 sbit REN1 = SCON1^4; /* Alternate REN_1 */
00C3 +1 352 sbit TB81 = SCON1^3; /* Alternate TB8_1 */
00C2 +1 353 sbit RB81 = SCON1^2; /* Alternate RB8_1 */
00C1 +1 354 sbit TI1 = SCON1^1; /* Alternate TI_1 */
00C0 +1 355 sbit RI1 = SCON1^0; /* Alternate RI_1 */
+1 356
00CF +1 357 sbit TF2 = T2CON^7;
00CE +1 358 sbit EXF2 = T2CON^6;
00CD +1 359 sbit RCLK = T2CON^5;
00CC +1 360 sbit TCLK = T2CON^4;
00CB +1 361 sbit EXEN2 = T2CON^3;
00CA +1 362 sbit TR2 = T2CON^2;
00C9 +1 363 sbit C_T2 = T2CON^1;
00C8 +1 364 sbit CP_RL2= T2CON^0;
+1 365
00DF +1 366 sbit SMOD_1= WDCON^7;
00DE +1 367 sbit POR = WDCON^6;
00DD +1 368 sbit EPF1 = WDCON^5;
00DC +1 369 sbit PF1 = WDCON^4;
00DB +1 370 sbit WDIF = WDCON^3;
00DA +1 371 sbit WTRF = WDCON^2;
00D9 +1 372 sbit EWT = WDCON^1;
00D8 +1 373 sbit RWT = WDCON^0;
+1 374
00EF +1 375 sbit CANBIE= EIE^7;
00EE +1 376 sbit C0IE = EIE^6;
00ED +1 377 sbit C1IE = EIE^5;
00EC +1 378 sbit EWDI = EIE^4;
00EB +1 379 sbit EX5 = EIE^3; /* Alternate EC3 */
00EA +1 380 sbit EX4 = EIE^2; /* Alternate EC2 */
00E9 +1 381 sbit EX3 = EIE^1; /* Alternate EC1 */
00E8 +1 382 sbit EX2 = EIE^0; /* Alternate EC0 */
+1 383
00FF +1 384 sbit CANBIP= EIP^7;
00FE +1 385 sbit C0IP = EIP^6;
00FD +1 386 sbit C1IP = EIP^5;
00FC +1 387 sbit PWDI = EIP^4;
A51 MACRO ASSEMBLER START390 07/17/2003 18:04:05 PAGE 7
00FB +1 388 sbit PX5 = EIP^3; /* Alternate PC3 */
00FA +1 389 sbit PX4 = EIP^2; /* Alternate PC2 */
00F9 +1 390 sbit PX3 = EIP^1; /* Alternate PC1 */
00F8 +1 391 sbit PX2 = EIP^0; /* Alternate PC0 */
+1 392
+1 393
394
395
396 NAME ?C_STARTUP
397
398
399 ?C_C51STARTUP SEGMENT CODE
400
401 IF SA = 1
IF IDM = 0
?STACK SEGMENT XDATA AT 0F000H
ENDIF
IF IDM = 1
?STACK SEGMENT XDATA AT 00000H
ENDIF
IF IDM = 2
?STACK SEGMENT HDATA AT 0400000H
ENDIF
IF IDM = 3
__ERROR__ "Extended Stack not possible when on-chip XRAM is mapped as code & xdata"
ENDIF
RSEG ?STACK
DS 1024
ELSE
422
423 ?STACK SEGMENT IDATA
424
---- 425 RSEG ?STACK
0000 426 DS 1
427 ENDIF
428
429 EXTRN CODE (?C_START)
430 PUBLIC ?C_STARTUP
*** _________________________________________________^
*** ERROR #A45 IN 430 (..\keilc51\Start390.a51, LINE 178): UNDEFINED SYMBOL (PASS-2)
431
432 ?C_CPURESET?0 SEGMENT CODE OFFS 0
*** ______________________________________________________^
*** ERROR #A9 IN 432 (..\keilc51\Start390.a51, LINE 180): SYNTAX ERROR
---- 433 RSEG ?C_CPURESET?0
*** _________________________________________________^
*** ERROR #A30 IN 433 (..\keilc51\Start390.a51, LINE 181): SEGMENT SYMBOL EXPECTED
434
435 ?C_STARTUP LABEL NEAR
*** _________________________^
*** ERROR #A9 IN 435 (..\keilc51\Start390.a51, LINE 183): SYNTAX ERROR
436 DB 02H ; LJMP in Classic 8051 Mode
*** _________________________________________^
*** ERROR #A37 IN 436 (..\keilc51\Start390.a51, LINE 184): OPERATION INVALID IN THIS SEGMENT
437 DW WORD0 STARTUP1
*** _________________________________________^
*** ERROR #A37 IN 437 (..\keilc51\Start390.a51, LINE 185): OPERATION INVALID IN THIS SEGMENT
---- 438 RSEG ?C_C51STARTUP
439
0000 440 STARTUP1:
441
A51 MACRO ASSEMBLER START390 07/17/2003 18:04:05 PAGE 8
0000 75C7AA 442 MOV TA,#0xAA ; Enable access to P4CNT
0003 75C755 443 MOV TA,#0x55
003F 444 P4CNT_VAL EQU (SBCAN SHL 6) OR (PCES SHL 3) OR (P4PF)
0006 75923F 445 MOV P4CNT,#P4CNT_VAL
446
0009 75C7AA 447 MOV TA,#0xAA ; Enable access to P5CNT
000C 75C755 448 MOV TA,#0x55
0007 449 P5CNT_VAL EQU (SP1EC SHL 5) OR (CX_IO SHL 3) OR (P5PF)
000F 75A207 450 MOV P5CNT,#P5CNT_VAL
451
452
453
0012 75C7AA 454 MOV TA,#0xAA ; Enable access to ACON
0015 75C755 455 MOV TA,#0x55
0002 456 ACON_VAL EQU (2 OR (SA SHL 2)) ; 22-bit contigious mode, SA bit
0018 759D02 457 MOV ACON,#ACON_VAL
458
001B 75C7AA 459 MOV TA,#0xAA ; Enable access to MCON
001E 75C755 460 MOV TA,#0x55
0000 461 MCON_VAL SET (IDM SHL 6) OR (CMA SHL 5) OR (PDCE3 SHL 3) OR (PDCE2 SHL 2)
0000 462 MCON_VAL SET MCON_VAL OR (PDCE1 SHL 1) OR (PDCE0)
0021 75C600 463 MOV MCON,#MCON_VAL
464
465
466 IF IDATALEN <> 0
0024 787F 467 MOV R0,#IDATALEN - 1
0026 E4 468 CLR A
0027 F6 469 IDATALOOP: MOV @R0,A
0028 D8FD 470 DJNZ R0,IDATALOOP
471 ENDIF
472
473 IF XDATALEN <> 0
MOV DPTR,#XDATASTART
MOV R7,#BYTE0 (XDATALEN)
IF (BYTE0 (XDATALEN)) <> 0
MOV R6,#(BYTE1 XDATALEN) +1
ELSE
MOV R6,#BYTE1 (XDATALEN)
ENDIF
IF (BYTE1 (XDATALEN)) <> 0
MOV R5,#(BYTE2 XDATALEN) +1
ELSE
MOV R5,#BYTE2 (XDATALEN)
ENDIF
CLR A
XDATALOOP: MOVX @DPTR,A
INC DPTR
DJNZ R7,XDATALOOP
DJNZ R6,XDATALOOP
DJNZ R5,XDATALOOP
ENDIF
493
494 IF PPAGEENABLE <> 0
MOV P2,#PPAGE
MOV MXAX,#0
ENDIF
498
499 IF PDATALEN <> 0
MOV R0,#PDATASTART
MOV R7,#LOW (PDATALEN)
CLR A
PDATALOOP: MOVX @R0,A
INC R0
DJNZ R7,PDATALOOP
ENDIF
507
A51 MACRO ASSEMBLER START390 07/17/2003 18:04:05 PAGE 9
508 IF IBPSTACK <> 0
EXTRN DATA (?C_IBP)
MOV ?C_IBP,#LOW IBPSTACKTOP
ENDIF
513
514 IF XBPSTACK <> 0
EXTRN DATA (?C_XBP)
MOV ?C_XBP,#HIGH XBPSTACKTOP
MOV ?C_XBP+1,#LOW XBPSTACKTOP
ENDIF
520
521 IF PBPSTACK <> 0
EXTRN DATA (?C_PBP)
MOV ?C_PBP,#LOW PBPSTACKTOP
ENDIF
525
526 IF SA = 1
MOV SP,#BYTE0 (?STACK-1)
MOV ESP,#BYTE1 (?STACK-1)
ELSE
002A 758100 F 530 MOV SP,#?STACK-1
531 ENDIF
002D 020000 F 532 LJMP ?C_START
533
534 END
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