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📄 dsp28_evcap.c

📁 用tms320c2812实现的高精度频率计
💻 C
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#include "DSP28_Device.h"

/*unsigned  int capnum1;
unsigned  int capnum2;
float f;
float pinlvf[5];
int fnum=0;
unsigned int temp1;*/
/*void main(void)
{

        InitSysCtrl();
        DINT;           //禁止CPU级的中断
        IER = 0x0000;   //清中断使能位
        IFR = 0x0000;   //清中断标志位
        InitPieCtrl();
        InitPieVectTable();        
        
        InitEva();
                
        EALLOW;
    PieVectTable.CAPINT6=&CAP6;//对CAP捕获单元的中断入口向量进行重新映射
    EDIS;
    
    PieCtrl.PIEIER5.bit.INTx7=1;   //使能CAP6中断
    IER |=M_INT5;                  //开中断3
    EINT;   // Enable Global interrupt INTM
    ERTM;   // Enable Global realtime interrupt DBGM
   
    while(1)
    {
        ;   
    }
}    */    
/*interrupt void CAP6(void)
{      
       unsigned int temp;
       EvbRegs.EVBIFRC.bit.CAP6INT=1;// 清捕获中断1标志位
    if( EvbRegs.CAPFIFOB.bit.CAP6FIFO==3)
        {
        capnum1=EvbRegs.CAP6FIFO;  
          capnum2=EvbRegs.CAP6FIFO;
         if(capnum2 > capnum1)
              temp = capnum2-capnum1;
         else
              temp = capnum2+(0xFFFF-capnum1);
       pinlvf[fnum++] =temp;
       if(fnum>4) fnum=0;//取5个数值后回零
       f= 1875000.0/(float)temp;
         }
       PieCtrl.PIEACK.bit.ACK5 = 1;//开外设中断应答     
          
}*/
/*void InitSysCtrl(void)
{
   unsigned int i;
   EALLOW;
   
// On TMX samples, to get the best performance of on chip RAM blocks M0/M1/L0/L1/H0 internal
// control registers bit have to be enabled. The bits are in Device emulation registers.
   DevEmuRegs.M0RAMDFT = 0x0300;
   DevEmuRegs.M1RAMDFT = 0x0300;
   DevEmuRegs.L0RAMDFT = 0x0300;
   DevEmuRegs.L1RAMDFT = 0x0300;
   DevEmuRegs.H0RAMDFT = 0x0300;  //初始化RAM
             
// Disable watchdog module 
   SysCtrlRegs.WDCR= 0x0068; 

// Initalize PLL
   SysCtrlRegs.PLLCR = 0x9;  //CLKIN=(OSCCLK*10.0)/2
   // Wait for PLL to lock
   for(i= 0; i< 5000; i++){}
       
// HISPCP/LOSPCP prescale register settings, normally it will be set to default values
   SysCtrlRegs.HISPCP.all = 0x0001; //高速时钟=SYSCLKOUT/2=150M/2=75M
   SysCtrlRegs.LOSPCP.all = 0x0002;        //低速时钟=SYSCLKOUT/4
// Peripheral clock enables set for the selected peripherals.   
   SysCtrlRegs.PCLKCR.bit.EVAENCLK=1;
   SysCtrlRegs.PCLKCR.bit.EVBENCLK=1;
//SysCtrlRegs.PCLKCR.bit.EVBENCLK=1;
//SysCtrlRegs.PCLKCR.bit.SCIENCLKA=1;
//SysCtrlRegs.PCLKCR.bit.SCIENCLKB=1;
//SysCtrlRegs.PCLKCR.bit.ADCENCLK=1;
                                
   EDIS;
}
//---------------------------------------------------------------------------
// KickDog: 
//---------------------------------------------------------------------------
// This function resets the watchdog timer.
// Enable this function for using KickDog in the application 

void InitPieCtrl(void)
{
        // Disable PIE:
        PieCtrl.PIECRTL.bit.ENPIE = 0;

        // Clear all PIEIER registers:
        PieCtrl.PIEIER1.all = 0;
        PieCtrl.PIEIER2.all = 0;
        PieCtrl.PIEIER3.all = 0;        
        PieCtrl.PIEIER4.all = 0;
        PieCtrl.PIEIER5.all = 0;
        PieCtrl.PIEIER6.all = 0;
        PieCtrl.PIEIER7.all = 0;
        PieCtrl.PIEIER8.all = 0;
        PieCtrl.PIEIER9.all = 0;
        PieCtrl.PIEIER10.all = 0;
        PieCtrl.PIEIER11.all = 0;
        PieCtrl.PIEIER12.all = 0;

        // Clear all PIEIFR registers:
        PieCtrl.PIEIFR1.all = 0;
        PieCtrl.PIEIFR2.all = 0;
        PieCtrl.PIEIFR3.all = 0;        
        PieCtrl.PIEIFR4.all = 0;
        PieCtrl.PIEIFR5.all = 0;
        PieCtrl.PIEIFR6.all = 0;
        PieCtrl.PIEIFR7.all = 0;
        PieCtrl.PIEIFR8.all = 0;
        PieCtrl.PIEIFR9.all = 0;
        PieCtrl.PIEIFR10.all = 0;
        PieCtrl.PIEIFR11.all = 0;
        PieCtrl.PIEIFR12.all = 0;

        // Enable PIE:
        PieCtrl.PIECRTL.bit.ENPIE = 1;
        PieCtrl.PIEACK.all = 0xFFFF;
}        

const struct PIE_VECT_TABLE PieVectTableInit = {

      PIE_RESERVED,  // Reserved space
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   
      PIE_RESERVED,   

// Non-Peripheral Interrupts
      INT13_ISR,     // XINT13 or CPU-Timer 1
      INT14_ISR,     // CPU-Timer2
      DATALOG_ISR,   // Datalogging interrupt
      RTOSINT_ISR,   // RTOS interrupt
      EMUINT_ISR,    // Emulation interrupt
      NMI_ISR,       // Non-maskable interrupt
      ILLEGAL_ISR,   // Illegal operation TRAP
      USER0_ISR,     // User Defined trap 0
      USER1_ISR,     // User Defined trap 1
      USER2_ISR,     // User Defined trap 2
      USER3_ISR,     // User Defined trap 3
      USER4_ISR,     // User Defined trap 4
      USER5_ISR,     // User Defined trap 5
      USER6_ISR,     // User Defined trap 6
      USER7_ISR,     // User Defined trap 7
      USER8_ISR,     // User Defined trap 8
      USER9_ISR,     // User Defined trap 9
      USER10_ISR,    // User Defined trap 10
      USER11_ISR,    // User Defined trap 11

// Group 1 PIE Vectors
      PDPINTA_ISR,   // EV-A
      PDPINTB_ISR,   // EV-B
      rsvd_ISR,
      XINT1_ISR,     
      XINT2_ISR,
      ADCINT_ISR,    // ADC
      TINT0_ISR,     // Timer 0
      WAKEINT_ISR,   // WD

// Group 2 PIE Vectors
      CMP1INT_ISR,   // EV-A
      CMP2INT_ISR,   // EV-A
      CMP3INT_ISR,   // EV-A
      T1PINT_ISR,    // EV-A
      T1CINT_ISR,    // EV-A
      T1UFINT_ISR,   // EV-A
      T1OFINT_ISR,   // EV-A
      rsvd_ISR,
      
// Group 3 PIE Vectors
      T2PINT_ISR,    // EV-A
      T2CINT_ISR,    // EV-A
      T2UFINT_ISR,   // EV-A
      T2OFINT_ISR,   // EV-A
      CAPINT1_ISR,   // EV-A
      CAPINT2_ISR,   // EV-A
      CAPINT3_ISR,   // EV-A
      rsvd_ISR,
      
// Group 4 PIE Vectors
      CMP4INT_ISR,   // EV-B
      CMP5INT_ISR,   // EV-B
      CMP6INT_ISR,   // EV-B
      T3PINT_ISR,    // EV-B
      T3CINT_ISR,    // EV-B
      T3UFINT_ISR,   // EV-B
      T3OFINT_ISR,   // EV-B
      rsvd_ISR,      
     
// Group 5 PIE Vectors
      T4PINT_ISR,    // EV-B
      T4CINT_ISR,    // EV-B
      T4UFINT_ISR,   // EV-B
      T4OFINT_ISR,   // EV-B
      CAPINT4_ISR,   // EV-B
      CAPINT5_ISR,   // EV-B
      CAPINT6_ISR,   // EV-B
      rsvd_ISR,      

// Group 6 PIE Vectors
      SPIRXINTA_ISR,   // SPI-A
      SPITXINTA_ISR,   // SPI-A
      rsvd_ISR,
      rsvd_ISR,
      MRINTA_ISR,    // McBSP-A
      MXINTA_ISR,    // McBSP-A
      rsvd_ISR,
      rsvd_ISR,
      
// Group 7 PIE Vectors
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   

// Group 8 PIE Vectors
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      
// Group 9 PIE Vectors     
      SCIRXINTA_ISR, // SCI-A
      SCITXINTA_ISR, // SCI-A
      SCIRXINTB_ISR, // SCI-B
      SCITXINTB_ISR, // SCI-B
      ECAN0INTA_ISR, // eCAN
      ECAN1INTA_ISR, // eCAN
      rsvd_ISR,   
      rsvd_ISR,   
      
// Group 10 PIE Vectors
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
            
// Group 11 PIE Vectors
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   

// Group 12 PIE Vectors
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
      rsvd_ISR,   
};

void InitPieVectTable(void)
{
        int16        i;
        Uint32 *Source = (void *) &PieVectTableInit;
        Uint32 *Dest = (void *) &PieVectTable;
                
        EALLOW;        
        for(i=0; i < 128; i++)
                *Dest++ = *Source++;        
        EDIS;

        // Enable the PIE Vector Table
        PieCtrl.PIECRTL.bit.ENPIE = 1;        
                        
}*/

void InitEva(void)
{
     //EALLOW;
  //  GpioMuxRegs.GPAMUX.bit.CAP1Q1_GPIOA8=1;         //GPIOA8口用作CAP1
   // GpioMuxRegs.GPADIR.bit.GPIOA8=0;                //用作CAP1的输入
   // GpioDataRegs.GPACLEAR.bit.GPIOA8=1;             //初始化为低电平
    
   // GpioMuxRegs.GPAMUX.bit.PWM1_GPIOA0=0;       //GPIOA0口用作一般I/O口        
   // GpioMuxRegs.GPADIR.bit.GPIOA0=1;            //I/O口用作输出
    //GpioDataRegs.GPACLEAR.bit.GPIOA0=1;         //初始化为低电平

   /*    EvbRegs.T4PR = 0xFFFF;        //周期寄存器设为FFFF
       EvbRegs.T4CNT=0;
      
       EvbRegs.T4CON.all=0;          //定时器控制寄存器
       EvbRegs.T4CON.bit.FREE=2;        //仿真挂起时立即停止
       EvbRegs.T4CON.bit.SOFT=0;
       EvbRegs.T4CON.bit.TMODE=2;    //连续增计数模式
       EvbRegs.T4CON.bit.TPS=5;      //64分频
       EvbRegs.T4CON.bit.TENABLE=1;  //使能定时器
       EvbRegs.T4CON.bit.TCLKS10=0;     //选用内部时钟源*/
      
        EALLOW;                       // Enable EALLOW 
        GpioMuxRegs.GPBMUX.all |= 0x0700;     // Set up the capture pins to primary functions
        EDIS;                       
       ////////////////cap6/////////////////   
       EvbRegs.CAPCONB.all=0;         //捕捉控制寄存器       
       EvbRegs.CAPCONB.bit.CAP6EDGE=1;    //检测上升沿
       EvbRegs.CAPCONB.bit.CAP6TSEL=0;  //选定时器4
       EvbRegs.CAPFIFOB.bit.CAP6FIFO=0; //CAP1FIFO空
       EvbRegs.EVBIFRC.bit.CAP6INT=1;//清捕获中断1标志位
       EvbRegs.EVBIMRC.bit.CAP6INT=1; //捕获1中断使能
       EvbRegs.CAPCONB.bit.CAP6EN=1;  //使能捕捉
  
  ///////////////////cap4,5//////////////////////
 // 	   EvbRegs.CAPCONB.all=0;         //捕捉控制寄存器       
       EvbRegs.CAPCONB.bit.CAP5EDGE=1;    //检测上升沿
       EvbRegs.CAPCONB.bit.CAP4EDGE=2;    //检测上升沿
       EvbRegs.CAPCONB.bit.CAP45TSEL=1;  //选定时器3
     //  EvbRegs.CAPCONB.bit.CAP45TSEL=1;  //选定时器3
       EvbRegs.CAPFIFOB.bit.CAP5FIFO=0; //CAP1FIFO空
       EvbRegs.CAPFIFOB.bit.CAP4FIFO=0; //CAP1FIFO空
       EvbRegs.EVBIFRC.bit.CAP5INT=1;//清捕获中断1标志位
       EvbRegs.EVBIMRC.bit.CAP5INT=1; //捕获1中断使能
       EvbRegs.EVBIFRC.bit.CAP4INT=1;//清捕获中断1标志位
       EvbRegs.EVBIMRC.bit.CAP4INT=1; //捕获1中断使能
       EvbRegs.CAPCONB.bit.CAPQEPN=1;  //使能捕捉
 
/*   //EvaRegs.CAPCON.all=0x2640;     捕获单元的设置
    EvaRegs.CAPCON.bit.CAPRES=0;     //复位CAP1
    EvaRegs.CAPCON.bit.CAPQEPN=1;    //使能捕获器1/2
    EvaRegs.CAPCON.bit.CAP3EN=0;     //禁止捕获器3
    EvaRegs.CAPCON.bit.CAP12TSEL=1;  //选择通用定时器1作为时基
    EvaRegs.CAPCON.bit.CAP1EDGE=1;   //检测上升沿
    EvaRegs.CAPFIFO.bit.CAP1FIFO=1;  //每当FIFO堆栈得到一个新的数
                                     //值都会产生一个捕捉中断
  
    EvaRegs.T1CNT=0x0000;         //设定初始值 定时器1计数寄存器
   // EvaRegs.T1CON.all=0x1042;     //连续增模式 定时器是使能 内部时钟源  
   EvaRegs.T1CON.bit.FREE=0;        //仿真挂起时立即停止
   EvaRegs.T1CON.bit.SOFT=0;
   EvaRegs.T1CON.bit.TMODE=2;       //连续增计数模式
   EvaRegs.T1CON.bit.TPS=0;         //输入时钟预定标因子0 
   EvaRegs.T1CON.bit.TENABLE=1;     //定时器使能
   EvaRegs.T1CON.bit.TCLKS10=0;     //选用内部时钟源
  // EvaRegs.T1CON.bit.TCLD10=0;      //计数器的值为0立即重载  */                      
   
}   

/*
#pragma DATA_SECTION(GpioDataRegs,"GpioDataRegsFile");
volatile struct GPIO_DATA_REGS GpioDataRegs;

#pragma DATA_SECTION(GpioMuxRegs,"GpioMuxRegsFile");
volatile struct GPIO_MUX_REGS GpioMuxRegs;

#pragma DATA_SECTION(EvaRegs,"EvaRegsFile");
volatile struct EVA_REGS EvaRegs;

#pragma DATA_SECTION(EvbRegs,"EvbRegsFile");
volatile struct EVB_REGS EvbRegs;

#pragma DATA_SECTION(PieCtrl,"PieCtrlRegsFile");
volatile struct PIE_CTRL_REGS PieCtrl;

#pragma DATA_SECTION(PieVectTable,"PieVectTable");
struct PIE_VECT_TABLE PieVectTable;

#pragma DATA_SECTION(SysCtrlRegs,"SysCtrlRegsFile");
volatile struct SYS_CTRL_REGS SysCtrlRegs;

#pragma DATA_SECTION(DevEmuRegs,"DevEmuRegsFile");
volatile struct DEV_EMU_REGS DevEmuRegs; 
*/

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