📄 p18f24j10.inc
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SREN EQU H'0005'
RX9 EQU H'0006'
SPEN EQU H'0007'
RCD8 EQU H'0000'
RC9 EQU H'0006'
NOT_RC8 EQU H'0006'
RC8_9 EQU H'0006'
;----- TXSTA Bits -----------------------------------------------------
TX9D EQU H'0000'
TRMT EQU H'0001'
BRGH EQU H'0002'
SENDB EQU H'0003'
SYNC EQU H'0004'
TXEN EQU H'0005'
TX9 EQU H'0006'
CSRC EQU H'0007'
TXD8 EQU H'0000'
TX8_9 EQU H'0006'
NOT_TX8 EQU H'0006'
;----- TXSTA1 Bits -----------------------------------------------------
TX9D EQU H'0000'
TRMT EQU H'0001'
BRGH EQU H'0002'
SENDB EQU H'0003'
SYNC EQU H'0004'
TXEN EQU H'0005'
TX9 EQU H'0006'
CSRC EQU H'0007'
TXD8 EQU H'0000'
TX8_9 EQU H'0006'
NOT_TX8 EQU H'0006'
;----- CMCON Bits -----------------------------------------------------
CM0 EQU H'0000'
CM1 EQU H'0001'
CM2 EQU H'0002'
CIS EQU H'0003'
C1INV EQU H'0004'
C2INV EQU H'0005'
C1OUT_CMCON EQU H'0006'
C2OUT_CMCON EQU H'0007'
;----- CVRCON Bits -----------------------------------------------------
CVR0 EQU H'0000'
CVR1 EQU H'0001'
CVR2 EQU H'0002'
CVR3 EQU H'0003'
CVRSS EQU H'0004'
CVRR EQU H'0005'
CVROE EQU H'0006'
CVREN EQU H'0007'
;----- ECCP1AS Bits -----------------------------------------------------
PSSAC0 EQU H'0002'
PSSAC1 EQU H'0003'
ECCPAS0 EQU H'0004'
ECCPAS1 EQU H'0005'
ECCPAS2 EQU H'0006'
ECCPASE EQU H'0007'
;----- ECCP1DEL Bits -----------------------------------------------------
PRSEN EQU H'0007'
;----- PWM1CON Bits -----------------------------------------------------
PRSEN EQU H'0007'
;----- BAUDCON Bits -----------------------------------------------------
ABDEN EQU H'0000'
WUE EQU H'0001'
BRG16 EQU H'0003'
SCKP EQU H'0004'
RCIDL EQU H'0006'
ABDOVF EQU H'0007'
RCMT EQU H'0006'
;----- BAUDCTL Bits -----------------------------------------------------
ABDEN EQU H'0000'
WUE EQU H'0001'
BRG16 EQU H'0003'
SCKP EQU H'0004'
RCIDL EQU H'0006'
ABDOVF EQU H'0007'
RCMT EQU H'0006'
;----- CCP2CON Bits -----------------------------------------------------
CCP2M0 EQU H'0000'
CCP2M1 EQU H'0001'
CCP2M2 EQU H'0002'
CCP2M3 EQU H'0003'
DC2B0 EQU H'0004'
DC2B1 EQU H'0005'
CCP2Y EQU H'0004'
CCP2X EQU H'0005'
;----- CCP1CON Bits -----------------------------------------------------
CCP1M0 EQU H'0000'
CCP1M1 EQU H'0001'
CCP1M2 EQU H'0002'
CCP1M3 EQU H'0003'
DC1B0 EQU H'0004'
DC1B1 EQU H'0005'
CCP1Y EQU H'0004'
CCP1X EQU H'0005'
;----- ADCON2 Bits -----------------------------------------------------
ADCS0 EQU H'0000'
ADCS1 EQU H'0001'
ADCS2 EQU H'0002'
ACQT0 EQU H'0003'
ACQT1 EQU H'0004'
ACQT2 EQU H'0005'
ADFM EQU H'0007'
;----- ADCON1 Bits -----------------------------------------------------
PCFG0 EQU H'0000'
PCFG1 EQU H'0001'
PCFG2 EQU H'0002'
PCFG3 EQU H'0003'
VCFG0 EQU H'0004'
VCFG1 EQU H'0005'
;----- ADCON0 Bits -----------------------------------------------------
DONE EQU H'0001'
GO_DONE EQU H'0001'
ADON EQU H'0000'
GO EQU H'0001'
CHS0 EQU H'0002'
CHS1 EQU H'0003'
CHS2 EQU H'0004'
CHS3 EQU H'0005'
ADCAL EQU H'0007'
NOT_DONE EQU H'0001'
;----- SSP1CON2 Bits -----------------------------------------------------
SEN EQU H'0000'
RSEN EQU H'0001'
PEN EQU H'0002'
RCEN EQU H'0003'
ACKEN EQU H'0004'
ACKDT EQU H'0005'
ACKSTAT EQU H'0006'
GCEN EQU H'0007'
;----- SSPCON2 Bits -----------------------------------------------------
SEN EQU H'0000'
RSEN EQU H'0001'
PEN EQU H'0002'
RCEN EQU H'0003'
ACKEN EQU H'0004'
ACKDT EQU H'0005'
ACKSTAT EQU H'0006'
GCEN EQU H'0007'
;----- SSP1CON1 Bits -----------------------------------------------------
SSPM0 EQU H'0000'
SSPM1 EQU H'0001'
SSPM2 EQU H'0002'
SSPM3 EQU H'0003'
CKP EQU H'0004'
SSPEN EQU H'0005'
SSPOV EQU H'0006'
WCOL EQU H'0007'
;----- SSPCON1 Bits -----------------------------------------------------
SSPM0 EQU H'0000'
SSPM1 EQU H'0001'
SSPM2 EQU H'0002'
SSPM3 EQU H'0003'
CKP EQU H'0004'
SSPEN EQU H'0005'
SSPOV EQU H'0006'
WCOL EQU H'0007'
;----- SSP1STAT Bits -----------------------------------------------------
BF EQU H'0000'
UA EQU H'0001'
R_W EQU H'0002'
S EQU H'0003'
P EQU H'0004'
D_A EQU H'0005'
CKE EQU H'0006'
SMP EQU H'0007'
I2C_READ EQU H'0002'
I2C_START EQU H'0003'
I2C_STOP EQU H'0004'
I2C_DAT EQU H'0005'
NOT_W EQU H'0002'
NOT_A EQU H'0005'
NOT_WRITE EQU H'0002'
NOT_ADDRESS EQU H'0005'
READ_WRITE EQU H'0002'
DATA_ADDRESS EQU H'0005'
R EQU H'0002'
D EQU H'0005'
;----- SSPSTAT Bits -----------------------------------------------------
BF EQU H'0000'
UA EQU H'0001'
R_W EQU H'0002'
S EQU H'0003'
P EQU H'0004'
D_A EQU H'0005'
CKE EQU H'0006'
SMP EQU H'0007'
I2C_READ EQU H'0002'
I2C_START EQU H'0003'
I2C_STOP EQU H'0004'
I2C_DAT EQU H'0005'
NOT_W EQU H'0002'
NOT_A EQU H'0005'
NOT_WRITE EQU H'0002'
NOT_ADDRESS EQU H'0005'
READ_WRITE EQU H'0002'
DATA_ADDRESS EQU H'0005'
R EQU H'0002'
D EQU H'0005'
;----- T2CON Bits -----------------------------------------------------
T2CKPS0 EQU H'0000'
T2CKPS1 EQU H'0001'
TMR2ON EQU H'0002'
T2OUTPS0 EQU H'0003'
T2OUTPS1 EQU H'0004'
T2OUTPS2 EQU H'0005'
T2OUTPS3 EQU H'0006'
TOUTPS0 EQU H'0003'
TOUTPS1 EQU H'0004'
TOUTPS2 EQU H'0005'
TOUTPS3 EQU H'0006'
;----- T1CON Bits -----------------------------------------------------
TMR1ON EQU H'0000'
TMR1CS EQU H'0001'
T1SYNC EQU H'0002'
T1OSCEN EQU H'0003'
T1CKPS0 EQU H'0004'
T1CKPS1 EQU H'0005'
T1RUN EQU H'0006'
RD16 EQU H'0007'
T1INSYNC EQU H'0002'
NOT_T1SYNC EQU H'0002'
;----- RCON Bits -----------------------------------------------------
NOT_BOR EQU H'0000'
NOT_POR EQU H'0001'
NOT_PD EQU H'0002'
NOT_TO EQU H'0003'
NOT_RI EQU H'0004'
IPEN EQU H'0007'
BOR EQU H'0000'
POR EQU H'0001'
PD EQU H'0002'
TO EQU H'0003'
RI EQU H'0004'
;----- WDTCON Bits -----------------------------------------------------
SWDTE EQU H'0000'
SWDTEN EQU H'0000'
;----- OSCCON Bits -----------------------------------------------------
SCS0 EQU H'0000'
SCS1 EQU H'0001'
OSTS EQU H'0003'
IDLEN EQU H'0007'
;----- T0CON Bits -----------------------------------------------------
T0PS0 EQU H'0000'
T0PS1 EQU H'0001'
T0PS2 EQU H'0002'
PSA EQU H'0003'
T0SE EQU H'0004'
T0CS EQU H'0005'
T08BIT EQU H'0006'
TMR0ON EQU H'0007'
;----- STATUS Bits -----------------------------------------------------
C EQU H'0000'
DC EQU H'0001'
Z EQU H'0002'
OV EQU H'0003'
N EQU H'0004'
;----- INTCON3 Bits -----------------------------------------------------
INT1F EQU H'0000'
INT2F EQU H'0001'
INT1E EQU H'0003'
INT2E EQU H'0004'
INT1P EQU H'0006'
INT2P EQU H'0007'
INT1IF EQU H'0000'
INT2IF EQU H'0001'
INT1IE EQU H'0003'
INT2IE EQU H'0004'
INT1IP EQU H'0006'
INT2IP EQU H'0007'
;----- INTCON2 Bits -----------------------------------------------------
RBIP EQU H'0000'
T0IP EQU H'0002'
INTEDG2 EQU H'0004'
INTEDG1 EQU H'0005'
INTEDG0 EQU H'0006'
NOT_RBPU EQU H'0007'
TMR0IP EQU H'0002'
RBPU EQU H'0007'
;----- INTCON Bits -----------------------------------------------------
RBIF EQU H'0000'
INT0F EQU H'0001'
T0IF EQU H'0002'
RBIE EQU H'0003'
INT0E EQU H'0004'
T0IE EQU H'0005'
PEIE EQU H'0006'
GIE EQU H'0007'
INT0IF EQU H'0001'
TMR0IF EQU H'0002'
INT0IE EQU H'0004'
TMR0IE EQU H'0005'
GIEL EQU H'0006'
GIEH EQU H'0007'
;----- STKPTR Bits -----------------------------------------------------
STKPTR0 EQU H'0000'
STKPTR1 EQU H'0001'
STKPTR2 EQU H'0002'
STKPTR3 EQU H'0003'
STKPTR4 EQU H'0004'
STKUNF EQU H'0006'
STKOVF EQU H'0007'
STKFUL EQU H'0007'
;==========================================================================
;
; RAM Definitions
;
;==========================================================================
__MAXRAM H'0FFF'
__BADRAM H'0400'-H'0F7F'
__BADRAM H'0F83'-H'0F88'
__BADRAM H'0F8C'-H'0F91'
__BADRAM H'0F95'-H'0F9A'
__BADRAM H'0F9C'
__BADRAM H'0FA8'-H'0FAA'
__BADRAM H'0FB1'-H'0FB3'
__BADRAM H'0FB9'
__BADRAM H'0FD2'
__BADRAM H'0FD4'
;==========================================================================
;
; IMPORTANT: For the PIC18 devices, the __CONFIG directive has been
; superseded by the CONFIG directive. The following settings
; are available for this device.
;
; Background Debugger Enable bit:
; DEBUG = ON Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug
; DEBUG = OFF Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins
;
; Extended Instruction Set Enable bit:
; XINST = OFF Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
; XINST = ON Instruction set extension and Indexed Addressing mode enabled
;
; Stack Overflow/Underflow Reset Enable bit:
; STVREN = OFF Reset on stack overflow/underflow disabled
; STVREN = ON Reset on stack overflow/underflow enabled
;
; Watchdog Timer Enable bit:
; WDTEN = OFF WDT disabled (control is placed on SWDTEN bit)
; WDTEN = ON WDT enabled
;
; Code Protection bit:
; CP0 = ON Program memory is code-protected
; CP0 = OFF Program memory is not code-protected
;
; Fail-Safe Clock Monitor Enable bit:
; FCMEN = OFF Fail-Safe Clock Monitor disabled
; FCMEN = ON Fail-Safe Clock Monitor enabled
;
; Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit:
; IESO = OFF Two-Speed Start-up disabled
; IESO = ON Two-Speed Start-up enabled
;
; Default/Reset System Clock Select bit:
; FOSC2 = OFF INTRC enabled as system clock when OSCCON<1:0> = 00
; FOSC2 = ON Clock selected by FOSC as system clock is enabled when OSCCON<1:0> = 00
;
; Oscillator Selection bits:
; FOSC = HS HS oscillator
; FOSC = HSPLL HS oscillator, PLL enabled and under software control
; FOSC = EC EC oscillator, CLKO function on OSC2
; FOSC = ECPLL EC oscillator, PLL enabled and under software control, CLKO function on OSC2
;
; Watchdog Timer Postscale Select bits:
; WDTPS = 1 1:1
; WDTPS = 2 1:2
; WDTPS = 4 1:4
; WDTPS = 8 1:8
; WDTPS = 16 1:16
; WDTPS = 32 1:32
; WDTPS = 64 1:64
; WDTPS = 128 1:128
; WDTPS = 256 1:256
; WDTPS = 512 1:512
; WDTPS = 1024 1:1024
; WDTPS = 2048 1:2048
; WDTPS = 4096 1:4096
; WDTPS = 8192 1:8192
; WDTPS = 16384 1:16384
; WDTPS = 32768 1:32768
;
; CCP2 MUX bit:
; CCP2MX = ALTERNATE CCP2 is multiplexed with RB3
; CCP2MX = DEFAULT CCP2 is multiplexed with RC1
;
;==========================================================================
_DEVID1 EQU H'3FFFFE'
_DEVID2 EQU H'3FFFFF'
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