📄 qla2x00.h
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uint8_t entry_type; /* Entry type. */ #define CONTINUE_TGT_IO_TYPE 0x17 /* CTIO entry */ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ uint32_t sys_define_2; /* System defined. */ uint8_t reserved_8; uint8_t initiator_id; uint16_t exchange_id; uint16_t flags; uint16_t status; uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ uint16_t dseg_count; /* Data segment count. */ uint32_t relative_offset; uint32_t residual; uint16_t reserved_1[3]; uint16_t scsi_status; uint32_t transfer_length; uint32_t dseg_0_address; /* Data segment 0 address. */ uint32_t dseg_0_length; /* Data segment 0 length. */ uint32_t dseg_1_address; /* Data segment 1 address. */ uint32_t dseg_1_length; /* Data segment 1 length. */ uint32_t dseg_2_address; /* Data segment 2 address. */ uint32_t dseg_2_length; /* Data segment 2 length. */}ctio_entry_t;/* * ISP queue - CTIO returned entry structure definition. */typedef struct{ uint8_t entry_type; /* Entry type. */ #define CTIO_RET_TYPE 0x17 /* CTIO return entry */ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ uint32_t sys_define_2; /* System defined. */ uint8_t reserved_8; uint8_t initiator_id; uint16_t exchange_id; uint16_t flags; uint16_t status; uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ uint16_t dseg_count; /* Data segment count. */ uint32_t relative_offset; uint32_t residual; uint16_t reserved_1[8]; uint16_t scsi_status; uint8_t sense_data[18];}ctio_ret_entry_t;/* * ISP queue - CTIO A64 entry structure definition. */typedef struct{ uint8_t entry_type; /* Entry type. */ #define CTIO_A64_TYPE 0x1F /* CTIO A64 entry */ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ uint32_t sys_define_2; /* System defined. */ uint8_t reserved_8; uint8_t initiator_id; uint16_t exchange_id; uint16_t flags; uint16_t status; uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ uint16_t dseg_count; /* Data segment count. */ uint32_t relative_offset; uint32_t residual; uint16_t reserved_1[3]; uint16_t scsi_status; uint32_t transfer_length; uint32_t dseg_0_address[2]; /* Data segment 0 address. */ uint32_t dseg_0_length; /* Data segment 0 length. */ uint32_t dseg_1_address[2]; /* Data segment 1 address. */ uint32_t dseg_1_length; /* Data segment 1 length. */}ctio_a64_entry_t;/* * ISP queue - CTIO returned entry structure definition. */typedef struct{ uint8_t entry_type; /* Entry type. */ #define CTIO_A64_RET_TYPE 0x1F /* CTIO A64 returned entry */ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ uint32_t sys_define_2; /* System defined. */ uint8_t reserved_8; uint8_t initiator_id; uint16_t exchange_id; uint16_t flags; uint16_t status; uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ uint16_t dseg_count; /* Data segment count. */ uint32_t relative_offset; uint32_t residual; uint16_t reserved_1[8]; uint16_t scsi_status; uint8_t sense_data[18];}ctio_a64_ret_entry_t;/* * ISP queue - Status Contination entry structure definition. */typedef struct{ uint8_t entry_type; /* Entry type. */ #define STATUS_CONT_TYPE 0x10 /* Status contination entry */ uint8_t entry_count; /* Entry count. */ uint8_t reserved; uint8_t entry_status; /* Entry Status. */ uint8_t sense_data[60];}status_cont_entry_t;/* * ISP queue - Command Set entry structure definition. */typedef struct{ uint8_t entry_type; /* Entry type. */ #define CMD_SET_TYPE 0x18 /* Command set entry */ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ uint32_t sys_define_2; /* System defined. */ uint16_t reserved; uint16_t status; uint16_t control_flags; /* Control flags. */ uint16_t count; uint32_t iocb_0_address; uint32_t iocb_1_address; uint32_t iocb_2_address; uint32_t iocb_3_address; uint32_t iocb_4_address; uint32_t iocb_5_address; uint32_t iocb_6_address; uint32_t iocb_7_address; uint32_t iocb_8_address; uint32_t iocb_9_address; uint32_t iocb_10_address; uint32_t iocb_11_address;}cmd_set_entry_t;/* * ISP queue - Command Set A64 entry structure definition. */typedef struct{ uint8_t entry_type; /* Entry type. */ #define CMD_SET_TYPE 0x18 /* Command set entry */ uint8_t entry_count; /* Entry count. */ uint8_t sys_define; /* System defined. */ uint8_t entry_status; /* Entry Status. */ uint32_t sys_define_2; /* System defined. */ uint16_t reserved; uint16_t status; uint16_t control_flags; /* Control flags. */ uint16_t count; uint32_t iocb_0_address[2]; uint32_t iocb_1_address[2]; uint32_t iocb_2_address[2]; uint32_t iocb_3_address[2]; uint32_t iocb_4_address[2]; uint32_t iocb_5_address[2];}cmd_set_a64_entry_t;/* * ISP request and response queue entry sizes */#define RESPONSE_ENTRY_SIZE (sizeof(response_t))#define REQUEST_ENTRY_SIZE (sizeof(request_t))/* * ISP status entry - completion status definitions. */#define CS_COMPLETE 0x0 /* No errors */#define CS_INCOMPLETE 0x1 /* Incomplete transfer of cmd. */#define CS_DMA 0x2 /* A DMA direction error. */#define CS_TRANSPORT 0x3 /* Transport error. */#define CS_RESET 0x4 /* SCSI bus reset occurred */#define CS_ABORTED 0x5 /* System aborted command. */#define CS_TIMEOUT 0x6 /* Timeout error. */#define CS_DATA_OVERRUN 0x7 /* Data overrun. */#define CS_DATA_UNDERRUN 0x15 /* Data Underrun. */#define CS_ABORT_MSG 0xE /* Target rejected abort msg. */#define CS_DEV_RESET_MSG 0x12 /* Target rejected dev rst msg. */#define CS_PORT_UNAVAILABLE 0x28 /* Port unavailable (selection timeout) */#define CS_PORT_LOGGED_OUT 0x29 /* Port Logged Out */#define CS_PORT_CONFIG_CHG 0x2A /* Port Configuration Changed */#define CS_PORT_BUSY 0x2B /* Port Busy */#define CS_BAD_PAYLOAD 0x80 /* Driver defined */#define CS_UNKNOWN 0x81 /* Driver defined */#define CS_RETRY 0x82 /* Driver defined *//* * ISP status entry - SCSI status byte bit definitions. */#define SS_RESIDUAL_UNDER BIT_11#define SS_RESIDUAL_OVER BIT_10#define SS_SENSE_LEN_VALID BIT_9#ifdef ISP2200#define SS_RESPONSE_INFO_LEN_VALID BIT_8#else#define SS_RESIDUAL_LEN_VALID BIT_8#endif#define SS_RESERVE_CONFLICT (BIT_4 | BIT_3)#define SS_BUSY_CONDITION BIT_3#define SS_CONDITION_MET BIT_2#define SS_CHECK_CONDITION BIT_1/* * ISP target entries - Flags bit definitions. */#define OF_RESET BIT_5 /* Reset LIP flag */#define OF_DATA_IN BIT_6 /* Data in to initiator */ /* (data from target to initiator) */#define OF_DATA_OUT BIT_7 /* Data out from initiator */ /* (data from initiator to target) */#define OF_NO_DATA (BIT_7 | BIT_6)#define OF_INC_RC BIT_8 /* Increment command resource count */#define OF_FAST_POST BIT_9 /* Enable mailbox fast posting. */#define OF_SSTS BIT_15 /* Send SCSI status *//* * Target Read/Write buffer structure. */#define TARGET_DATA_OFFSET 4#define TARGET_DATA_SIZE 0x2000 /* 8K */#define TARGET_INQ_OFFSET (TARGET_DATA_OFFSET + TARGET_DATA_SIZE)#define TARGET_SENSE_SIZE 18#define TARGET_BUF_SIZE 36#if QL1280_TARGET_MODE_SUPPORTtypedef struct{ uint8_t hdr[4]; uint8_t data[TARGET_DATA_SIZE];}tgt_buf_t;#endif /* QL1280_TARGET_MODE_SUPPORT */typedef struct{ uint16_t loop_id;#ifdef QL_MAPPED_TARGETS uint16_t lun_offset;#endif uint32_t down_timer; scsi_lu_t *luns[MAX_LUNS];}tgt_t;/* * 24 bit port ID type definition. */typedef union { struct { uint8_t port_id[3]; uint8_t rsvd_1; }r;#if defined(_BIT_FIELDS_LTOH) uint32_t b24 : 24, rsvd : 8; struct { uint8_t al_pa; uint8_t area; uint8_t domain; uint8_t rsvd_1; }b;#else uint32_t rsvd : 8, b24 : 24; struct { uint8_t domain; uint8_t area; uint8_t al_pa; uint8_t rsvd_1; }b;#endif} port_id_t;typedef struct{ uint32_t name[2]; /* node name */ uint32_t wwn[2]; /* port name */ uint16_t loop_id; uint8_t port_id[3]; /* 24-bit port ID */ uint8_t rsvd_1; /* * This is used to retry login for devices specified for * persistent binding or lost devices. */ uint8_t port_login_retry_count; uint8_t rsvd_2; uint16_t flag; uint32_t mask[8]; /* LUN Mask for this Device */ /* flags bits defined as follows */#define DEV_PUBLIC BIT_0#define DEV_OFFLINE BIT_1#define DEV_LUNMASK_SET BIT_2 /* some LUNs masked for this device */#define DEV_MP_DISABLED BIT_3 /* device disabled for qlmultipath */#define DEV_TAPE_DEVICE BIT_4#define DEV_CONFIGURED BIT_5#define DEV_MISSING BIT_6#define DEV_RETURN BIT_7#define DEV_HOST BIT_8}fcdev_t;typedef struct{ uint8_t in_use;}fabricid_t;/* * Flash Database structures. */#define FLASH_DATABASE_0 0x1c000#define FLASH_DATABASE_1 0x18000#define FLASH_DATABASE_VERSION 1typedef struct{ uint32_t seq; uint8_t version; uint8_t checksum; uint16_t size; uint8_t spares[8];}flash_hdr_t;typedef struct{ uint32_t name[2]; uint8_t spares[8];}flash_node_t;typedef struct{ flash_hdr_t hdr; flash_node_t node[MAX_FIBRE_DEVICES];}flash_database_t;/* * SNS structures. */#define SNS_DATA_SIZE 608typedef struct{ uint16_t buffer_length; uint16_t reserved; uint32_t buffer_address[2]; uint16_t subcommand_length; uint16_t reserved_1;}sns_hdr_t;typedef struct{ union { struct { sns_hdr_t hdr; uint16_t subcommand; uint8_t param[SNS_DATA_SIZE - sizeof(sns_hdr_t) - 2]; }req; uint8_t rsp[SNS_DATA_SIZE]; }p;}sns_data_t;/* * SNS request/response structures for GP_IDNN. */typedef struct{ uint8_t controlbyte; uint8_t port_id[3]; uint32_t reserved; uint8_t nodename[8];}port_data_t;
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