songer.fit.qmsg

首先将核心板插在我们的EDA底板4.0上面,然后将板上的跳线J20 EXT_SEL跳到ON,也就是插上. 1。源文件保存在src目录

{ "Info" "IFYGR_FYGR_FINISH_LUT_IO_MAC_RAM_PACKING" "" "Info: Finished moving registers into I/Os, LUTs, DSP and RAM blocks" {  } {  } 0}
{ "Info" "IFYGR_FYGR_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "5 unused 3.30 0 5 0 " "Info: Number of I/O pins in group: 5 (unused VREF, 3.30 VCCIO, 0 input, 5 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "LVTTL. " "Info: I/O standards used: LVTTL." {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: Details of I/O bank before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use unused 4 40 " "Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 4 total pin(s) used --  40 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use unused 0 42 " "Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  42 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use 3.30V 1 42 " "Info: I/O bank number 3 does not use VREF pins and has 3.30V VCCIO pins. 1 total pin(s) used --  42 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use unused 0 42 " "Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  42 pins available" {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "after " "Info: Details of I/O bank after I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use 3.30V 9 35 " "Info: I/O bank number 1 does not use VREF pins and has 3.30V VCCIO pins. 9 total pin(s) used --  35 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use unused 0 42 " "Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  42 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use 3.30V 1 42 " "Info: I/O bank number 3 does not use VREF pins and has 3.30V VCCIO pins. 1 total pin(s) used --  42 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use unused 0 42 " "Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  42 pins available" {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "0 " "Info: Fitter placement preparation operations ending: elapsed time = 0 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "4.134 ns register register " "Info: Estimated most critical path is register to register delay of 4.134 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Speakera:u3\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_stratix:wysi_counter\|safe_q\[4\] 1 REG LAB_X25_Y8 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X25_Y8; Fanout = 3; REG Node = 'Speakera:u3\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_stratix:wysi_counter\|safe_q\[4\]'" {  } { { "D:/ep1c12V3/music/db/songer_cmp.qrpt" "" "" { Report "D:/ep1c12V3/music/db/songer_cmp.qrpt" Compiler "songer" "UNKNOWN" "V1" "D:/ep1c12V3/music/db/music.quartus_db" { Floorplan "" "" "" { Speakera:u3|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/alt_counter_stratix.tdf" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/alt_counter_stratix.tdf" 316 9 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.026 ns) + CELL(0.292 ns) 1.318 ns Speakera:u3\|reduce_nor~69 2 COMB LAB_X25_Y7 2 " "Info: 2: + IC(1.026 ns) + CELL(0.292 ns) = 1.318 ns; Loc. = LAB_X25_Y7; Fanout = 2; COMB Node = 'Speakera:u3\|reduce_nor~69'" {  } { { "D:/ep1c12V3/music/db/songer_cmp.qrpt" "" "" { Report "D:/ep1c12V3/music/db/songer_cmp.qrpt" Compiler "songer" "UNKNOWN" "V1" "D:/ep1c12V3/music/db/music.quartus_db" { Floorplan "" "" "1.318 ns" { Speakera:u3|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] Speakera:u3|reduce_nor~69 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.135 ns) + CELL(0.442 ns) 1.895 ns Speakera:u3\|reduce_nor~71 3 COMB LAB_X25_Y7 11 " "Info: 3: + IC(0.135 ns) + CELL(0.442 ns) = 1.895 ns; Loc. = LAB_X25_Y7; Fanout = 11; COMB Node = 'Speakera:u3\|reduce_nor~71'" {  } { { "D:/ep1c12V3/music/db/songer_cmp.qrpt" "" "" { Report "D:/ep1c12V3/music/db/songer_cmp.qrpt" Compiler "songer" "UNKNOWN" "V1" "D:/ep1c12V3/music/db/music.quartus_db" { Floorplan "" "" "0.577 ns" { Speakera:u3|reduce_nor~69 Speakera:u3|reduce_nor~71 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.014 ns) + CELL(1.225 ns) 4.134 ns Speakera:u3\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_stratix:wysi_counter\|safe_q\[2\] 4 REG LAB_X25_Y8 5 " "Info: 4: + IC(1.014 ns) + CELL(1.225 ns) = 4.134 ns; Loc. = LAB_X25_Y8; Fanout = 5; REG Node = 'Speakera:u3\|lpm_counter:\\GenSpkS:Count11\[0\]_rtl_0\|alt_counter_stratix:wysi_counter\|safe_q\[2\]'" {  } { { "D:/ep1c12V3/music/db/songer_cmp.qrpt" "" "" { Report "D:/ep1c12V3/music/db/songer_cmp.qrpt" Compiler "songer" "UNKNOWN" "V1" "D:/ep1c12V3/music/db/music.quartus_db" { Floorplan "" "" "2.239 ns" { Speakera:u3|reduce_nor~71 Speakera:u3|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/alt_counter_stratix.tdf" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/alt_counter_stratix.tdf" 316 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.959 ns 47.39 % " "Info: Total cell delay = 1.959 ns ( 47.39 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.175 ns 52.61 % " "Info: Total interconnect delay = 2.175 ns ( 52.61 % )" {  } {  } 0}  } { { "D:/ep1c12V3/music/db/songer_cmp.qrpt" "" "" { Report "D:/ep1c12V3/music/db/songer_cmp.qrpt" Compiler "songer" "UNKNOWN" "V1" "D:/ep1c12V3/music/db/music.quartus_db" { Floorplan "" "" "4.134 ns" { Speakera:u3|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] Speakera:u3|reduce_nor~69 Speakera:u3|reduce_nor~71 Speakera:u3|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] } "NODE_NAME" } } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_PLACER_ESTIMATED_PERCENT_ROUTING_RESOURCE_USAGE" "1 " "Info: Estimated interconnect usage is 1% of the available device resources" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "0 " "Info: Fitter placement operations ending: elapsed time = 0 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "0 " "Info: Fitter routing operations ending: elapsed time = 0 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Warning" "WFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "1 " "Warning: Following 1 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "CODE1\[3\] GND " "Info: Pin CODE1\[3\] has GND driving its datain port" {  } { { "d:/ep1c6/music/songer.vhd" "" "" { Text "d:/ep1c6/music/songer.vhd" 6 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "CODE1\[3\]" } } } } { "D:/ep1c12V3/music/db/songer_cmp.qrpt" "" "" { Report "D:/ep1c12V3/music/db/songer_cmp.qrpt" Compiler "songer" "UNKNOWN" "V1" "D:/ep1c12V3/music/db/music.quartus_db" { Floorplan "" "" "" { CODE1[3] } "NODE_NAME" } } } { "D:/ep1c12V3/music/songer.fld" "" "" { Floorplan "D:/ep1c12V3/music/songer.fld" "" "" { CODE1[3] } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 1  " "Info: Quartus II Fitter was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Jul 25 23:33:36 2005 " "Info: Processing ended: Mon Jul 25 23:33:36 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Info: Elapsed time: 00:00:10" {  } {  } 0}  } {  } 0}