📄 songer.map.rpt
字号:
; Statistic ; Value ;
+----------------------------------------------+-------+
; Number of registers using Synchronous Clear ; 0 ;
; Number of registers using Synchronous Load ; 11 ;
; Number of registers using Asynchronous Clear ; 12 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 0 ;
; Number of registers using Output Enable ; 0 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+-----------+
; Hierarchy ;
+-----------+
Songer
|-- NoteTabs:u1
|-- lpm_counter:Counter_rtl_2
|-- alt_counter_stratix:wysi_counter
|-- ToneTaba:u2
|-- Speakera:u3
|-- lpm_counter:\DivideCLK:Count4[0]_rtl_1
|-- alt_counter_stratix:wysi_counter
|-- lpm_counter:\GenSpkS:Count11[0]_rtl_0
|-- alt_counter_stratix:wysi_counter
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+---------------------------------------------------------------------------------------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Full Hierarchy Name ;
+------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+---------------------------------------------------------------------------------------------+
; |Songer ; 113 (0) ; 25 ; 0 ; 8 ; 0 ; 88 (0) ; 2 (0) ; 23 (0) ; 23 (0) ; |Songer ;
; |NoteTabs:u1| ; 61 (53) ; 8 ; 0 ; 0 ; 0 ; 53 (53) ; 0 (0) ; 8 (0) ; 8 (0) ; |Songer|NoteTabs:u1 ;
; |lpm_counter:Counter_rtl_2| ; 8 (0) ; 8 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 8 (0) ; 8 (0) ; |Songer|NoteTabs:u1|lpm_counter:Counter_rtl_2 ;
; |alt_counter_stratix:wysi_counter| ; 8 (8) ; 8 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 8 (8) ; 8 (8) ; |Songer|NoteTabs:u1|lpm_counter:Counter_rtl_2|alt_counter_stratix:wysi_counter ;
; |Speakera:u3| ; 22 (7) ; 17 ; 0 ; 0 ; 0 ; 5 (5) ; 2 (2) ; 15 (0) ; 15 (0) ; |Songer|Speakera:u3 ;
; |lpm_counter:\DivideCLK:Count4[0]_rtl_1| ; 4 (0) ; 4 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (0) ; 4 (0) ; |Songer|Speakera:u3|lpm_counter:\DivideCLK:Count4[0]_rtl_1 ;
; |alt_counter_stratix:wysi_counter| ; 4 (4) ; 4 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (4) ; 4 (4) ; |Songer|Speakera:u3|lpm_counter:\DivideCLK:Count4[0]_rtl_1|alt_counter_stratix:wysi_counter ;
; |lpm_counter:\GenSpkS:Count11[0]_rtl_0| ; 11 (0) ; 11 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 11 (0) ; 11 (0) ; |Songer|Speakera:u3|lpm_counter:\GenSpkS:Count11[0]_rtl_0 ;
; |alt_counter_stratix:wysi_counter| ; 11 (11) ; 11 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 11 (11) ; 11 (11) ; |Songer|Speakera:u3|lpm_counter:\GenSpkS:Count11[0]_rtl_0|alt_counter_stratix:wysi_counter ;
; |ToneTaba:u2| ; 30 (30) ; 0 ; 0 ; 0 ; 0 ; 30 (30) ; 0 (0) ; 0 (0) ; 0 (0) ; |Songer|ToneTaba:u2 ;
+------------------------------------------------+-------------+--------------+-------------+------+--------------+--------------+-------------------+------------------+-----------------+---------------------------------------------------------------------------------------------+
+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in D:/ep1c12V3/music/songer.map.eqn.
+---------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read ;
+---------------------------------------------------------------------+-----------------+
; File Name ; Used in Netlist ;
+---------------------------------------------------------------------+-----------------+
; TONETABA.VHD ; yes ;
; NOTETABS.VHD ; yes ;
; SPEAKERA.VHD ; yes ;
; D:/ep1c12V3/music/Songer.vhd ; yes ;
; c:/altera/quartus41/libraries/megafunctions/lpm_counter.tdf ; yes ;
; c:/altera/quartus41/libraries/megafunctions/lpm_constant.inc ; yes ;
; c:/altera/quartus41/libraries/megafunctions/alt_counter_stratix.tdf ; yes ;
; c:/altera/quartus41/libraries/megafunctions/stratix_lcell.inc ; yes ;
+---------------------------------------------------------------------+-----------------+
+----------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+-----------------------------------+----------------------------------------------------------------------------------+
; Resource ; Usage ;
+-----------------------------------+----------------------------------------------------------------------------------+
; Logic cells ; 113 ;
; Total combinational functions ; 111 ;
; Total 4-input functions ; 69 ;
; Total 3-input functions ; 16 ;
; Total 2-input functions ; 3 ;
; Total 1-input functions ; 23 ;
; Total 0-input functions ; 0 ;
; Combinational cells for routing ; 0 ;
; Total registers ; 25 ;
; Total logic cells in carry chains ; 23 ;
; I/O pins ; 8 ;
; Maximum fan-out node ; NoteTabs:u1|lpm_counter:Counter_rtl_2|alt_counter_stratix:wysi_counter|safe_q[0] ;
; Maximum fan-out ; 26 ;
; Total fan-out ; 439 ;
; Average fan-out ; 3.63 ;
+-----------------------------------+----------------------------------------------------------------------------------+
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 4.1 Build 208 09/10/2004 Service Pack 2 SJ Full Version
Info: Processing started: Mon Jul 25 23:33:15 2005
Info: Command: quartus_map --import_settings_files=on --export_settings_files=off music -c songer
Info: Found 2 design units, including 1 entities, in source file TONETABA.VHD
Info: Found design unit 1: ToneTaba-one
Info: Found entity 1: ToneTaba
Info: Found 2 design units, including 1 entities, in source file NOTETABS.VHD
Info: Found design unit 1: NoteTabs-one
Info: Found entity 1: NoteTabs
Info: Found 2 design units, including 1 entities, in source file SPEAKERA.VHD
Info: Found design unit 1: Speakera-one
Info: Found entity 1: Speakera
Info: Using design file Songer.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
Info: Found design unit 1: Songer-one
Info: Found entity 1: Songer
Warning: VHDL Process Statement warning at NOTETABS.VHD(12): signal counter is in statement, but is not in sensitivity list
Info: VHDL Case Statement information at NOTETABS.VHD(175): OTHERS choice is never selected
Warning: VHDL Process Statement warning at TONETABA.VHD(11): signal or variable tone may not be assigned a new value in every possible path through the Process Statement. Signal or variable tone holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design.
Warning: VHDL Process Statement warning at TONETABA.VHD(11): signal or variable code may not be assigned a new value in every possible path through the Process Statement. Signal or variable code holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design.
Warning: VHDL Process Statement warning at TONETABA.VHD(11): signal or variable high may not be assigned a new value in every possible path through the Process Statement. Signal or variable high holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design.
Info: Ignored 16 buffer(s)
Info: Ignored 16 SOFT buffer(s)
Info: Duplicate registers merged to single register
Info: Duplicate register Speakera:u3|SpkS merged to single register Speakera:u3|\DelaySpkS:Count2
Info: Inferred 3 megafunctions from design logic
Info: Inferred lpm_counter megafunction (LPM_WIDTH=11) from the following logic: Speakera:u3|\GenSpkS:Count11[0]~0
Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: Speakera:u3|\DivideCLK:Count4[0]~0
Info: Inferred lpm_counter megafunction (LPM_WIDTH=8) from the following logic: NoteTabs:u1|Counter[0]~0
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus41/libraries/megafunctions/lpm_counter.tdf
Info: Found entity 1: lpm_counter
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus41/libraries/megafunctions/alt_counter_stratix.tdf
Info: Found entity 1: alt_counter_stratix
Warning: Output pins are stuck at VCC or GND
Warning: Pin CODE1[3] stuck at GND
Info: Implemented 121 device resources after synthesis - the final resource count might be different
Info: Implemented 2 input pins
Info: Implemented 6 output pins
Info: Implemented 113 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 6 warnings
Info: Processing ended: Mon Jul 25 23:33:24 2005
Info: Elapsed time: 00:00:09
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