📄 p18f2550.h
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unsigned SCS1:1;
unsigned FLTS:1;
unsigned OSTS:1;
unsigned IRCF0:1;
unsigned IRCF1:1;
unsigned IRCF2:1;
unsigned IDLEN:1;
} OSCCONbits;
extern volatile near unsigned char T0CON;
extern volatile near struct {
unsigned T0PS0:1;
unsigned T0PS1:1;
unsigned T0PS2:1;
unsigned T0PS3:1;
unsigned T0SE:1;
unsigned T0CS:1;
unsigned T08BIT:1;
unsigned TMR0ON:1;
} T0CONbits;
extern volatile near unsigned char TMR0L;
extern volatile near unsigned char TMR0H;
extern near unsigned char STATUS;
extern near struct {
unsigned C:1;
unsigned DC:1;
unsigned Z:1;
unsigned OV:1;
unsigned N:1;
} STATUSbits;
extern near unsigned FSR2;
extern near unsigned char FSR2L;
extern near unsigned char FSR2H;
extern volatile near unsigned char PLUSW2;
extern volatile near unsigned char PREINC2;
extern volatile near unsigned char POSTDEC2;
extern volatile near unsigned char POSTINC2;
extern near unsigned char INDF2;
extern near unsigned char BSR;
extern near unsigned FSR1;
extern near unsigned char FSR1L;
extern near unsigned char FSR1H;
extern volatile near unsigned char PLUSW1;
extern volatile near unsigned char PREINC1;
extern volatile near unsigned char POSTDEC1;
extern volatile near unsigned char POSTINC1;
extern near unsigned char INDF1;
extern near unsigned char WREG;
extern near unsigned FSR0;
extern near unsigned char FSR0L;
extern near unsigned char FSR0H;
extern volatile near unsigned char PLUSW0;
extern volatile near unsigned char PREINC0;
extern volatile near unsigned char POSTDEC0;
extern volatile near unsigned char POSTINC0;
extern near unsigned char INDF0;
extern volatile near unsigned char INTCON3;
extern volatile near union {
struct {
unsigned INT1IF:1;
unsigned INT2IF:1;
unsigned :1;
unsigned INT1IE:1;
unsigned INT2IE:1;
unsigned :1;
unsigned INT1IP:1;
unsigned INT2IP:1;
};
struct {
unsigned INT1F:1;
unsigned INT2F:1;
unsigned :1;
unsigned INT1E:1;
unsigned INT2E:1;
unsigned :1;
unsigned INT1P:1;
unsigned INT2P:1;
};
} INTCON3bits;
extern volatile near unsigned char INTCON2;
extern volatile near union {
struct {
unsigned RBIP:1;
unsigned :1;
unsigned TMR0IP:1;
unsigned :1;
unsigned INTEDG2:1;
unsigned INTEDG1:1;
unsigned INTEDG0:1;
unsigned NOT_RBPU:1;
};
struct {
unsigned :2;
unsigned T0IP:1;
unsigned :4;
unsigned RBPU:1;
};
} INTCON2bits;
extern volatile near unsigned char INTCON;
extern volatile near union {
struct {
unsigned RBIF:1;
unsigned INT0IF:1;
unsigned TMR0IF:1;
unsigned RBIE:1;
unsigned INT0IE:1;
unsigned TMR0IE:1;
unsigned PEIE:1;
unsigned GIE:1;
};
struct {
unsigned :1;
unsigned INT0F:1;
unsigned T0IF:1;
unsigned :1;
unsigned INT0E:1;
unsigned T0IE:1;
unsigned GIEL:1;
unsigned GIEH:1;
};
} INTCONbits;
extern near unsigned PROD;
extern near unsigned char PRODL;
extern near unsigned char PRODH;
extern volatile near unsigned char TABLAT;
extern volatile near unsigned short long TBLPTR;
extern volatile near unsigned char TBLPTRL;
extern volatile near unsigned char TBLPTRH;
extern volatile near unsigned char TBLPTRU;
extern volatile near unsigned short long PC;
extern volatile near unsigned char PCL;
extern volatile near unsigned char PCLATH;
extern volatile near unsigned char PCLATU;
extern volatile near unsigned char STKPTR;
extern volatile near struct {
unsigned STKPTR0:1;
unsigned STKPTR1:1;
unsigned STKPTR2:1;
unsigned STKPTR3:1;
unsigned STKPTR4:1;
unsigned :1;
unsigned STKUNF:1;
unsigned STKOVF:1;
} STKPTRbits;
extern near unsigned short long TOS;
extern near unsigned char TOSL;
extern near unsigned char TOSH;
extern near unsigned char TOSU;
/*-------------------------------------------------------------------------
* Some useful defines for inline assembly stuff
*-------------------------------------------------------------------------*/
#define ACCESS 0
#define BANKED 1
/*-------------------------------------------------------------------------
* Some useful macros for inline assembly stuff
*-------------------------------------------------------------------------*/
#define Nop() {_asm nop _endasm}
#define ClrWdt() {_asm clrwdt _endasm}
#define Sleep() {_asm sleep _endasm}
#define Reset() {_asm reset _endasm}
#define Rlcf(f,dest,access) {_asm movlb f rlcf f,dest,access _endasm}
#define Rlncf(f,dest,access) {_asm movlb f rlncf f,dest,access _endasm}
#define Rrcf(f,dest,access) {_asm movlb f rrcf f,dest,access _endasm}
#define Rrncf(f,dest,access) {_asm movlb f rrncf f,dest,access _endasm}
#define Swapf(f,dest,access) {_asm movlb f swapf f,dest,access _endasm }
/*-------------------------------------------------------------------------
* A fairly inclusive set of registers to save for interrupts.
* These are locations which are commonly used by the compiler.
*-------------------------------------------------------------------------*/
#define INTSAVELOCS TBLPTR, TABLAT, PROD
/*-------------------------------------------------------------------------
* Defines for configuration words:
* _CONFIG_DECL should be placed between a #pragma romdata CONFIG
* and a #pragma romdata. For example: ,
* #pragma romdata CONFIG
* _CONFIG_DECL(...)
* #pragma romdata
* NOTE: This macro only works when using the default linker script files
* and the CONFIG section exists.
*-------------------------------------------------------------------------*/
#define _CONFIG_DECL(_CONFIG1L, \
_CONFIG1H, \
_CONFIG2L, \
_CONFIG2H, \
_CONFIG3H, \
_CONFIG4L, \
_CONFIG5L, \
_CONFIG5H, \
_CONFIG6L, \
_CONFIG6H, \
_CONFIG7L, \
_CONFIG7H) \
const rom unsigned char _configuration[14] = { \
_CONFIG1L, \
_CONFIG1H, \
_CONFIG2L, \
_CONFIG2H, \
0xFF, \
_CONFIG3H, \
_CONFIG4L, \
0xFF, \
_CONFIG5L, \
_CONFIG5H, \
_CONFIG6L, \
_CONFIG6H, \
_CONFIG7L, \
_CONFIG7H \
}
/*-------------------------------------------------------------------------
* CONFIG1L (0x300000)
*-------------------------------------------------------------------------*/
#define _CONFIG1L_DEFAULT 0x38
#define _PLLDIV_1_1L 0xF8 //; No devide (4MHz input)
#define _PLLDIV_2_1L 0xF9 //; Divide by 2 (8MHz input)
#define _PLLDIV_3_1L 0xFA //; Divide by 3 (12MHz input)
#define _PLLDIV_4_1L 0xFB //; Divide by 4 (16MHz input)
#define _PLLDIV_5_1L 0xFC //; Divide by 5 (20MHz input)
#define _PLLDIV_6_1L 0xFD //; Divide by 6 (24MHz input)
#define _PLLDIV_10_1L 0xFE //; Divide by 10 (40MHz input)
#define _PLLDIV_12_1L 0xFF //; Divide by 12 (48MHz input)
#define _CPUDIV_OSC1_PLL2_1L 0xE7 //; [OSC1/OSC2 Src: /1][96MHz PLL Src: /2]
#define _CPUDIV_OSC2_PLL3_1L 0xEF //; [OSC1/OSC2 Src: /2][96MHz PLL Src: /3]
#define _CPUDIV_OSC3_PLL4_1L 0xF7 //; [OSC1/OSC2 Src: /3][96MHz PLL Src: /4]
#define _CPUDIV_OSC4_PLL6_1L 0xFF //; [OSC1/OSC2 Src: /4][96MHz PLL Src: /6]
#define _USBDIV_1_1L 0xDF //; Clock source from OSC1/OSC2
#define _USBDIV_2_1L 0xFF //; Clock source from 96MHz PLL/2
/*-------------------------------------------------------------------------
* CONFIG1H (0x300001)
*-------------------------------------------------------------------------*/
#define _CONFIG1H_DEFAULT 0xCF
#define _FOSC_XT_XT_1H 0xF0 //; XT oscillator, XT used by USB
#define _FOSC_XTPLL_XT_1H 0xF2 //; XT oscillator, PLL enabled, XT used by USB
#define _FOSC_ECIO_EC_1H 0xF4 //; External clock, port function on RA6, EC used by USB
#define _FOSC_EC_EC_1H 0xF5 //; External clock, CLKOUT on RA6, EC used by USB
#define _FOSC_ECPLLIO_EC_1H 0xF6 //; External clock, PLL enabled, port function on RA6, EC used by USB
#define _FOSC_ECPLL_EC_1H 0xF7 //; External clock, PLL enabled, CLKOUT on RA6, EC used by USB
#define _FOSC_INTOSCIO_EC_1H 0xF8 //; Internal oscillator, port function on RA6, EC used by USB
#define _FOSC_INTOSC_EC_1H 0xF9 //; Internal oscillator, CLKOUT on RA6, EC used by USB
#define _FOSC_INTOSC_XT_1H 0xFA //; Internal oscillator, XT used by USB
#define _FOSC_INTOSC_HS_1H 0xFB //; Internal oscillator, HS used by USB
#define _FOSC_HS_1H 0xFC //; HS oscillator, HS used by USB
#define _FOSC_HSPLL_HS_1H 0xFE //; HS oscillator, PLL enabled, HS used by USB
#define _FCMEM_OFF_1H 0xBF //; Disabled
#define _FCMEM_ON_1H 0xFF //; Enabled
#define _IESO_OFF_1H 0x7F //; Disabled
#define _IESO_ON_1H 0xFF //; Enabled
/*-------------------------------------------------------------------------
* CONFIG2L (0x300002)
*-------------------------------------------------------------------------*/
#define _CONFIG2L_DEFAULT 0x3F
#define _PWRT_ON_2L 0xFE
#define _PWRT_OFF_2L 0xFF
#define _BOR_OFF_2L 0xFD
#define _BOR_ON_2L 0xFF
#define _BORV_45_2L 0xF3
#define _BORV_42_2L 0xF7
#define _BORV_27_2L 0xFB
#define _BORV_25_2L 0xFF
#define _VREGEN_OFF_2L 0xDF
#define _VREGEN_ON_2L 0xFF
/*-------------------------------------------------------------------------
* CONFIG2H (0x300003)
*-------------------------------------------------------------------------*/
#define _CONFIG2H_DEFAULT 0x1F
#define _WDT_OFF_2H 0xFE
#define _WDT_ON_2H 0xFF
#define _WDTPS_1_2H 0xF1
#define _WDTPS_2_2H 0xF3
#define _WDTPS_4_2H 0xF5
#define _WDTPS_8_2H 0xF7
#define _WDTPS_16_2H 0xF9
#define _WDTPS_32_2H 0xFB
#define _WDTPS_64_2H 0xFD
#define _WDTPS_128_2H 0xFF
#define _WDTPS_256_2H 0xF1
#define _WDTPS_512_2H 0xF3
#define _WDTPS_1024_2H 0xF5
#define _WDTPS_2048_2H 0xF7
#define _WDTPS_4096_2H 0xF9
#define _WDTPS_8192_2H 0xFB
#define _WDTPS_16384_2H 0xFD
#define _WDTPS_32768_2H 0xFF
/*-------------------------------------------------------------------------
* CONFIG3H (0x300005)
*-------------------------------------------------------------------------*/
#define _CONFIG3H_DEFAULT 0x81
#define _CCP2MUX_OFF_3H 0xFE
#define _CCP2MUX_ON_3H 0xFF
#define _MCLRE_OFF_3H 0x7F
#define _MCLRE_ON_3H 0xFF
#define _LPT1OSC_OFF_3H 0xFB // Timer1 oscillator configured for high power
#define _LPT1OSC_ON_3H 0xFF // Timer1 oscillator configured for low power
#define _PBADEN_OFF_3H 0xFD // PortB<4:0> pins are configured as digital I/O on RESET
#define _PBADEN_ON_3H 0xFF // PortB<4:0> pins are configured as analog input on RESET
/*-------------------------------------------------------------------------
* CONFIG4L (0x300006)
*-------------------------------------------------------------------------*/
#define _CONFIG4L_DEFAULT 0xE5
#define _STVR_OFF_4L 0xFE
#define _STVR_ON_4L 0xFF
#define _LVP_OFF_4L 0xFB
#define _LVP_ON_4L 0xFF
#define _DEBUG_ON_4L 0x7F
#define _DEBUG_OFF_4L 0xFF
#define _ICPRT_OFF_4L 0xDF
#define _ICPRT_ON_4L 0xFF
#define _XINST_OFF_4L 0xBF
#define _XINST_ON_4L 0xFF
/*-------------------------------------------------------------------------
* CONFIG5L (0x300008)
*-------------------------------------------------------------------------*/
#define _CONFIG5L_DEFAULT 0x0F
#define _CP0_ON_5L 0xFE
#define _CP0_OFF_5L 0xFF
#define _CP1_ON_5L 0xFD
#define _CP1_OFF_5L 0xFF
#define _CP2_ON_5L 0xFB
#define _CP2_OFF_5L 0xFF
#define _CP3_ON_5L 0xF7
#define _CP3_OFF_5L 0xFF
/*-------------------------------------------------------------------------
* CONFIG5H (0x300009)
*-------------------------------------------------------------------------*/
#define _CONFIG5H_DEFAULT 0xC0
#define _CPB_ON_5H 0xBF
#define _CPB_OFF_5H 0xFF
#define _CPD_ON_5H 0x7F
#define _CPD_OFF_5H 0xFF
/*-------------------------------------------------------------------------
* CONFIG6L (0x30000a)
*-------------------------------------------------------------------------*/
#define _CONFIG6L_DEFAULT 0x0F
#define _WRT0_ON_6L 0xFE
#define _WRT0_OFF_6L 0xFF
#define _WRT1_ON_6L 0xFD
#define _WRT1_OFF_6L 0xFF
#define _WRT2_ON_6L 0xFB
#define _WRT2_OFF_6L 0xFF
#define _WRT3_ON_6L 0xF7
#define _WRT3_OFF_6L 0xFF
/*-------------------------------------------------------------------------
* CONFIG6H (0x30000b)
*-------------------------------------------------------------------------*/
#define _CONFIG6H_DEFAULT 0xE0
#define _WPB_ON_6H 0xBF
#define _WPB_OFF_6H 0xFF
#define _WPC_ON_6H 0xDF
#define _WPC_OFF_6H 0xFF
#define _WPD_ON_6H 0x7F
#define _WPD_OFF_6H 0xFF
/*-------------------------------------------------------------------------
* CONFIG7L (0x30000c)
*-------------------------------------------------------------------------*/
#define _CONFIG7L_DEFAULT 0x0F
#define _EBTR0_ON_7L 0xFE
#define _EBTR0_OFF_7L 0xFF
#define _EBTR1_ON_7L 0xFD
#define _EBTR1_OFF_7L 0xFF
#define _EBTR2_ON_7L 0xFB
#define _EBTR2_OFF_7L 0xFF
#define _EBTR3_ON_7L 0xF7
#define _EBTR3_OFF_7L 0xFF
/*-------------------------------------------------------------------------
* CONFIG7H (0x30000d)
*-------------------------------------------------------------------------*/
#define _CONFIG7H_DEFAULT 0x40
#define _EBTRB_ON_7H 0xBF
#define _EBTRB_OFF_7H 0xFF
#endif
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