eeprom_tb.v

I2C通信的程序

`resetall
`timescale 1ns/100ps
module eeprom_tb;
    wire SCL;
    reg RESET,CLK,nrw,cs;
    reg [6:0] ADDR;
    wire SDA;
    wire [7:0] DATA;
    wire link_sda;
    wire link_read;
    EEPROM_WR u1(SDA, SCL,RESET, CLK, nrw, cs, ADDR, DATA, link_sda,link_read);
    
    reg int_clk;
    reg sda_temp;
    reg [7:0] data_temp;
    initial
    begin
        int_clk=0;
        forever #1 int_clk=~int_clk;
    end
    always@(int_clk)
    CLK=int_clk;
 assign SDA = (link_sda) ? 1'bz : sda_temp;
 assign DATA = (link_read) ? 8'hzz : data_temp;    
initial
begin
    RESET=1;
    cs=1;
    nrw=0;
    ADDR=7'b0;
    data_temp=8'b11010001;
    sda_temp=0;
    #10 RESET=0;
    #2 ADDR=7'b0000001;
    #6 nrw=1;
       cs=0;
    #10 nrw=0;
        cs=1;
    #50 sda_temp=1;
    

    
#100 cs=0;
#10  cs=1;
wait(!link_sda);
sda_temp=0;
#4 sda_temp=1;
#4 sda_temp=1;
#4 sda_temp=0;
#4 sda_temp=0;
#4 sda_temp=0;
#4 sda_temp=1;
#4 sda_temp=0;
#4 sda_temp=1;

#1000; 
$stop;
end
endmodule