hal_arch.h

ecos下的gui开发源代码

//--------------------------------------------------------------------------
// Thread register state manipulation for GDB support.

// Default to a 32 bit register size for GDB register dumps.
#ifndef CYG_HAL_GDB_REG
#define CYG_HAL_GDB_REG CYG_WORD32
#endif

// Translate a stack pointer as saved by the thread context macros above into
// a pointer to a HAL_SavedRegisters structure.
#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ )          \
        (_regs_) = (HAL_SavedRegisters *)(_sp_)

// If the CPU has an FPU, we also need to move the FPU registers.

#define HAL_GET_GDB_FPU_REGISTERS( _regval_ , _regs_ )
#define HAL_SET_GDB_FPU_REGISTERS( _regs_ , _regval_ )

// Some targets also report the state of all the coprocessor 0
// registers to GDB. If that is the case then
// CYGPKG_HAL_SCORE_GDB_REPORT_CP0 will be defined and the
// HAL_[G|S]ET_CP0_REGISTER_*() macros will be defined.

#define HAL_GET_GDB_CP0_REGISTERS( _regval_, _regs_ )
#define HAL_SET_GDB_CP0_REGISTERS( _regval_, _regs_ )

// Copy a set of registers from a HAL_SavedRegisters structure into a
// GDB ordered array.    
#define HAL_GET_GDB_REGISTERS( _aregval_ , _regs_ )             \
{                                                               \
    CYG_HAL_GDB_REG *_regval_ = (CYG_HAL_GDB_REG *)(_aregval_); \
    int _i_;                                                    \
                                                                \
    for( _i_ = 0; _i_ < 32; _i_++ )                             \
        _regval_[_i_] = (_regs_)->d[_i_];                       \
                                                                \
    HAL_GET_GDB_FPU_REGISTERS( _regval_, _regs_ );              \
                                                                \
    _regval_[32] = (_regs_)->sr;                                \
    _regval_[33] = (_regs_)->cond;                              \
    _regval_[34] = (_regs_)->cause;                             \
    _regval_[35] = (_regs_)->excpvec;                           \
    _regval_[36] = (_regs_)->ccr;                               \
    _regval_[37] = (_regs_)->epc;                               \
    _regval_[38] = (_regs_)->ema;                               \
    _regval_[39] = (_regs_)->tlblock;                           \
    _regval_[40] = (_regs_)->tlbpt;                             \
    _regval_[41] = (_regs_)->peaddr;                            \
    _regval_[42] = (_regs_)->tlbrpt;                            \
    _regval_[43] = (_regs_)->pevn;                              \
    _regval_[44] = (_regs_)->pectx;                             \
    _regval_[45] = (_regs_)->limpfn;                            \
    _regval_[46] = (_regs_)->ldmpfn;                            \
    _regval_[47] = (_regs_)->prev;                              \
    _regval_[48] = (_regs_)->dreg;                              \
    _regval_[49] = (_regs_)->pc;                                \
    _regval_[50] = (_regs_)->dsave;                             \
    _regval_[51] = (_regs_)->counter;                           \
    _regval_[52] = (_regs_)->ldcr;                              \
    _regval_[53] = (_regs_)->stcr;                              \
    _regval_[54] = (_regs_)->ceh;                               \
    _regval_[55] = (_regs_)->cel;                               \
                                                                \
    HAL_GET_GDB_CP0_REGISTERS( _regval_, _regs_ );              \
}

// Copy a GDB ordered array into a HAL_SavedRegisters structure.
#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ )             \
{                                                               \
    CYG_HAL_GDB_REG *_regval_ = (CYG_HAL_GDB_REG *)(_aregval_); \
    int _i_;                                                    \
                                                                \
    for( _i_ = 0; _i_ < 32; _i_++ )                             \
        (_regs_)->d[_i_] = _regval_[_i_];                       \
                                                                \
    HAL_SET_GDB_FPU_REGISTERS( _regs_, _regval_ );              \
                                                                \
    (_regs_)->sr = _regval_[32];                                \
    (_regs_)->cond = _regval_[33];                              \
    (_regs_)->cause = _regval_[34];                             \
    (_regs_)->excpvec = _regval_[35];                           \
    (_regs_)->ccr = _regval_[36];                               \
    (_regs_)->epc = _regval_[37];                               \
    (_regs_)->ema = _regval_[38];                               \
    (_regs_)->tlblock = _regval_[39];                           \
    (_regs_)->tlbpt = _regval_[40];                             \
    (_regs_)->peaddr = _regval_[41];                            \
    (_regs_)->tlbrpt = _regval_[42];                            \
    (_regs_)->pevn = _regval_[43];                              \
    (_regs_)->pectx = _regval_[44];                             \
    (_regs_)->limpfn = _regval_[45];                            \
    (_regs_)->ldmpfn = _regval_[46];                            \
    (_regs_)->prev = _regval_[47];                              \
    (_regs_)->dreg = _regval_[48];                              \
    (_regs_)->pc = _regval_[49];                                \
    (_regs_)->dsave = _regval_[50];                             \
    (_regs_)->counter = _regval_[51];                           \
    (_regs_)->ldcr = _regval_[52];                              \
    (_regs_)->stcr = _regval_[53];                              \
    (_regs_)->ceh = _regval_[54];                               \
    (_regs_)->cel = _regval_[55];                               \
                                                                \
    HAL_SET_GDB_CP0_REGISTERS( _regval_, _regs_ );              \
}

//--------------------------------------------------------------------------
// HAL setjmp
// Note: These definitions are repeated in hal_arch.h. If changes are
// required remember to update both sets.

#define CYGARC_JMP_BUF_SP        0
#define CYGARC_JMP_BUF_R12       1
#define CYGARC_JMP_BUF_R13       2
#define CYGARC_JMP_BUF_R14       3
#define CYGARC_JMP_BUF_R15       4
#define CYGARC_JMP_BUF_R16       5
#define CYGARC_JMP_BUF_R17       6
#define CYGARC_JMP_BUF_R18       7
#define CYGARC_JMP_BUF_R19       8
#define CYGARC_JMP_BUF_R20       9
#define CYGARC_JMP_BUF_R21      10
#define CYGARC_JMP_BUF_LR      	11
#define CYGARC_JMP_BUF_BP      	12
#define CYGARC_JMP_BUF_R29     	13

#define CYGARC_JMP_BUF_SIZE     14

typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE];

externC int hal_setjmp(hal_jmp_buf env);
externC void hal_longjmp(hal_jmp_buf env, int val);

//-------------------------------------------------------------------------
// Idle thread code.
// This macro is called in the idle thread loop, and gives the HAL the
// chance to insert code. Typical idle thread behaviour might be to halt the
// processor.

externC void hal_idle_thread_action(cyg_uint32 loop_count);

#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_)

//--------------------------------------------------------------------------
// Minimal and sensible stack sizes: the intention is that applications
// will use these to provide a stack size in the first instance prior to
// proper analysis.  Idle thread stack should be this big.

//    THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
//           THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!

// This is not a config option because it should not be adjusted except
// under "enough rope" sort of disclaimers.

// Typical case stack frame size: return link + 4 pushed registers + some locals.
#define CYGNUM_HAL_STACK_FRAME_SIZE (48)

// Stack needed for a context switch:

#define CYGNUM_HAL_STACK_CONTEXT_SIZE ((32+10)*4)

// Interrupt + call to ISR, interrupt_end() and the DSR
#define CYGNUM_HAL_STACK_INTERRUPT_SIZE (4+2*CYGNUM_HAL_STACK_CONTEXT_SIZE) 

#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK

// An interrupt stack which is large enough for all possible interrupt
// conditions (and only used for that purpose) exists.  "User" stacks
// can be much smaller

#define CYGNUM_HAL_STACK_SIZE_MINIMUM (CYGNUM_HAL_STACK_CONTEXT_SIZE+      \
                                       CYGNUM_HAL_STACK_INTERRUPT_SIZE*2+  \
                                       CYGNUM_HAL_STACK_FRAME_SIZE*8)
#define CYGNUM_HAL_STACK_SIZE_TYPICAL (CYGNUM_HAL_STACK_SIZE_MINIMUM+1024)

#else // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK 

// No separate interrupt stack exists.  Make sure all threads contain
// a stack sufficiently large.

#define CYGNUM_HAL_STACK_SIZE_MINIMUM (4096)
#define CYGNUM_HAL_STACK_SIZE_TYPICAL (4096)

#endif

#endif /* __ASSEMBLER__ */

// Convenience macros for accessing memory cached or uncached
#define CYGARC_KSEG_MASK                               (0xE0000000)
#define CYGARC_KSEG_CACHED                             (0x80000000)
#define CYGARC_KSEG_UNCACHED                           (0xA0000000)
#define CYGARC_KSEG_CACHED_BASE                        (0x80000000)
#define CYGARC_KSEG_UNCACHED_BASE                      (0xA0000000)
#ifndef __ASSEMBLER__
#define CYGARC_CACHED_ADDRESS(x)                       ((((CYG_ADDRESS)(x)) & ~CYGARC_KSEG_MASK) | CYGARC_KSEG_CACHED)
#define CYGARC_UNCACHED_ADDRESS(x)                     ((((CYG_ADDRESS)(x)) & ~CYGARC_KSEG_MASK) | CYGARC_KSEG_UNCACHED)
#define CYGARC_PHYSICAL_ADDRESS(x)                     (((CYG_ADDRESS)(x)) & ~CYGARC_KSEG_MASK)
#else // __ASSEMBLER__
#define CYGARC_CACHED_ADDRESS(x)                       ((((x)) & ~CYGARC_KSEG_MASK) | CYGARC_KSEG_CACHED)
#define CYGARC_UNCACHED_ADDRESS(x)                     ((((x)) & ~CYGARC_KSEG_MASK) | CYGARC_KSEG_UNCACHED)
#define CYGARC_PHYSICAL_ADDRESS(x)                     (((x)) & ~CYGARC_KSEG_MASK)
#define CYGARC_ADDRESS_REG_CACHED(reg)                 \
        and     reg, reg, ~CYGARC_KSEG_MASK;           \
        or      reg, reg, CYGARC_KSEG_CACHED
#define CYGARC_ADDRESS_REG_UNCACHED(reg)               \
        and     reg, reg, ~CYGARC_KSEG_MASK;           \
        or      reg, reg, CYGARC_KSEG_UNCACHED
#endif /* __ASSEMBLER__ */

//--------------------------------------------------------------------------
// Macros for switching context between two eCos instances (jump from
// code in ROM to code in RAM or vice versa).
#define CYGARC_HAL_SAVE_GP()                    \
    CYG_MACRO_START                             \
    register CYG_ADDRWORD __gp_save;            \
    asm volatile ( "mv   %0,r28;"             \
                   ".extern _gp;"               \
                   "la     r28,_gp;"            \
                     : "=r"(__gp_save))

#define CYGARC_HAL_RESTORE_GP()                                 \
    asm volatile ( "mv   r28,%0;" :: "r"(__gp_save) );        \
    CYG_MACRO_END


//--------------------------------------------------------------------------
// Macro for finding return address. 
#define CYGARC_HAL_GET_RETURN_ADDRESS(_x_, _dummy_) \
  asm volatile ( "mv %0,r3;" : "=r" (_x_) )

#define CYGARC_HAL_GET_RETURN_ADDRESS_BACKUP(_dummy_)

//--------------------------------------------------------------------------
#endif // CYGONCE_HAL_HAL_ARCH_H
// End of hal_arch.h