📄 plf_spce3200.h
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#define P_TIMER4_CCP_CTRL (UV32*)0x88164004#define P_TIMER4_PRELOAD_DATA (UV32*)0x88164008#define P_TIMER4_CCP_DATA (UV32*)0x8816400C#define P_TIMER4_COUNT_DATA (UV32*)0x88164010#define P_TIMER5_CLK_CONF (UV32*)0x88210080#define P_TIMER5_MODE_CTRL (UV32*)0x88165000#define P_TIMER5_CCP_CTRL (UV32*)0x88165004#define P_TIMER5_PRELOAD_DATA (UV32*)0x88165008#define P_TIMER5_CCP_DATA (UV32*)0x8816500C#define P_TIMER5_COUNT_DATA (UV32*)0x88165010//**************************************************************//// RTC ////**************************************************************//#define P_RTC_CLK_CONF (UV32*)0x88210088#define P_RTC_TIME_SEC (UV32*)0x88166000#define P_RTC_TIME_MIN (UV32*)0x88166004#define P_RTC_TIME_HOUR (UV32*)0x88166008#define P_RTC_ALM_SEC (UV32*)0x8816600C#define P_RTC_ALM_MIN (UV32*)0x88166010#define P_RTC_ALM_HOUR (UV32*)0x88166014#define P_RTC_MODE_CTRL (UV32*)0x88166018#define P_RTC_INT_STATUS (UV32*)0x8816601C//**************************************************************//// TMB ////**************************************************************//#define P_TMB_CLK_CONF (UV32*)0x882100E0#define P_TMB_MODE_CTRL (UV32*)0x88166020#define P_TMB_INT_STATUS (UV32*)0x88166024#define P_TMB_RESET_COMMAND (UV32*)0x88166028//**************************************************************//// UART ////**************************************************************//#define P_UART_CLK_CONF (UV32*)0x8821005C#define P_UART_INTERFACE_SEL (UV32*)0x88200000#define P_UART_GPIO_SETUP (UV32*)0x88200040#define P_UART_GPIO_INPUT (UV32*)0x88200074#define P_UART_GPIO_INT (UV32*)0x88200094#define P_UART_MODE_CTRL (UV32*)0x88150008#define P_UART_BAUDRATE_SETUP (UV32*)0x8815000C#define P_UART_TXRX_STATUS (UV32*)0x88150010#define P_UART_ERR_STATUS (UV32*)0x88150004#define P_UART_TXRX_DATA (UV32*)0x88150000#define P_UART_WAKEUP_STATUS (UV32*)0x88210110//**************************************************************//// SPI ////**************************************************************//#define P_SPI_CLK_CONF (UV32*)0x88210098#define P_SPI_INTERFACE_SEL (UV32*)0x882000A4#define P_SPI_MODE_CTRL (UV32*)0x88110000#define P_SPI_TX_STATUS (UV32*)0x88110004#define P_SPI_TX_DATA (UV32*)0x88110008#define P_SPI_RX_STATUS (UV32*)0x8811000C#define P_SPI_RX_DATA (UV32*)0x88110010#define P_SPI_TXRX_STATUS (UV32*)0x88110014//**************************************************************//// I2C ////**************************************************************//#define P_I2C_CLK_CONF (UV32*)0x88210094#define P_I2C_INTERFACE_SEL (UV32*)0x88200004#define P_I2C_GPIO_SETUP (UV32*)0x88200044#define P_I2C_GPIO_INPUT (UV32*)0x88200074#define P_I2C_GPIO_INT (UV32*)0x88200098#define P_I2C_MODE_CTRL (UV32*)0x88130020#define P_I2C_INT_STATUS (UV32*)0x88130024#define P_I2C_RATE_SETUP (UV32*)0x88130028#define P_I2C_SLAVE_ADDR (UV32*)0x8813002C#define P_I2C_DATA_ADDR (UV32*)0x88130030#define P_I2C_TX_DATA (UV32*)0x88130034#define P_I2C_RX_DATA (UV32*)0x88130038//**************************************************************//// SIO ////**************************************************************//#define P_SIO_INTERFACE_SEL (UV32*)0x88200004#define P_JTAG_GPIO_SETUP (UV32*)0x88200034#define P_JTAG_GPIO_INPUT (UV32*)0x88200070#define P_JTAG_GPIO_INT (UV32*)0x8820008C#define P_SIO_CLK_CONF (UV32*)0x882100A0#define P_SIO_MODE_CTRL (UV32*)0x88120000#define P_SIO_AUTO_CTRL (UV32*)0x88120004#define P_SIO_DATA_ADDR (UV32*)0x88120008#define P_SIO_TXRX_DATA (UV32*)0x8812000C//**************************************************************//// SD Card ////**************************************************************//#define P_SD_INTERFACE_SEL (UV32*)0x882000A4#define P_SD_CLK_CONF (UV32*)0x882100A4#define P_SD_MODE_CTRL (UV32*)0x88180018#define P_SD_INT_CTRL (UV32*)0x8818001C#define P_SD_INT_STATUS (UV32*)0x88180014#define P_SD_COMMAND_SETUP (UV32*)0x88180008#define P_SD_ARGUMENT_DATA (UV32*)0x8818000C#define P_SD_RESPONSE_DATA (UV32*)0x88180010#define P_SD_TX_DATA (UV32*)0x88180000#define P_SD_RX_DATA (UV32*)0x88180004//**************************************************************//// NAND ////**************************************************************//#define P_NAND_INTERFACE_SEL (UV32*)0x882000A4#define P_NAND_GPIO_SETUP (UV32*)0x8820002C#define P_NAND_GPIO_PULL (UV32*)0x88200030#define P_NAND_GPIO_INPUT (UV32*)0x8820006C#define P_NAND_GPIO_INT (UV32*)0x88200088#define P_NAND_CLK_CONF (UV32*)0x882100A8#define P_NAND_INT_CTRL (UV32*)0x88190014#define P_NAND_MODE_CTRL (UV32*)0x88190000#define P_NAND_CLE_COMMAND (UV32*)0x88190004#define P_NAND_ALE_ADDR (UV32*)0x88190008#define P_NAND_TX_DATA (UV32*)0x8819000C#define P_NAND_RX_DATA (UV32*)0x88190010#define P_NAND_INT_STATUS (UV32*)0x88190018#define P_NAND_ECC_TRUELP (UV32*)0x8819001C#define P_NAND_ECC_TRUECP (UV32*)0x88190020#define P_NAND_ECC_CMPLP (UV32*)0x88190024#define P_NAND_ECC_CMPCP (UV32*)0x88190028#define P_NAND_ECC_STATUS (UV32*)0x8819002C#define P_NAND_ECC_CTRL (UV32*)0x88190030//**************************************************************//// NOR ////**************************************************************//#define P_NOR_COMMAND_CTRL (UV32*)0x880700BC#define P_NOR_BANK_SETUP (UV32*)0x880700C4//**************************************************************//// LCD ////**************************************************************//#define P_TFT_MODE_CTRL (UV32*)0x88040000#define P_TFT_DATA_FMT (UV32*)0x88040004#define P_TFT_HOR_ACT (UV32*)0x88040008#define P_TFT_HOR_FRONT (UV32*)0x8804000C#define P_TFT_HOR_BACK (UV32*)0x88040010#define P_TFT_HOR_SYNC (UV32*)0x88040014#define P_TFT_VER_ACT (UV32*)0x88040018#define P_TFT_VER_FRONT (UV32*)0x8804001C#define P_TFT_VER_BACK (UV32*)0x88040020#define P_TFT_VER_SYNC (UV32*)0x88040024#define P_TFT_FRAME_FMT1 (UV32*)0x88040028#define P_TFT_ROW_START (UV32*)0x8804002C#define P_TFT_COL_START (UV32*)0x88040030#define P_TFT_COL_WIDTH (UV32*)0x88040034#define P_TFT_DUMMY_WIDTH (UV32*)0x88040038#define P_TFT_BUFFER_STATUS (UV32*)0x8804003C#define P_TFT_DATA_SEQ (UV32*)0x88040040#define P_TFT_INT_STATUS (UV32*)0x88040050#define P_TFT_FRAME_FMT2 (UV32*)0x880400A0#define P_LCD_CLK_CONF (UV32*)0x88210034#define P_LCD_CLK_SEL (UV32*)0x88210038#define P_LCD_INTERFACE_SEL (UV32*)0x88200000#define P_LCD_BUFFER_SA1 (UV32*)0x8807000C#define P_LCD_BUFFER_SA2 (UV32*)0x88070010#define P_LCD_BUFFER_SA3 (UV32*)0x88070014#define P_LCD_BUFFER_SEL (UV32*)0x88090024#define P_TFT_GPIO_DATA (UV32*)0x88200014#define P_TFT_GPIO_OUTPUTEN (UV32*)0x88200018#define P_TFT_GPIO_PULLUP (UV32*)0x8820001C#define P_TFT_GPIO_PULLDOWN (UV32*)0x88200020#define P_TFT_GPIO_INPUT (UV32*)0x88200064#define P_TFT_GPIO_INT (UV32*)0x88200080#define P_STN_MODE_CTRL (UV32*)0x88041000#define P_STN_PIXEL_CLK (UV32*)0x88041004#define P_STN_SEGMENT_NUM (UV32*)0x88041008#define P_STN_COMMON_NUM (UV32*)0x8804100C#define P_STN_ROW_START (UV32*)0x88041010#define P_STN_COL_START (UV32*)0x88041014#define P_STN_DUMMY_WIDTH (UV32*)0x88041018#define P_STN_LINE_COUNT (UV32*)0x8804101C#define P_STN_DATA_FMT (UV32*)0x88041020#define P_STN_BUFFER_STATUS (UV32*)0x88041024#define P_STN_FRAME_FMT1 (UV32*)0x88041028#define P_STN_DATA_SEQ (UV32*)0x8804102C#define P_STN_FRAME_FMT2 (UV32*)0x880410A0//**************************************************************//// other ////**************************************************************//#define P_LVR_RESET_CTRL (UV32*)0x882100C4//**************************************************************//// CSI ////**************************************************************//#define P_CSI_CLK_CONF (UV32*)0x88210018#define P_CSI_CLK_SEL (UV32*)0x8821001C#define P_CSI_INTERFACE_SEL (UV32*)0x88200000#define P_CSI_PROBE_SEL (UV32*)0x88200004#define P_CSI_GPIO_SETUP (UV32*)0x88200024#define P_CSI_GPIO_PULL (UV32*)0x88200028#define P_CSI_GPIO_INPUT (UV32*)0x88200068#define P_CSI_GPIO_INT (UV32*)0x88200084#define P_CSI_TG_CTRL (UV32*)0x88000000#define P_CSI_LINE_START (UV32*)0x88000004#define P_CSI_WINDOW_START (UV32*)0x88000008#define P_CSI_WINDOW_END (UV32*)0x8800000c#define P_CSI_BACKGROUND_COLOR (UV32*)0x88000010#define P_CSI_TOP_DETECT (UV32*)0x88000014#define P_CSI_BOTTOM_DETECT (UV32*)0x88000018#define P_CSI_TRANSPARENT_COLOR (UV32*)0x8800001C#define P_CSI_BUFFER_SA1 (UV32*)0x88000020#define P_CSI_BUFFER_SA2 (UV32*)0x88000024#define P_CSI_BUFFER_SA3 (UV32*)0x88000028#define P_CSI_BUFFER_SEL (UV32*)0x88090008#define P_CSI_CAPTURE_CTRL (UV32*)0x8800002C#define P_CSI_MD_CTRL (UV32*)0x88000030#define P_CSI_RECOGNITION_SA (UV32*)0x88000034#define P_CSI_POSITION_SETUP (UV32*)0x88000038#define P_CSI_CLASSIFICATION_SA (UV32*)0x8800003C#define P_CSI_COLOR_TABLE1 (UV32*)0x88000040#define P_CSI_COLOR_TABLE2 (UV32*)0x88000044#define P_CSI_COLOR_TABLE3 (UV32*)0x88000048#define P_CSI_COLOR_TABLE4 (UV32*)0x8800004C#define P_CSI_DETECT_REGION1 (UV32*)0x88000050#define P_CSI_DETECT_REGION2 (UV32*)0x88000054#define P_CSI_DETECT_REGION3 (UV32*)0x88000058#define P_CSI_THRESHOLD_SETUP (UV32*)0x8800005C#define P_CSI_CUT_SETUP (UV32*)0x88000060#define P_CSI_CAPTURE_COLORVALUE (UV32*)0x88000074#define P_CSI_INT_CTRL (UV32*)0x88000078#define P_CSI_INT_STATUS (UV32*)0x8800007C#define P_CSI_FRAMELOSS_INT (UV32*)0x88090028#define P_CSI_Y2R_FACTOR1 (UV32*)0x880000E8#define P_CSI_Y2R_FACTOR2 (UV32*)0x880000EC#define P_CSI_Y2R_FACTOR3 (UV32*)0x880000F0#define P_CSI_R2Y_FACTOR1 (UV32*)0x880000F4#define P_CSI_R2Y_FACTOR2 (UV32*)0x880000F8
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