score-regs.h

ecos下的gui开发源代码

#ifndef CYGONCE_HAL_SCORE_REGS_H
#define CYGONCE_HAL_SCORE_REGS_H
//========================================================================
//
//      score-regs.h
//
//      Register defines for SCORE processors
//
//========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):     Red Hat, nickg
// Contributors:  Red Hat, nickg, dmoseley
// Date:          2007-07-28
// Purpose:       
// Description:   Register defines for SCORE processors
// Usage:         
//
//####DESCRIPTIONEND####
//
//========================================================================

#include <pkgconf/hal.h>

#ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS

/* This value must agree with NUMREGS in score-stub.h. */

#define NUM_REGS    56

#define REG_SIZE 4


// CP0 register define
#define CP0_STATUS   cr0
#define CP0_COND     cr1
#define CP0_CAUSE    cr2
#define CP0_EXCPVEC  cr3
#define CP0_CCR      cr4
#define CP0_EPC      cr5
#define CP0_BADVA    cr6
#define CP0_WIRE     cr7
#define CP0_INDEX    cr8
#define CP0_CONTEXT  cr9
#define CP0_RANDOM   cr10
#define CP0_ENTRYHI  cr11
#define CP0_ENTRYLO  cr12
#define CP0_FMARLO   cr13
#define CP0_FMARHI   cr14
#define CP0_FMCR     cr15
#define CP0_FFMR     cr16
#define CP0_LLADDR   cr17
#define CP0_PREV     cr18
#define CP0_DREG     cr29
#define CP0_DEPC     cr30
#define CP0_DSAVE    cr31
#define SPR_HI       sr1
#define SPR_LO       sr2

//specification define
#define SR_CNT       sr0
#define SR_LCR       sr1
#define SR_SCR       sr2


/* Score registers, numbered in the order in which gdb expects to see them. */
#define SP              0
#define AT              1
#define ATMP            1
#define BP              2
#define LR              3
#define A0              4
#define A1              5
#define A2              6
#define A3              7

#define T0              8
#define T1              9
#define T2              10
#define T3              11
#define S0              12
#define S1              13
#define S2              14
#define S3              15

#define S4              16
#define S5              17
#define S6              18
#define S7              19
#define S8              20
#define S9              21
#define T4              22
#define T5              23

#define T6              24
#define T7              25
#define T8              26
#define T9              27
#define GP              28
#define JP              29
#define K0              30
#define K1              31

#define SR              32
#define COND            33
#define CAUSE           34
#define EPC             37
#define EMA             38
#define DREG            48
#define PC              49
#define HI              54	
#define LO              55	



#endif // ifdef CYGARC_HAL_COMMON_EXPORT_CPU_MACROS

#endif // ifndef CYGONCE_HAL_SCORE_REGS_H