sci.h

以ST公司CPU为核心的彩色电视机的完整源程序。

#ifndef _SCI
#define _SCI

/********************************************************************************/
/* ST9 family serial communication interface control registers  release 4.0     */
/*               ST9 FAMILY SERIAL COMMUNICATION INTERFACE REGISTERS.           */
/*                                                                              */
/********************************************************************************/

#define SCI0_PG ((unsigned char)24)                             /* SCI0 control registers page */
#define SCI1_PG ((unsigned char)25)                             /* SCI1 control registers page */
#define SCI2_PG ((unsigned char)26)                             /* SCI2 control registers page */
#define SCI3_PG ((unsigned char)27)                             /* SCI3 control registers page */

register volatile unsigned char S_RDCPR asm("R240");            /* receive DMA counter pointer register */

register volatile unsigned char S_RDAPR asm("R241");            /* receive DMA address pointer register */

register volatile unsigned char S_TDCPR asm("R242");            /* transmit DMA counter pointer register */

register volatile unsigned char S_TDAPR asm("R243");            /* transmit DMA address pointer register */

register volatile unsigned char S_IVR   asm("R244");            /* interrupt vector register */

register volatile unsigned char S_ACR   asm("R245");            /* address compare register */

register volatile unsigned char S_IMR   asm("R246");            /* interrupt mask register */

#define Sm_txdi    ((unsigned char)0x01)                        /* transmitter data interrupt mask */
#define Sm_rxdi    ((unsigned char)0x02)                        /* receiver data interrupt mask */
#define Sm_rxb     ((unsigned char)0x04)                        /* receiver break mask */
#define Sm_rxa     ((unsigned char)0x08)                        /* receiver address mask */
#define Sm_rxe     ((unsigned char)0x10)                        /* receiver error mask */
#define Sm_txeob   ((unsigned char)0x20)                        /* transmit end of block mask */
#define Sm_rxeob   ((unsigned char)0x40)                        /* receive end of block mask */
#define Sm_hsn     ((unsigned char)0x80)                        /* Holding or shift register empty mask. */

register volatile unsigned char S_ISR   asm("R247");            /* interrupt status register */

#define Sm_txsem   ((unsigned char)0x01)                        /* transmit shift register empty mask */
#define Sm_txhem   ((unsigned char)0x02)                        /* transmit hold register empty mask */
#define Sm_rxdp    ((unsigned char)0x04)                        /* received data pending mask */
#define Sm_rxbp    ((unsigned char)0x08)                        /* received break pending mask */
#define Sm_rxap    ((unsigned char)0x10)                        /* received address pending mask */
#define Sm_pe      ((unsigned char)0x20)                        /* parity error pending mask */
#define Sm_fe      ((unsigned char)0x40)                        /* framing error pending mask */
#define Sm_oe      ((unsigned char)0x80)                        /* overrun error pending mask */

register volatile unsigned char S_RXBR  asm("R248");            /* receive buffer register */

register volatile unsigned char S_TXBR  asm("R248");            /* transmit buffer register */

register volatile unsigned char S_IDPR  asm("R249");            /* interrupt/DMA priority register */

#define Sm_pri     ((unsigned char)0x07)                        /* interrupt/DMA priority mask */
#define Sm_txd     ((unsigned char)0x08)                        /* transmitter DMA mask */
#define Sm_rxd     ((unsigned char)0x10)                        /* receiver DMA mask */
#define Sm_sa      ((unsigned char)0x20)                        /* set address mask */
#define Sm_sb      ((unsigned char)0x40)                        /* set break mask */
#define Sm_amen    ((unsigned char)0x80)                        /* address mode enable mask */

register volatile unsigned char S_CHCR  asm("R250");            /* Character configuration register */

#define Sm_wl5     ((unsigned char)0x00)                        /* 5 bits data word mask */
#define Sm_wl6     ((unsigned char)0x01)                        /* 6 bits data word mask */
#define Sm_wl7     ((unsigned char)0x02)                        /* 7 bits data word mask */
#define Sm_wl8     ((unsigned char)0x03)                        /* 8 bits data word mask */
#define Sm_sb10    ((unsigned char)0x00)                        /* 1.0 stop bit mask */
#define Sm_sb15    ((unsigned char)0x04)                        /* 1.5 stop bit mask */
#define Sm_sb20    ((unsigned char)0x08)                        /* 2.0 stop bit mask */
#define Sm_sb25    ((unsigned char)0x0C)                        /* 2.5 stop bit mask */
#define Sm_ab      ((unsigned char)0x10)                        /* address bit insertion mask */
#define Sm_pen     ((unsigned char)0x20)                        /* parity enable mask */
#define Sm_ep      ((unsigned char)0x40)                        /* Even parity mask */
#define Sm_oddp    ((unsigned char)0x00)                        /* odd parity mask */
#define Sm_am      ((unsigned char)0x80)                        /* address mode mask */

register volatile unsigned char S_CCR   asm("R251");            /* Clock configuration register */

#define Sm_stpen   ((unsigned char)0x01)                        /* stick parity enable mask */
#define Sm_lben    ((unsigned char)0x02)                        /* loop back enable mask */
#define Sm_aen     ((unsigned char)0x04)                        /* auto echo enable mask */
#define Sm_cd      ((unsigned char)0x08)                        /* Clock divider mask */
#define Sm_xbrg    ((unsigned char)0x10)                        /* External baud rate generator source mask */
#define Sm_xrx     ((unsigned char)0x20)                        /* External receiver source mask */
#define Sm_oclk    ((unsigned char)0x40)                        /* output clock selection mask */
#define Sm_txclk   ((unsigned char)0x80)                        /* transmit clock selection mask */

register volatile unsigned int  S_BRGR  asm("RR252");           /* baud rate generator register */
register volatile unsigned char S_BRGHR asm("R252");            /* baud rate generator reg. high */
register volatile unsigned char S_BRGLR asm("R253");            /* baud rate generator reg. low */

register volatile unsigned char S_SICR asm("R254");            /* Synchronous Input Control register */


#define Sm_inpen     ((unsigned char)0x04)                        /* Input Enabled/Disabled */
#define Sm_dcdpl     ((unsigned char)0x08)                        /* DCD Input Polarity */
#define Sm_dcden     ((unsigned char)0x10)                        /* DCD Input Enable */
#define Sm_xckpl   ((unsigned char)0x20)                        /* Receiver Clock Polarity */
#define Sm_inpl   ((unsigned char)0x40)                        /* SIN Input Polarity */
#define Sm_smen     ((unsigned char)0x80)                        /* Synchronous Mode Enable */


register volatile unsigned char S_SOCR asm("R255");            /* Synchronous Output Control register */


#define Sm_ctspl     ((unsigned char)0x04)                        /* CTS Output Polarity */
#define Sm_ctsen     ((unsigned char)0x08)                        /* CTS Output enable */
#define Sm_ocksb     ((unsigned char)0x10)                        /* Transmitter Clock Stand-By Level */
#define Sm_ockpl   ((unsigned char)0x20)                        /* Transmitter Clock Polarity */
#define Sm_outsb   ((unsigned char)0x40)                        /* Sout Output Stand-by Level */
#define Sm_outpl     ((unsigned char)0x80)                        /* SOUT Output Polarity */

#endif