io_port.h

以ST公司CPU为核心的彩色电视机的完整源程序。

#ifndef _IO_PORT
#define _IO_PORT

/************************************************************************/
/*      ST9 family I/O ports registers control registers release 5.0    */
/*               ST9 FAMILY I/O PORTS REGISTER ADDRESSES.               */
/*                                                                      */
/************************************************************************/

/* P0DR, P1DR, P2DR, P3DR are mapped in the system registers if DPRREM=0 in EMR2 register */
/* They are mapped in page 21 if DPRREM=1 in EMR2 register */


#define P0C_PG  ((unsigned char)2 )                             /* Port 0 control registers page */
                                                                 
register volatile unsigned char P0DR    asm("R224");            /* Port 0 data register */
register volatile unsigned char P0C0R   asm("R240");            /* Port 0 control register 0 */
register volatile unsigned char P0C1R   asm("R241");            /* Port 0 control register 1 */
register volatile unsigned char P0C2R   asm("R242");            /* Port 0 control register 2 */

#define P1C_PG  ((unsigned char)2 )                             /* Port 1 control registers page */

register volatile unsigned char P1DR    asm("R225");            /* Port 1 data register */
register volatile unsigned char P1C0R   asm("R244");            /* Port 1 control register 0 */
register volatile unsigned char P1C1R   asm("R245");            /* Port 1 control register 1 */
register volatile unsigned char P1C2R   asm("R246");            /* Port 1 control register 2 */

#define P2C_PG  ((unsigned char)2 )                             /* Port 2 control registers page */

register volatile unsigned char P2DR    asm("R226");            /* Port 2 data register */
register volatile unsigned char P2C0R   asm("R248");            /* Port 2 control register 0 */
register volatile unsigned char P2C1R   asm("R249");            /* Port 2 control register 1 */
register volatile unsigned char P2C2R   asm("R250");            /* Port 2 control register 2 */

#define P3C_PG  ((unsigned char)2 )                             /* Port 3 control registers page */

register volatile unsigned char P3DR    asm("R227");            /* Port 3 data register */
register volatile unsigned char P3C0R   asm("R252");            /* Port 3 control register 0 */
register volatile unsigned char P3C1R   asm("R253");            /* Port 3 control register 1 */
register volatile unsigned char P3C2R   asm("R254");            /* Port 3 control register 2 */

#define P4C_PG  ((unsigned char)3 )                             /* Port 4 control registers page */

register volatile unsigned char P4DR    asm("R228");            /* Port 4 data register */
register volatile unsigned char P4C0R   asm("R240");            /* Port 4 control register 0 */
register volatile unsigned char P4C1R   asm("R241");            /* Port 4 control register 1 */
register volatile unsigned char P4C2R   asm("R242");            /* Port 4 control register 2 */

#define P5C_PG  ((unsigned char)3 )                             /* Port 5 control registers page */

register volatile unsigned char P5DR    asm("R229");            /* Port 5 data register */
register volatile unsigned char P5C0R   asm("R244");            /* Port 5 control register 0 */
register volatile unsigned char P5C1R   asm("R245");            /* Port 5 control register 1 */
register volatile unsigned char P5C2R   asm("R246");            /* Port 5 control register 2 */

#define P6C_PG  ((unsigned char)3 )                             /* Port 6 control registers page */
#define P6D_PG  ((unsigned char)3 )                             /* Port 6 data register page */

register volatile unsigned char P6DR    asm("R251");            /* Port 6 data register */
register volatile unsigned char P6C0R   asm("R248");            /* Port 6 control register 0 */
register volatile unsigned char P6C1R   asm("R249");            /* Port 6 control register 1 */
register volatile unsigned char P6C2R   asm("R250");            /* Port 6 control register 2 */

#define P7C_PG  ((unsigned char)3 )                             /* Port 7 control registers page */
#define P7D_PG  ((unsigned char)3 )                             /* Port 7 data register page */

register volatile unsigned char P7DR    asm("R255");            /* Port 7 data register */
register volatile unsigned char P7C0R   asm("R252");            /* Port 7 control register 0 */
register volatile unsigned char P7C1R   asm("R253");            /* Port 7 control register 1 */
register volatile unsigned char P7C2R   asm("R254");            /* Port 7 control register 2 */

#define P8C_PG  ((unsigned char)43)                             /* Port 8 control registers page */
#define P8D_PG  ((unsigned char)43)                             /* Port 8 data register page */

register volatile unsigned char P8DR    asm("R251");            /* Port 8 data register */
register volatile unsigned char P8C0R   asm("R248");            /* Port 8 control register 0 */
register volatile unsigned char P8C1R   asm("R249");            /* Port 8 control register 1 */
register volatile unsigned char P8C2R   asm("R250");            /* Port 8 control register 2 */

#define P9C_PG  ((unsigned char)43)                             /* Port 9 control registers page */
#define P9D_PG  ((unsigned char)43)                             /* Port 9 data register page */

register volatile unsigned char P9DR    asm("R255");            /* Port 9 data register */
register volatile unsigned char P9C0R   asm("R252");            /* Port 9 control register 0 */
register volatile unsigned char P9C1R   asm("R253");            /* Port 9 control register 1 */
register volatile unsigned char P9C2R   asm("R254");            /* Port 9 control register 2 */

/* Handshake DMA control registers */

register volatile unsigned char HDCTL2R asm("R251");            /* Port 2 handshake DMA control register */
register volatile unsigned char HDCTL3R asm("R255");            /* Port 3 handshake DMA control register */
register volatile unsigned char HDCTL4R asm("R243");            /* Port 4 handshake DMA control register */
register volatile unsigned char HDCTL5R asm("R247");            /* Port 5 handshake DMA control register */

/* Handshake DMA control registers configurations */

#define HDm_hsdis   ((unsigned char)0xE0)                       /* Handshake disabled mask */
#define HDm_hso2    ((unsigned char)0xC0)                       /* Handshake output 2 lines mask */
#define HDm_hso1    ((unsigned char)0x40)                       /* Handshake output 1 line mask */
#define HDm_hsi2    ((unsigned char)0xA0)                       /* Handshake input 2 lines mask */
#define HDm_hsi1    ((unsigned char)0x20)                       /* Handshake input 1 line mask */
#define HDm_hsb     ((unsigned char)0x00)                       /* Handshake bidirectional mask */

#define HDm_den     ((unsigned char)0x00)                       /* DMA enable mask */
#define HDm_ddi     ((unsigned char)0x10)                       /* DMA disable mask */

#define HDm_ddw     ((unsigned char)0x00)                       /* Data direction output mask (write) */
#define HRm_ddr     ((unsigned char)0x08)                       /* Data direction input mask (read) */

#define HDm_dst     ((unsigned char)0x04)                       /* DMA strobe on chip event mask */

#define HDm_dcp0    ((unsigned char)0x00)                       /* DMA channel capture0 mask */
#define HDm_dcm0    ((unsigned char)0x02)                       /* DMA channel compare0 mask */


#endif