mftimer.h

以ST公司CPU为核心的彩色电视机的完整源程序。

#ifndef _MFTIMER
#define _MFTIMER

/************************************************************************/
/*	ST9 family Multi-Function Timer control registers release 4.0	*/
/*		 ST9 FAMILY MULTI-FUNCTION TIMER DESCRIPTION.		*/
/*									*/
/************************************************************************/

#define T0D_PG	((unsigned char)10)				/* MFTimer 0 data registers page */
#define T0C_PG	((unsigned char)9 )				/* MFTimer 0 control registers page */
#define T1D_PG	((unsigned char)8 )				/* MFTimer 1 data registers page */
#define T1C_PG	((unsigned char)9 )				/* MFTimer 1 control registers page */
#define T2D_PG	((unsigned char)14)				/* MFTimer 2 data registers page */
#define T2C_PG	((unsigned char)13)				/* MFTimer 2 control registers page */
#define T3D_PG	((unsigned char)12)				/* MFTimer 3 data registers page */
#define T3C_PG	((unsigned char)13)				/* MFTimer 3 control registers page */

register volatile unsigned int	T_REG0R	 asm("RR240");		/* MFTimer REG0 load and capture register. */
register volatile unsigned char T_REG0HR asm("R240");		/* Register 0 high register */
register volatile unsigned char T_REG0LR asm("R241");		/* Register 0 low register */

register volatile unsigned int	T_REG1R	 asm("RR242");		/* MFTimer REG1 load constant  */
register volatile unsigned char T_REG1HR asm("R242");		/* Register 1 high register */
register volatile unsigned char T_REG1LR asm("R243");		/* Register 1 low register */

register volatile unsigned int	T_CMP0R	 asm("RR244");		/* MFTimer CMP0 store compare constant. */
register volatile unsigned char T_CMP0HR asm("R244");		/* Compare 0 high register */
register volatile unsigned char T_CMP0LR asm("R245");		/* Compare 0 low register */

register volatile unsigned int	T_CMP1R	 asm("RR246");		/* MFTimer CMP1 store compare constant. */
register volatile unsigned char T_CMP1HR asm("R246");		/* Compare 1 high register */
register volatile unsigned char T_CMP1LR asm("R247");		/* Compare 1 low register */

register volatile unsigned char T_TCR	 asm("R248");		/* MFTimer Control Register. */

#define Tm_cs	   ((unsigned char)0x01)			/* Counter status mask */
#define Tm_of0	   ((unsigned char)0x02)			/* over/underflow mask on CAP on REG0 */
#define Tm_udcs	   ((unsigned char)0x04)			/* up/down count status mask */
#define Tm_udc	   ((unsigned char)0x08)			/* up/down count mask */
#define Tm_ccl	   ((unsigned char)0x10)			/* Counter clear mask */
#define Tm_ccmp0   ((unsigned char)0x20)			/* Clear on compare mask */
#define Tm_ccp0	   ((unsigned char)0x40)			/* Clear on capture mask */
#define Tm_cen	   ((unsigned char)0x80)			/* Counter enable mask */

register volatile unsigned char T_TMR	asm("R249");		/* MFTimer Mode Register. */

#define Tm_co	   ((unsigned char)0x01)			/* Continuous/one shot mask */
#define Tm_ren	   ((unsigned char)0x02)			/* retrigger enable mask */
#define Tm_eck	   ((unsigned char)0x04)			/* Enable clocking mode mask */
#define Tm_rm0	   ((unsigned char)0x08)			/* register 0 mode mask */
#define Tm_rm1	   ((unsigned char)0x10)			/* register 1 mode mask */
#define Tm_bm	   ((unsigned char)0x20)			/* bivalue mode mask */
#define Tm_oe0	   ((unsigned char)0x40)			/* output 0 enable mask */
#define Tm_oe1	   ((unsigned char)0x80)			/* output 1 enable mask */

register volatile unsigned char T_ICR	asm("R250");		/* MFTimer External Input Control Register. */

#define Tm_exb_f   ((unsigned char)0x01)			/* External B falling edge sensitive mask */
#define Tm_exb_r   ((unsigned char)0x02)			/* External B rising edge sensitive mask */
#define Tm_exb_rf  ((unsigned char)0x03)			/* External B falling and rising edge mask */

#define Tm_exa_f   ((unsigned char)0x04)			/* External A falling edge sensitive mask */
#define Tm_exa_r   ((unsigned char)0x08)			/* External A rising edge sensitive mask */
#define Tm_exa_rf  ((unsigned char)0x0C)			/* External A falling and rising edge mask */

#define Tm_ab_ii   ((unsigned char)0x00)			/* A I/O, B I/O mask */
#define Tm_ab_it   ((unsigned char)0x10)			/* A I/O, B trigger mask */
#define Tm_ab_gi   ((unsigned char)0x20)			/* A gate, B I/O mask */
#define Tm_ab_gt   ((unsigned char)0x30)			/* A gate, B trigger mask */
#define Tm_ab_ie   ((unsigned char)0x40)			/* A I/O, B external clock mask */
#define Tm_ab_ti   ((unsigned char)0x50)			/* A trigger, B I/O mask */
#define Tm_ab_ge   ((unsigned char)0x60)			/* A gate, B external clock mask */
#define Tm_ab_tt   ((unsigned char)0x70)			/* A trigger, B trigger mask */
#define Tm_ab_cucd ((unsigned char)0x80)			/* A clock up, B clock down mask */
#define Tm_ab_ue   ((unsigned char)0x90)			/* A clock up/down, B external clock mask */
#define Tm_ab_tutd ((unsigned char)0xA0)			/* A trigger up, B trigger down mask */
#define Tm_ab_ui   ((unsigned char)0xB0)			/* A up/down clock, B I/O mask */
#define Tm_ab_aa   ((unsigned char)0xC0)			/* A autodiscr., B autodiscr. mask */
#define Tm_ab_te   ((unsigned char)0xD0)			/* A trigger, B external clock mask */
#define Tm_ab_et   ((unsigned char)0xE0)			/* A external clock, B trigger mask */
#define Tm_ab_tg   ((unsigned char)0xF0)			/* A trigger, B gate mask */


register volatile unsigned char T_PRSR	asm("R251");		/* MFTimer prescaler register */

register volatile unsigned char T_OACR	asm("R252");		/* MFTimer Output A Control Register. */

#define Tm_cev	   ((unsigned char)0x02)			/* on chip event bit on COMPARE 0 mask */

register volatile unsigned char T_OBCR	asm("R253");		/* MFTimer Output B Control Register. */

#define Tm_op	   ((unsigned char)0x01)			/* output preset bit mask */

#define Tm_oev	   ((unsigned char)0x02)			/* on chip event bit on OVF/UDF mask */

#define Tm_ou_set  ((unsigned char)0x00)			/* overflow underflow set mask */
#define Tm_ou_tog  ((unsigned char)0x04)			/* overflow underflow toggle mask */
#define Tm_ou_res  ((unsigned char)0x08)			/* overflow underflow reset mask */
#define Tm_ou_nop  ((unsigned char)0x0C)			/* overflow underflow nop mask */

#define Tm_c1_set  ((unsigned char)0x00)			/* Compare 1 set mask */
#define Tm_c1_tog  ((unsigned char)0x10)			/* Compare 1 toggle mask */
#define Tm_c1_res  ((unsigned char)0x20)			/* Compare 1 reset mask */
#define Tm_c1_nop  ((unsigned char)0x30)			/* Compare 1 nop mask */

#define Tm_c0_set  ((unsigned char)0x00)			/* Compare 0 set mask */
#define Tm_c0_tog  ((unsigned char)0x40)			/* Compare 0 toggle mask */
#define Tm_c0_res  ((unsigned char)0x80)			/* Compare 0 reset mask */
#define Tm_c0_nop  ((unsigned char)0xC0)			/* Compare 0 nop mask */

register volatile unsigned char T_FLAGR asm("R254");		/* MFTimer Flags Register. */

#define Tm_a0	   ((unsigned char)0x01)			/* and/or on capture interrupt masm */
#define Tm_ocm0	   ((unsigned char)0x02)			/* overrun compare 0 mask */
#define Tm_ocp0	   ((unsigned char)0x04)			/* overrun capture 0 mask */
#define Tm_ouf	   ((unsigned char)0x08)			/* overflow underflow flag mask */
#define Tm_cm1	   ((unsigned char)0x10)			/* successful compare 1 mask */
#define Tm_cm0	   ((unsigned char)0x20)			/* successful compare 0 mask */
#define Tm_cp1	   ((unsigned char)0x40)			/* successful capture 1 mask */
#define Tm_cp0	   ((unsigned char)0x80)			/* successful capture 0 mask */

register volatile unsigned char T_IDMR	asm("R255");		/* MFTimer Interrupt DMA Mask Register. */

#define Tm_oui	   ((unsigned char)0x01)			/* overflow underflow interrupt mask */
#define Tm_cm1i	   ((unsigned char)0x02)			/* Compare 1 interrupt mask */
#define Tm_cm0i	   ((unsigned char)0x04)			/* Compare 0 interrupt mask */
#define Tm_cm0d	   ((unsigned char)0x08)			/* Compare 0 DMA mask */
#define Tm_cp1i	   ((unsigned char)0x10)			/* Capture 1 interrupt mask */
#define Tm_cp0i	   ((unsigned char)0x20)			/* Capture 0 interrupt mask */
#define Tm_cp0d	   ((unsigned char)0x40)			/* Capture 0 DMA mask */
#define Tm_gtien   ((unsigned char)0x80)			/* global timer interrupt enable mask */

register volatile unsigned char T0_DCPR asm("R240");		/* MFTimer 0 DMA Counter Pointer Register. */

register volatile unsigned char T1_DCPR asm("R244");		/* MFTimer 1 DMA Counter Pointer Register. */

register volatile unsigned char T0_DAPR asm("R241");		/* MFTimer 0 DMA Address Pointer Register. */

register volatile unsigned char T1_DAPR asm("R245");		/* MFTimer 1 DMA Address Pointer Register. */

register volatile unsigned char T0_IVR	asm("R242");		/* MFTimer 0 Interrupt Vector Register. */

register volatile unsigned char T1_IVR	asm("R246");		/* MFTimer 1 Interrupt Vector Register. */

register volatile unsigned char T0_IDCR asm("R243");		/* MFTimer 0 Interrupt/DMA Control Register. */

register volatile unsigned char T1_IDCR asm("R247");		/* MFTimer 1 Interrupt/DMA Control Register. */

register volatile unsigned char T2_DCPR asm("R240");		/* MFTimer 2 DMA Counter Pointer Register. */

register volatile unsigned char T3_DCPR asm("R244");		/* MFTimer 3 DMA Counter Pointer Register. */

register volatile unsigned char T2_DAPR asm("R241");		/* MFTimer 2 DMA Address Pointer Register. */

register volatile unsigned char T3_DAPR asm("R245");		/* MFTimer 3 DMA Address Pointer Register. */

register volatile unsigned char T2_IVR	asm("R242");		/* MFTimer 2 Interrupt Vector Register. */

register volatile unsigned char T3_IVR	asm("R246");		/* MFTimer 3 Interrupt Vector Register. */

register volatile unsigned char T2_IDCR asm("R243");		/* MFTimer 2 Interrupt/DMA Control Register. */

register volatile unsigned char T3_IDCR asm("R247");		/* MFTimer 3 Interrupt/DMA Control Register. */

#define Tm_plm	   ((unsigned char)0x07)			/* Priority level mask */
#define Tm_swen	   ((unsigned char)0x08)			/* Swap function enable mask */
#define Tm_dctd	   ((unsigned char)0x10)			/* DMA compare transaction destination mask */
#define Tm_dcts	   ((unsigned char)0x20)			/* DMA capture transaction source mask */
#define Tm_cme	   ((unsigned char)0x40)			/* Compare 0 end of block mask */
#define Tm_cpe	   ((unsigned char)0x80)			/* Capture 0 end of block mask */

register volatile unsigned char T_IOCR	asm("R248");		/* MFTimer I/O connection register */

#define Tm_sc0	   ((unsigned char)0x01)			/* TxOUTA and TxINA connection bit for even MFTimer */
#define Tm_sc1	   ((unsigned char)0x02)			/* TxOUTA and TxINA connection bit for odd MFTimer */


#endif