bank.m

CPU的code banking技术实例： This Zip file contains five (3) folders: FastChip Project Files * This

// Netlist written January 19, 2001 4:40:48 PM PST
// By FastChip Version 2.1.1 Build 001212-1646
// Netlist last modified January 19, 2001 4:40:48 PM PST
netlist
module toplevel {
    net led [7:0];
    net LED1.sega;
    net LED1.segb;
    net LED1.segc;
    net LED1.segd;
    net LED1.sege;
    net LED1.segf;
    net LED1.segg;
    net LED2.sega;
    net LED2.segb;
    net LED2.segc;
    net LED2.segd;
    net LED2.sege;
    net LED2.segf;
    net LED2.segg;
    net LED_Control.rdsel;
    net LED_Control.wrsel;
    net LED_Control.dw [7:0];
    net LED_Control.clock;
    net DOR_DmuxSet_0_outNet;
    net DOR_DmuxSet_1_outNet;
    net DOR_DmuxSet_2_outNet;
    net DOR_DmuxSet_3_outNet;
    net DOR_DmuxSet_4_outNet;
    net DOR_DmuxSet_5_outNet;
    net DOR_DmuxSet_6_outNet;
    net DOR_DmuxSet_7_outNet;
    net LED_Control.DMUX0_mnet;
    net LED_Control.DMUX1_mnet;
    net LED_Control.DMUX2_mnet;
    net LED_Control.DMUX3_mnet;
    net LED_Control.DMUX4_mnet;
    net LED_Control.DMUX5_mnet;
    net LED_Control.DMUX6_mnet;
    net LED_Control.DMUX7_mnet;
    lut4 LED1.LUT_SEGA (.i=led[3:0], .o=LED1.sega, :initv="0x2812");
    lut4 LED1.LUT_SEGB (.i=led[3:0], .o=LED1.segb, :initv="0xd860");
    lut4 LED1.LUT_SEGC (.i=led[3:0], .o=LED1.segc, :initv="0xd004");
    lut4 LED1.LUT_SEGD (.i=led[3:0], .o=LED1.segd, :initv="0x8692");
    lut4 LED1.LUT_SEGE (.i=led[3:0], .o=LED1.sege, :initv="0x02ba");
    lut4 LED1.LUT_SEGF (.i=led[3:0], .o=LED1.segf, :initv="0x208e");
    lut4 LED1.LUT_SEGG (.i=led[3:0], .o=LED1.segg, :initv="0x1083");
    pad LED1.SEGA (.o=LED1.sega, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED1.SEGB (.o=LED1.segb, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED1.SEGC (.o=LED1.segc, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED1.SEGD (.o=LED1.segd, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED1.SEGE (.o=LED1.sege, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED1.SEGF (.o=LED1.segf, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED1.SEGG (.o=LED1.segg, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    lut4 LED2.LUT_SEGA (.i=led[7:4], .o=LED2.sega, :initv="0x2812");
    lut4 LED2.LUT_SEGB (.i=led[7:4], .o=LED2.segb, :initv="0xd860");
    lut4 LED2.LUT_SEGC (.i=led[7:4], .o=LED2.segc, :initv="0xd004");
    lut4 LED2.LUT_SEGD (.i=led[7:4], .o=LED2.segd, :initv="0x8692");
    lut4 LED2.LUT_SEGE (.i=led[7:4], .o=LED2.sege, :initv="0x02ba");
    lut4 LED2.LUT_SEGF (.i=led[7:4], .o=LED2.segf, :initv="0x208e");
    lut4 LED2.LUT_SEGG (.i=led[7:4], .o=LED2.segg, :initv="0x1083");
    pad LED2.SEGA (.o=LED2.sega, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED2.SEGB (.o=LED2.segb, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED2.SEGC (.o=LED2.segc, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED2.SEGD (.o=LED2.segd, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED2.SEGE (.o=LED2.sege, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED2.SEGF (.o=LED2.segf, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    pad LED2.SEGG (.o=LED2.segg, .oe=vcc, :drive="STRONG", :isOutputLowPower="true");
    tselector LED_Control.CMDREG (.rdsel=LED_Control.rdsel, .wrsel=LED_Control.wrsel, :isSFRSpace="false", :relative="", :size="1", :address="0x00efff", :isWordAligned="true", :mask="0xffffffff", :physical="0x10efff", :symbolic="led", :isDataSpace="true");
    busclk LED_Control.bclk (.o=LED_Control.clock);
    datain LED_Control.DATAWRITE0 (.o=LED_Control.dw[0], :bit="0");
    datain LED_Control.DATAWRITE1 (.o=LED_Control.dw[1], :bit="1");
    datain LED_Control.DATAWRITE2 (.o=LED_Control.dw[2], :bit="2");
    datain LED_Control.DATAWRITE3 (.o=LED_Control.dw[3], :bit="3");
    datain LED_Control.DATAWRITE4 (.o=LED_Control.dw[4], :bit="4");
    datain LED_Control.DATAWRITE5 (.o=LED_Control.dw[5], :bit="5");
    datain LED_Control.DATAWRITE6 (.o=LED_Control.dw[6], :bit="6");
    datain LED_Control.DATAWRITE7 (.o=LED_Control.dw[7], :bit="7");
    dff LED_Control.DFF0 (.d=LED_Control.dw[0], .en=LED_Control.wrsel, .ck=LED_Control.clock, .q=led[0], :initv="0");
    dff LED_Control.DFF1 (.d=LED_Control.dw[1], .en=LED_Control.wrsel, .ck=LED_Control.clock, .q=led[1], :initv="0");
    dff LED_Control.DFF2 (.d=LED_Control.dw[2], .en=LED_Control.wrsel, .ck=LED_Control.clock, .q=led[2], :initv="0");
    dff LED_Control.DFF3 (.d=LED_Control.dw[3], .en=LED_Control.wrsel, .ck=LED_Control.clock, .q=led[3], :initv="0");
    dff LED_Control.DFF4 (.d=LED_Control.dw[4], .en=LED_Control.wrsel, .ck=LED_Control.clock, .q=led[4], :initv="0");
    dff LED_Control.DFF5 (.d=LED_Control.dw[5], .en=LED_Control.wrsel, .ck=LED_Control.clock, .q=led[5], :initv="0");
    dff LED_Control.DFF6 (.d=LED_Control.dw[6], .en=LED_Control.wrsel, .ck=LED_Control.clock, .q=led[6], :initv="0");
    dff LED_Control.DFF7 (.d=LED_Control.dw[7], .en=LED_Control.wrsel, .ck=LED_Control.clock, .q=led[7], :initv="0");
    dataout LED_Control.DATAREAD0 (.i=DOR_DmuxSet_0_outNet, :bit="0");
    dataout LED_Control.DATAREAD1 (.i=DOR_DmuxSet_1_outNet, :bit="1");
    dataout LED_Control.DATAREAD2 (.i=DOR_DmuxSet_2_outNet, :bit="2");
    dataout LED_Control.DATAREAD3 (.i=DOR_DmuxSet_3_outNet, :bit="3");
    dataout LED_Control.DATAREAD4 (.i=DOR_DmuxSet_4_outNet, :bit="4");
    dataout LED_Control.DATAREAD5 (.i=DOR_DmuxSet_5_outNet, :bit="5");
    dataout LED_Control.DATAREAD6 (.i=DOR_DmuxSet_6_outNet, :bit="6");
    dataout LED_Control.DATAREAD7 (.i=DOR_DmuxSet_7_outNet, :bit="7");
    dor DOR_DmuxSet_0 (.i=LED_Control.DMUX0_mnet, .o=DOR_DmuxSet_0_outNet, :DmuxSet="DOR_DmuxSet_0_outNet");
    dor DOR_DmuxSet_1 (.i=LED_Control.DMUX1_mnet, .o=DOR_DmuxSet_1_outNet, :DmuxSet="DOR_DmuxSet_1_outNet");
    dor DOR_DmuxSet_2 (.i=LED_Control.DMUX2_mnet, .o=DOR_DmuxSet_2_outNet, :DmuxSet="DOR_DmuxSet_2_outNet");
    dor DOR_DmuxSet_3 (.i=LED_Control.DMUX3_mnet, .o=DOR_DmuxSet_3_outNet, :DmuxSet="DOR_DmuxSet_3_outNet");
    dor DOR_DmuxSet_4 (.i=LED_Control.DMUX4_mnet, .o=DOR_DmuxSet_4_outNet, :DmuxSet="DOR_DmuxSet_4_outNet");
    dor DOR_DmuxSet_5 (.i=LED_Control.DMUX5_mnet, .o=DOR_DmuxSet_5_outNet, :DmuxSet="DOR_DmuxSet_5_outNet");
    dor DOR_DmuxSet_6 (.i=LED_Control.DMUX6_mnet, .o=DOR_DmuxSet_6_outNet, :DmuxSet="DOR_DmuxSet_6_outNet");
    dor DOR_DmuxSet_7 (.i=LED_Control.DMUX7_mnet, .o=DOR_DmuxSet_7_outNet, :DmuxSet="DOR_DmuxSet_7_outNet");
    tdmux LED_Control.DMUX0 (.d=led[0], .s=LED_Control.rdsel, .m=LED_Control.DMUX0_mnet, .dw=null, .mw=null, .de=null, .me=null, :bit="0", :DmuxSet="DOR_DmuxSet_0_outNet", :DmuxBit="0");
    tdmux LED_Control.DMUX1 (.d=led[1], .s=LED_Control.rdsel, .m=LED_Control.DMUX1_mnet, .dw=null, .mw=null, .de=null, .me=null, :bit="1", :DmuxSet="DOR_DmuxSet_1_outNet", :DmuxBit="1");
    tdmux LED_Control.DMUX2 (.d=led[2], .s=LED_Control.rdsel, .m=LED_Control.DMUX2_mnet, .dw=null, .mw=null, .de=null, .me=null, :bit="2", :DmuxSet="DOR_DmuxSet_2_outNet", :DmuxBit="2");
    tdmux LED_Control.DMUX3 (.d=led[3], .s=LED_Control.rdsel, .m=LED_Control.DMUX3_mnet, .dw=null, .mw=null, .de=null, .me=null, :bit="3", :DmuxSet="DOR_DmuxSet_3_outNet", :DmuxBit="3");
    tdmux LED_Control.DMUX4 (.d=led[4], .s=LED_Control.rdsel, .m=LED_Control.DMUX4_mnet, .dw=null, .mw=null, .de=null, .me=null, :bit="4", :DmuxSet="DOR_DmuxSet_4_outNet", :DmuxBit="4");
    tdmux LED_Control.DMUX5 (.d=led[5], .s=LED_Control.rdsel, .m=LED_Control.DMUX5_mnet, .dw=null, .mw=null, .de=null, .me=null, :bit="5", :DmuxSet="DOR_DmuxSet_5_outNet", :DmuxBit="5");
    tdmux LED_Control.DMUX6 (.d=led[6], .s=LED_Control.rdsel, .m=LED_Control.DMUX6_mnet, .dw=null, .mw=null, .de=null, .me=null, :bit="6", :DmuxSet="DOR_DmuxSet_6_outNet", :DmuxBit="6");
    tdmux LED_Control.DMUX7 (.d=led[7], .s=LED_Control.rdsel, .m=LED_Control.DMUX7_mnet, .dw=null, .mw=null, .de=null, .me=null, :bit="7", :DmuxSet="DOR_DmuxSet_7_outNet", :DmuxBit="7");
}