📄 stm32f10x_usart.txt
字号:
DCD 0x40004800
|L7.148|
DCD 0x40004c00
|L7.152|
DCD 0x40005000
AREA ||i.USART_GetFlagStatus||, CODE, READONLY, ALIGN=1
USART_GetFlagStatus PROC
;;;873 */
;;;874 FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG)
000000 4602 MOV r2,r0
;;;875 {
;;;876 FlagStatus bitstatus = RESET;
000002 2000 MOVS r0,#0
;;;877 /* Check the parameters */
;;;878 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;879 assert_param(IS_USART_FLAG(USART_FLAG));
;;;880 /* The CTS flag is not available for UART4 and UART5 */
;;;881 if (USART_FLAG == USART_FLAG_CTS)
000004 f5b17f00 CMP r1,#0x200
000008 d100 BNE |L8.12|
;;;882 {
;;;883 assert_param(IS_USART_123_PERIPH(USARTx));
00000a bf00 NOP
|L8.12|
;;;884 }
;;;885
;;;886 if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET)
00000c 8813 LDRH r3,[r2,#0]
00000e 420b TST r3,r1
000010 d001 BEQ |L8.22|
;;;887 {
;;;888 bitstatus = SET;
000012 2001 MOVS r0,#1
000014 e000 B |L8.24|
|L8.22|
;;;889 }
;;;890 else
;;;891 {
;;;892 bitstatus = RESET;
000016 2000 MOVS r0,#0
|L8.24|
;;;893 }
;;;894 return bitstatus;
;;;895 }
000018 4770 BX lr
;;;896
ENDP
AREA ||i.USART_GetITStatus||, CODE, READONLY, ALIGN=1
USART_GetITStatus PROC
;;;955 */
;;;956 ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT)
000000 b570 PUSH {r4-r6,lr}
;;;957 {
000002 4602 MOV r2,r0
;;;958 uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00;
000004 2400 MOVS r4,#0
000006 2300 MOVS r3,#0
000008 2500 MOVS r5,#0
;;;959 ITStatus bitstatus = RESET;
00000a 2000 MOVS r0,#0
;;;960 /* Check the parameters */
;;;961 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;962 assert_param(IS_USART_GET_IT(USART_IT));
;;;963 /* The CTS interrupt is not available for UART4 and UART5 */
;;;964 if (USART_IT == USART_IT_CTS)
00000c f5a16610 SUB r6,r1,#0x900
000010 3e6a SUBS r6,r6,#0x6a
000012 d100 BNE |L9.22|
;;;965 {
;;;966 assert_param(IS_USART_123_PERIPH(USARTx));
000014 bf00 NOP
|L9.22|
;;;967 }
;;;968
;;;969 /* Get the USART register index */
;;;970 usartreg = (((uint8_t)USART_IT) >> 0x05);
000016 f3c11542 UBFX r5,r1,#5,#3
;;;971 /* Get the interrupt position */
;;;972 itmask = USART_IT & IT_Mask;
00001a f001031f AND r3,r1,#0x1f
;;;973 itmask = (uint32_t)0x01 << itmask;
00001e 2601 MOVS r6,#1
000020 fa06f303 LSL r3,r6,r3
;;;974
;;;975 if (usartreg == 0x01) /* The IT is in CR1 register */
000024 2d01 CMP r5,#1
000026 d102 BNE |L9.46|
;;;976 {
;;;977 itmask &= USARTx->CR1;
000028 8996 LDRH r6,[r2,#0xc]
00002a 4033 ANDS r3,r3,r6
00002c e006 B |L9.60|
|L9.46|
;;;978 }
;;;979 else if (usartreg == 0x02) /* The IT is in CR2 register */
00002e 2d02 CMP r5,#2
000030 d102 BNE |L9.56|
;;;980 {
;;;981 itmask &= USARTx->CR2;
000032 8a16 LDRH r6,[r2,#0x10]
000034 4033 ANDS r3,r3,r6
000036 e001 B |L9.60|
|L9.56|
;;;982 }
;;;983 else /* The IT is in CR3 register */
;;;984 {
;;;985 itmask &= USARTx->CR3;
000038 8a96 LDRH r6,[r2,#0x14]
00003a 4033 ANDS r3,r3,r6
|L9.60|
;;;986 }
;;;987
;;;988 bitpos = USART_IT >> 0x08;
00003c 120c ASRS r4,r1,#8
;;;989 bitpos = (uint32_t)0x01 << bitpos;
00003e 2601 MOVS r6,#1
000040 fa06f404 LSL r4,r6,r4
;;;990 bitpos &= USARTx->SR;
000044 8816 LDRH r6,[r2,#0]
000046 4034 ANDS r4,r4,r6
;;;991 if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET))
000048 b113 CBZ r3,|L9.80|
00004a b10c CBZ r4,|L9.80|
;;;992 {
;;;993 bitstatus = SET;
00004c 2001 MOVS r0,#1
00004e e000 B |L9.82|
|L9.80|
;;;994 }
;;;995 else
;;;996 {
;;;997 bitstatus = RESET;
000050 2000 MOVS r0,#0
|L9.82|
;;;998 }
;;;999
;;;1000 return bitstatus;
;;;1001 }
000052 bd70 POP {r4-r6,pc}
;;;1002
ENDP
AREA ||i.USART_HalfDuplexCmd||, CODE, READONLY, ALIGN=1
USART_HalfDuplexCmd PROC
;;;730 */
;;;731 void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
000000 b121 CBZ r1,|L10.12|
;;;732 {
;;;733 /* Check the parameters */
;;;734 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;735 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;736
;;;737 if (NewState != DISABLE)
;;;738 {
;;;739 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
;;;740 USARTx->CR3 |= CR3_HDSEL_Set;
000002 8a82 LDRH r2,[r0,#0x14]
000004 f0420208 ORR r2,r2,#8
000008 8282 STRH r2,[r0,#0x14]
00000a e004 B |L10.22|
|L10.12|
;;;741 }
;;;742 else
;;;743 {
;;;744 /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */
;;;745 USARTx->CR3 &= CR3_HDSEL_Reset;
00000c 8a82 LDRH r2,[r0,#0x14]
00000e f64f73f7 MOV r3,#0xfff7
000012 401a ANDS r2,r2,r3
000014 8282 STRH r2,[r0,#0x14]
|L10.22|
;;;746 }
;;;747 }
000016 4770 BX lr
;;;748
ENDP
AREA ||i.USART_ITConfig||, CODE, READONLY, ALIGN=1
USART_ITConfig PROC
;;;387 */
;;;388 void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState)
000000 b5f0 PUSH {r4-r7,lr}
;;;389 {
000002 4603 MOV r3,r0
;;;390 uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00;
000004 2400 MOVS r4,#0
000006 2600 MOVS r6,#0
000008 2500 MOVS r5,#0
;;;391 uint32_t usartxbase = 0x00;
00000a 2000 MOVS r0,#0
;;;392 /* Check the parameters */
;;;393 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;394 assert_param(IS_USART_CONFIG_IT(USART_IT));
;;;395 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;396 /* The CTS interrupt is not available for UART4 and UART5 */
;;;397 if (USART_IT == USART_IT_CTS)
00000c f5a16710 SUB r7,r1,#0x900
000010 3f6a SUBS r7,r7,#0x6a
000012 d100 BNE |L11.22|
;;;398 {
;;;399 assert_param(IS_USART_123_PERIPH(USARTx));
000014 bf00 NOP
|L11.22|
;;;400 }
;;;401
;;;402 usartxbase = (uint32_t)USARTx;
000016 4618 MOV r0,r3
;;;403
;;;404 /* Get the USART register index */
;;;405 usartreg = (((uint8_t)USART_IT) >> 0x05);
000018 f3c11442 UBFX r4,r1,#5,#3
;;;406
;;;407 /* Get the interrupt position */
;;;408 itpos = USART_IT & IT_Mask;
00001c f001061f AND r6,r1,#0x1f
;;;409 itmask = (((uint32_t)0x01) << itpos);
000020 2701 MOVS r7,#1
000022 fa07f506 LSL r5,r7,r6
;;;410
;;;411 if (usartreg == 0x01) /* The IT is in CR1 register */
000026 2c01 CMP r4,#1
000028 d101 BNE |L11.46|
;;;412 {
;;;413 usartxbase += 0x0C;
00002a 300c ADDS r0,r0,#0xc
00002c e004 B |L11.56|
|L11.46|
;;;414 }
;;;415 else if (usartreg == 0x02) /* The IT is in CR2 register */
00002e 2c02 CMP r4,#2
000030 d101 BNE |L11.54|
;;;416 {
;;;417 usartxbase += 0x10;
000032 3010 ADDS r0,r0,#0x10
000034 e000 B |L11.56|
|L11.54|
;;;418 }
;;;419 else /* The IT is in CR3 register */
;;;420 {
;;;421 usartxbase += 0x14;
000036 3014 ADDS r0,r0,#0x14
|L11.56|
;;;422 }
;;;423 if (NewState != DISABLE)
000038 b11a CBZ r2,|L11.66|
;;;424 {
;;;425 *(__IO uint32_t*)usartxbase |= itmask;
00003a 6807 LDR r7,[r0,#0]
00003c 432f ORRS r7,r7,r5
00003e 6007 STR r7,[r0,#0]
000040 e002 B |L11.72|
|L11.66|
;;;426 }
;;;427 else
;;;428 {
;;;429 *(__IO uint32_t*)usartxbase &= ~itmask;
000042 6807 LDR r7,[r0,#0]
000044 43af BICS r7,r7,r5
000046 6007 STR r7,[r0,#0]
|L11.72|
;;;430 }
;;;431 }
000048 bdf0 POP {r4-r7,pc}
;;;432
ENDP
AREA ||i.USART_Init||, CODE, READONLY, ALIGN=2
USART_Init PROC
;;;175 */
;;;176 void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
000000 e92d47f0 PUSH {r4-r10,lr}
;;;177 {
000004 b086 SUB sp,sp,#0x18
000006 4605 MOV r5,r0
000008 460e MOV r6,r1
;;;178 uint32_t tmpreg = 0x00, apbclock = 0x00;
00000a 2400 MOVS r4,#0
00000c 46a2 MOV r10,r4
;;;179 uint32_t integerdivider = 0x00;
00000e bf00 NOP
;;;180 uint32_t fractionaldivider = 0x00;
000010 46a1 MOV r9,r4
;;;181 uint32_t usartxbase = 0;
000012 2700 MOVS r7,#0
;;;182 RCC_ClocksTypeDef RCC_ClocksStatus;
;;;183 /* Check the parameters */
;;;184 assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;185 assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate));
;;;186 assert_param(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength));
;;;187 assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits));
;;;188 assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity));
;;;189 assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode));
;;;190 assert_param(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct->USART_HardwareFlowControl));
;;;191 /* The hardware flow control is available only for USART1, USART2 and USART3 */
;;;192 if (USART_InitStruct->USART_HardwareFlowControl != USART_HardwareFlowControl_None)
000014 89b0 LDRH r0,[r6,#0xc]
000016 b100 CBZ r0,|L12.26|
;;;193 {
;;;194 assert_param(IS_USART_123_PERIPH(USARTx));
000018 bf00 NOP
|L12.26|
;;;195 }
;;;196
;;;197 usartxbase = (uint32_t)USARTx;
00001a 462f MOV r7,r5
;;;198
;;;199 /*---------------------------- USART CR2 Configuration -----------------------*/
;;;200 tmpreg = USARTx->CR2;
00001c 8a2c LDRH r4,[r5,#0x10]
;;;201 /* Clear STOP[13:12] bits */
;;;202 tmpreg &= CR2_STOP_CLEAR_Mask;
00001e f64c70ff MOV r0,#0xcfff
000022 4004 ANDS r4,r4,r0
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