stm32f10x_usart.txt

stm32-SDIO+FatFS文件系统txt-int-ascii

; generated by ARM C/C++ Compiler, 4.1 [Build 561]
; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\CpuRAM\Obj\stm32f10x_usart.o --depend=.\CpuRAM\Obj\stm32f10x_usart.d --cpu=Cortex-M3 --apcs=interwork -O0 --diag_suppress=870 -I..\..\Libraries\CMSIS\CM3\CoreSupport -I..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I..\..\User\bsp -I..\..\User\fatfs -I..\..\User -IC:\Keil\ARM\INC -IC:\Keil\ARM\INC\ST\STM32F10x -D__MICROLIB -DSTM32F10X_HD -DUSE_STDPERIPH_DRIVER -DVECT_TAB_SRAM ..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c]
                          THUMB

                          AREA ||i.USART_ClearFlag||, CODE, READONLY, ALIGN=1

                  USART_ClearFlag PROC
;;;922      */
;;;923    void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG)
000000  f4017200          AND      r2,r1,#0x200
;;;924    {
;;;925      /* Check the parameters */
;;;926      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;927      assert_param(IS_USART_CLEAR_FLAG(USART_FLAG));
;;;928      /* The CTS flag is not available for UART4 and UART5 */
;;;929      if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS)
000004  f5b27f00          CMP      r2,#0x200
000008  d100              BNE      |L1.12|
;;;930      {
;;;931        assert_param(IS_USART_123_PERIPH(USARTx));
00000a  bf00              NOP      
                  |L1.12|
;;;932      } 
;;;933       
;;;934      USARTx->SR = (uint16_t)~USART_FLAG;
00000c  43ca              MVNS     r2,r1
00000e  8002              STRH     r2,[r0,#0]
;;;935    }
000010  4770              BX       lr
;;;936    
                          ENDP


                          AREA ||i.USART_ClearITPendingBit||, CODE, READONLY, ALIGN=1

                  USART_ClearITPendingBit PROC
;;;1029     */
;;;1030   void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT)
000000  b510              PUSH     {r4,lr}
;;;1031   {
;;;1032     uint16_t bitpos = 0x00, itmask = 0x00;
000002  2200              MOVS     r2,#0
000004  2300              MOVS     r3,#0
;;;1033     /* Check the parameters */
;;;1034     assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;1035     assert_param(IS_USART_CLEAR_IT(USART_IT));
;;;1036     /* The CTS interrupt is not available for UART4 and UART5 */
;;;1037     if (USART_IT == USART_IT_CTS)
000006  f5a16410          SUB      r4,r1,#0x900
00000a  3c6a              SUBS     r4,r4,#0x6a
00000c  d100              BNE      |L2.16|
;;;1038     {
;;;1039       assert_param(IS_USART_123_PERIPH(USARTx));
00000e  bf00              NOP      
                  |L2.16|
;;;1040     }   
;;;1041     
;;;1042     bitpos = USART_IT >> 0x08;
000010  120a              ASRS     r2,r1,#8
;;;1043     itmask = ((uint16_t)0x01 << (uint16_t)bitpos);
000012  2401              MOVS     r4,#1
000014  4094              LSLS     r4,r4,r2
000016  b2a3              UXTH     r3,r4
;;;1044     USARTx->SR = (uint16_t)~itmask;
000018  43dc              MVNS     r4,r3
00001a  8004              STRH     r4,[r0,#0]
;;;1045   }
00001c  bd10              POP      {r4,pc}
;;;1046   /**
                          ENDP


                          AREA ||i.USART_ClockInit||, CODE, READONLY, ALIGN=1

                  USART_ClockInit PROC
;;;301      */
;;;302    void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct)
000000  b510              PUSH     {r4,lr}
;;;303    {
000002  4602              MOV      r2,r0
;;;304      uint32_t tmpreg = 0x00;
000004  2000              MOVS     r0,#0
;;;305      /* Check the parameters */
;;;306      assert_param(IS_USART_123_PERIPH(USARTx));
;;;307      assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock));
;;;308      assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL));
;;;309      assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA));
;;;310      assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit));
;;;311      
;;;312    /*---------------------------- USART CR2 Configuration -----------------------*/
;;;313      tmpreg = USARTx->CR2;
000006  8a10              LDRH     r0,[r2,#0x10]
;;;314      /* Clear CLKEN, CPOL, CPHA and LBCL bits */
;;;315      tmpreg &= CR2_CLOCK_CLEAR_Mask;
000008  f24f03ff          MOV      r3,#0xf0ff
00000c  4018              ANDS     r0,r0,r3
;;;316      /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/
;;;317      /* Set CLKEN bit according to USART_Clock value */
;;;318      /* Set CPOL bit according to USART_CPOL value */
;;;319      /* Set CPHA bit according to USART_CPHA value */
;;;320      /* Set LBCL bit according to USART_LastBit value */
;;;321      tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL | 
00000e  880b              LDRH     r3,[r1,#0]
000010  884c              LDRH     r4,[r1,#2]
000012  4323              ORRS     r3,r3,r4
000014  888c              LDRH     r4,[r1,#4]
000016  4323              ORRS     r3,r3,r4
000018  88cc              LDRH     r4,[r1,#6]
00001a  4323              ORRS     r3,r3,r4
00001c  4318              ORRS     r0,r0,r3
;;;322                     USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit;
;;;323      /* Write to USART CR2 */
;;;324      USARTx->CR2 = (uint16_t)tmpreg;
00001e  8210              STRH     r0,[r2,#0x10]
;;;325    }
000020  bd10              POP      {r4,pc}
;;;326    
                          ENDP


                          AREA ||i.USART_ClockStructInit||, CODE, READONLY, ALIGN=1

                  USART_ClockStructInit PROC
;;;332      */
;;;333    void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct)
000000  2100              MOVS     r1,#0
;;;334    {
;;;335      /* USART_ClockInitStruct members default value */
;;;336      USART_ClockInitStruct->USART_Clock = USART_Clock_Disable;
000002  8001              STRH     r1,[r0,#0]
;;;337      USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low;
000004  8041              STRH     r1,[r0,#2]
;;;338      USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge;
000006  8081              STRH     r1,[r0,#4]
;;;339      USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable;
000008  80c1              STRH     r1,[r0,#6]
;;;340    }
00000a  4770              BX       lr
;;;341    
                          ENDP


                          AREA ||i.USART_Cmd||, CODE, READONLY, ALIGN=1

                  USART_Cmd PROC
;;;350      */
;;;351    void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
000000  b121              CBZ      r1,|L5.12|
;;;352    {
;;;353      /* Check the parameters */
;;;354      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;355      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;356      
;;;357      if (NewState != DISABLE)
;;;358      {
;;;359        /* Enable the selected USART by setting the UE bit in the CR1 register */
;;;360        USARTx->CR1 |= CR1_UE_Set;
000002  8982              LDRH     r2,[r0,#0xc]
000004  f4425200          ORR      r2,r2,#0x2000
000008  8182              STRH     r2,[r0,#0xc]
00000a  e004              B        |L5.22|
                  |L5.12|
;;;361      }
;;;362      else
;;;363      {
;;;364        /* Disable the selected USART by clearing the UE bit in the CR1 register */
;;;365        USARTx->CR1 &= CR1_UE_Reset;
00000c  8982              LDRH     r2,[r0,#0xc]
00000e  f64d73ff          MOV      r3,#0xdfff
000012  401a              ANDS     r2,r2,r3
000014  8182              STRH     r2,[r0,#0xc]
                  |L5.22|
;;;366      }
;;;367    }
000016  4770              BX       lr
;;;368    
                          ENDP


                          AREA ||i.USART_DMACmd||, CODE, READONLY, ALIGN=1

                  USART_DMACmd PROC
;;;447      */
;;;448    void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState)
000000  b510              PUSH     {r4,lr}
;;;449    {
;;;450      /* Check the parameters */
;;;451      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;452      assert_param(IS_USART_DMAREQ(USART_DMAReq));  
;;;453      assert_param(IS_FUNCTIONAL_STATE(NewState)); 
;;;454      if (NewState != DISABLE)
000002  b11a              CBZ      r2,|L6.12|
;;;455      {
;;;456        /* Enable the DMA transfer for selected requests by setting the DMAT and/or
;;;457           DMAR bits in the USART CR3 register */
;;;458        USARTx->CR3 |= USART_DMAReq;
000004  8a83              LDRH     r3,[r0,#0x14]
000006  430b              ORRS     r3,r3,r1
000008  8283              STRH     r3,[r0,#0x14]
00000a  e004              B        |L6.22|
                  |L6.12|
;;;459      }
;;;460      else
;;;461      {
;;;462        /* Disable the DMA transfer for selected requests by clearing the DMAT and/or
;;;463           DMAR bits in the USART CR3 register */
;;;464        USARTx->CR3 &= (uint16_t)~USART_DMAReq;
00000c  8a83              LDRH     r3,[r0,#0x14]
00000e  43cc              MVNS     r4,r1
000010  b2a4              UXTH     r4,r4
000012  4023              ANDS     r3,r3,r4
000014  8283              STRH     r3,[r0,#0x14]
                  |L6.22|
;;;465      }
;;;466    }
000016  bd10              POP      {r4,pc}
;;;467    
                          ENDP


                          AREA ||i.USART_DeInit||, CODE, READONLY, ALIGN=2

                  USART_DeInit PROC
;;;129      */
;;;130    void USART_DeInit(USART_TypeDef* USARTx)
000000  b510              PUSH     {r4,lr}
;;;131    {
000002  4604              MOV      r4,r0
;;;132      /* Check the parameters */
;;;133      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;134    
;;;135      if (USARTx == USART1)
000004  4820              LDR      r0,|L7.136|
000006  4284              CMP      r4,r0
000008  d109              BNE      |L7.30|
;;;136      {
;;;137        RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE);
00000a  2101              MOVS     r1,#1
00000c  0388              LSLS     r0,r1,#14
00000e  f7fffffe          BL       RCC_APB2PeriphResetCmd
;;;138        RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE);
000012  2100              MOVS     r1,#0
000014  f44f4080          MOV      r0,#0x4000
000018  f7fffffe          BL       RCC_APB2PeriphResetCmd
00001c  e032              B        |L7.132|
                  |L7.30|
;;;139      }
;;;140      else if (USARTx == USART2)
00001e  481b              LDR      r0,|L7.140|
000020  4284              CMP      r4,r0
000022  d109              BNE      |L7.56|
;;;141      {
;;;142        RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE);
000024  2101              MOVS     r1,#1
000026  0448              LSLS     r0,r1,#17
000028  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;143        RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE);
00002c  2100              MOVS     r1,#0
00002e  f44f3000          MOV      r0,#0x20000
000032  f7fffffe          BL       RCC_APB1PeriphResetCmd
000036  e025              B        |L7.132|
                  |L7.56|
;;;144      }
;;;145      else if (USARTx == USART3)
000038  4815              LDR      r0,|L7.144|
00003a  4284              CMP      r4,r0
00003c  d109              BNE      |L7.82|
;;;146      {
;;;147        RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE);
00003e  2101              MOVS     r1,#1
000040  0488              LSLS     r0,r1,#18
000042  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;148        RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE);
000046  2100              MOVS     r1,#0
000048  f44f2080          MOV      r0,#0x40000
00004c  f7fffffe          BL       RCC_APB1PeriphResetCmd
000050  e018              B        |L7.132|
                  |L7.82|
;;;149      }    
;;;150      else if (USARTx == UART4)
000052  4810              LDR      r0,|L7.148|
000054  4284              CMP      r4,r0
000056  d109              BNE      |L7.108|
;;;151      {
;;;152        RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE);
000058  2101              MOVS     r1,#1
00005a  04c8              LSLS     r0,r1,#19
00005c  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;153        RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE);
000060  2100              MOVS     r1,#0
000062  f44f2000          MOV      r0,#0x80000
000066  f7fffffe          BL       RCC_APB1PeriphResetCmd
00006a  e00b              B        |L7.132|
                  |L7.108|
;;;154      }    
;;;155      else
;;;156      {
;;;157        if (USARTx == UART5)
00006c  480a              LDR      r0,|L7.152|
00006e  4284              CMP      r4,r0
000070  d108              BNE      |L7.132|
;;;158        { 
;;;159          RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE);
000072  2101              MOVS     r1,#1
000074  0508              LSLS     r0,r1,#20
000076  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;160          RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE);
00007a  2100              MOVS     r1,#0
00007c  f44f1080          MOV      r0,#0x100000
000080  f7fffffe          BL       RCC_APB1PeriphResetCmd
                  |L7.132|
;;;161        }
;;;162      }
;;;163    }
000084  bd10              POP      {r4,pc}
;;;164    
                          ENDP

000086  0000              DCW      0x0000
                  |L7.136|
                          DCD      0x40013800
                  |L7.140|
                          DCD      0x40004400
                  |L7.144|