📄 stm32f10x_rcc.txt
字号:
;;;852 break;
000026 bf00 NOP
|L21.40|
000028 bf00 NOP ;844
;;;853 }
;;;854 }
00002a 4770 BX lr
;;;855
ENDP
|L21.44|
DCD 0x40021020
|L21.48|
DCD 0x40021000
AREA ||i.RCC_LSICmd||, CODE, READONLY, ALIGN=2
RCC_LSICmd PROC
;;;861 */
;;;862 void RCC_LSICmd(FunctionalState NewState)
000000 4901 LDR r1,|L22.8|
;;;863 {
;;;864 /* Check the parameters */
;;;865 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;866 *(__IO uint32_t *) CSR_LSION_BB = (uint32_t)NewState;
000002 6008 STR r0,[r1,#0]
;;;867 }
000004 4770 BX lr
;;;868
ENDP
000006 0000 DCW 0x0000
|L22.8|
DCD 0x42420480
AREA ||i.RCC_MCOConfig||, CODE, READONLY, ALIGN=2
RCC_MCOConfig PROC
;;;1281 */
;;;1282 void RCC_MCOConfig(uint8_t RCC_MCO)
000000 4901 LDR r1,|L23.8|
;;;1283 {
;;;1284 /* Check the parameters */
;;;1285 assert_param(IS_RCC_MCO(RCC_MCO));
;;;1286
;;;1287 /* Perform Byte access to MCO bits to select the MCO source */
;;;1288 *(__IO uint8_t *) CFGR_BYTE4_ADDRESS = RCC_MCO;
000002 71c8 STRB r0,[r1,#7]
;;;1289 }
000004 4770 BX lr
;;;1290
ENDP
000006 0000 DCW 0x0000
|L23.8|
DCD 0x40021000
AREA ||i.RCC_PCLK1Config||, CODE, READONLY, ALIGN=2
RCC_PCLK1Config PROC
;;;633 */
;;;634 void RCC_PCLK1Config(uint32_t RCC_HCLK)
000000 4601 MOV r1,r0
;;;635 {
;;;636 uint32_t tmpreg = 0;
000002 2000 MOVS r0,#0
;;;637 /* Check the parameters */
;;;638 assert_param(IS_RCC_PCLK(RCC_HCLK));
;;;639 tmpreg = RCC->CFGR;
000004 4a03 LDR r2,|L24.20|
000006 6850 LDR r0,[r2,#4]
;;;640 /* Clear PPRE1[2:0] bits */
;;;641 tmpreg &= CFGR_PPRE1_Reset_Mask;
000008 f42060e0 BIC r0,r0,#0x700
;;;642 /* Set PPRE1[2:0] bits according to RCC_HCLK value */
;;;643 tmpreg |= RCC_HCLK;
00000c 4308 ORRS r0,r0,r1
;;;644 /* Store the new value */
;;;645 RCC->CFGR = tmpreg;
00000e 6050 STR r0,[r2,#4]
;;;646 }
000010 4770 BX lr
;;;647
ENDP
000012 0000 DCW 0x0000
|L24.20|
DCD 0x40021000
AREA ||i.RCC_PCLK2Config||, CODE, READONLY, ALIGN=2
RCC_PCLK2Config PROC
;;;659 */
;;;660 void RCC_PCLK2Config(uint32_t RCC_HCLK)
000000 4601 MOV r1,r0
;;;661 {
;;;662 uint32_t tmpreg = 0;
000002 2000 MOVS r0,#0
;;;663 /* Check the parameters */
;;;664 assert_param(IS_RCC_PCLK(RCC_HCLK));
;;;665 tmpreg = RCC->CFGR;
000004 4a03 LDR r2,|L25.20|
000006 6850 LDR r0,[r2,#4]
;;;666 /* Clear PPRE2[2:0] bits */
;;;667 tmpreg &= CFGR_PPRE2_Reset_Mask;
000008 f4205060 BIC r0,r0,#0x3800
;;;668 /* Set PPRE2[2:0] bits according to RCC_HCLK value */
;;;669 tmpreg |= RCC_HCLK << 3;
00000c ea4000c1 ORR r0,r0,r1,LSL #3
;;;670 /* Store the new value */
;;;671 RCC->CFGR = tmpreg;
000010 6050 STR r0,[r2,#4]
;;;672 }
000012 4770 BX lr
;;;673
ENDP
|L25.20|
DCD 0x40021000
AREA ||i.RCC_PLLCmd||, CODE, READONLY, ALIGN=2
RCC_PLLCmd PROC
;;;400 */
;;;401 void RCC_PLLCmd(FunctionalState NewState)
000000 4901 LDR r1,|L26.8|
;;;402 {
;;;403 /* Check the parameters */
;;;404 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;405
;;;406 *(__IO uint32_t *) CR_PLLON_BB = (uint32_t)NewState;
000002 6608 STR r0,[r1,#0x60]
;;;407 }
000004 4770 BX lr
;;;408
ENDP
000006 0000 DCW 0x0000
|L26.8|
DCD 0x42420000
AREA ||i.RCC_PLLConfig||, CODE, READONLY, ALIGN=2
RCC_PLLConfig PROC
;;;377 */
;;;378 void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul)
000000 4602 MOV r2,r0
;;;379 {
;;;380 uint32_t tmpreg = 0;
000002 2000 MOVS r0,#0
;;;381
;;;382 /* Check the parameters */
;;;383 assert_param(IS_RCC_PLL_SOURCE(RCC_PLLSource));
;;;384 assert_param(IS_RCC_PLL_MUL(RCC_PLLMul));
;;;385
;;;386 tmpreg = RCC->CFGR;
000004 4b04 LDR r3,|L27.24|
000006 6858 LDR r0,[r3,#4]
;;;387 /* Clear PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
;;;388 tmpreg &= CFGR_PLL_Mask;
000008 f420107c BIC r0,r0,#0x3f0000
;;;389 /* Set the PLL configuration bits */
;;;390 tmpreg |= RCC_PLLSource | RCC_PLLMul;
00000c ea420301 ORR r3,r2,r1
000010 4318 ORRS r0,r0,r3
;;;391 /* Store the new value */
;;;392 RCC->CFGR = tmpreg;
000012 4b01 LDR r3,|L27.24|
000014 6058 STR r0,[r3,#4]
;;;393 }
000016 4770 BX lr
;;;394
ENDP
|L27.24|
DCD 0x40021000
AREA ||i.RCC_RTCCLKCmd||, CODE, READONLY, ALIGN=2
RCC_RTCCLKCmd PROC
;;;892 */
;;;893 void RCC_RTCCLKCmd(FunctionalState NewState)
000000 4901 LDR r1,|L28.8|
;;;894 {
;;;895 /* Check the parameters */
;;;896 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;897 *(__IO uint32_t *) BDCR_RTCEN_BB = (uint32_t)NewState;
000002 6008 STR r0,[r1,#0]
;;;898 }
000004 4770 BX lr
;;;899
ENDP
000006 0000 DCW 0x0000
|L28.8|
DCD 0x4242043c
AREA ||i.RCC_RTCCLKConfig||, CODE, READONLY, ALIGN=2
RCC_RTCCLKConfig PROC
;;;878 */
;;;879 void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource)
000000 4902 LDR r1,|L29.12|
;;;880 {
;;;881 /* Check the parameters */
;;;882 assert_param(IS_RCC_RTCCLK_SOURCE(RCC_RTCCLKSource));
;;;883 /* Select the RTC clock source */
;;;884 RCC->BDCR |= RCC_RTCCLKSource;
000002 6a09 LDR r1,[r1,#0x20]
000004 4301 ORRS r1,r1,r0
000006 4a01 LDR r2,|L29.12|
000008 6211 STR r1,[r2,#0x20]
;;;885 }
00000a 4770 BX lr
;;;886
ENDP
|L29.12|
DCD 0x40021000
AREA ||i.RCC_SYSCLKConfig||, CODE, READONLY, ALIGN=2
RCC_SYSCLKConfig PROC
;;;563 */
;;;564 void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource)
000000 4601 MOV r1,r0
;;;565 {
;;;566 uint32_t tmpreg = 0;
000002 2000 MOVS r0,#0
;;;567 /* Check the parameters */
;;;568 assert_param(IS_RCC_SYSCLK_SOURCE(RCC_SYSCLKSource));
;;;569 tmpreg = RCC->CFGR;
000004 4a03 LDR r2,|L30.20|
000006 6850 LDR r0,[r2,#4]
;;;570 /* Clear SW[1:0] bits */
;;;571 tmpreg &= CFGR_SW_Mask;
000008 f0200003 BIC r0,r0,#3
;;;572 /* Set SW[1:0] bits according to RCC_SYSCLKSource value */
;;;573 tmpreg |= RCC_SYSCLKSource;
00000c 4308 ORRS r0,r0,r1
;;;574 /* Store the new value */
;;;575 RCC->CFGR = tmpreg;
00000e 6050 STR r0,[r2,#4]
;;;576 }
000010 4770 BX lr
;;;577
ENDP
000012 0000 DCW 0x0000
|L30.20|
DCD 0x40021000
AREA ||i.RCC_USBCLKConfig||, CODE, READONLY, ALIGN=2
RCC_USBCLKConfig PROC
;;;727 */
;;;728 void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource)
000000 4901 LDR r1,|L31.8|
;;;729 {
;;;730 /* Check the parameters */
;;;731 assert_param(IS_RCC_USBCLK_SOURCE(RCC_USBCLKSource));
;;;732
;;;733 *(__IO uint32_t *) CFGR_USBPRE_BB = RCC_USBCLKSource;
000002 6008 STR r0,[r1,#0]
;;;734 }
000004 4770 BX lr
;;;735 #else
ENDP
000006 0000 DCW 0x0000
|L31.8|
DCD 0x424200d8
AREA ||i.RCC_WaitForHSEStartUp||, CODE, READONLY, ALIGN=1
RCC_WaitForHSEStartUp PROC
;;;303 */
;;;304 ErrorStatus RCC_WaitForHSEStartUp(void)
000000 b570 PUSH {r4-r6,lr}
;;;305 {
;;;306 __IO uint32_t StartUpCounter = 0;
000002 2400 MOVS r4,#0
;;;307 ErrorStatus status = ERROR;
000004 2500 MOVS r5,#0
;;;308 FlagStatus HSEStatus = RESET;
000006 2600 MOVS r6,#0
;;;309
;;;310 /* Wait till HSE is ready and if Time out is reached exit */
;;;311 do
000008 bf00 NOP
|L32.10|
;;;312 {
;;;313 HSEStatus = RCC_GetFlagStatus(RCC_FLAG_HSERDY);
00000a 2031 MOVS r0,#0x31
00000c f7fffffe BL RCC_GetFlagStatus
000010 4606 MOV r6,r0
;;;314 StartUpCounter++;
000012 1c64 ADDS r4,r4,#1
;;;315 } while((StartUpCounter != HSE_STARTUP_TIMEOUT) && (HSEStatus == RESET));
000014 f5b46fa0 CMP r4,#0x500
000018 d001 BEQ |L32.30|
00001a 2e00 CMP r6,#0
00001c d0f5 BEQ |L32.10|
|L32.30|
;;;316
;;;317 if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET)
00001e 2031 MOVS r0,#0x31
000020 f7fffffe BL RCC_GetFlagStatus
000024 b108 CBZ r0,|L32.42|
;;;318 {
;;;319 status = SUCCESS;
000026 2501 MOVS r5,#1
000028 e000 B |L32.44|
|L32.42|
;;;320 }
;;;321 else
;;;322 {
;;;323 status = ERROR;
00002a 2500 MOVS r5,#0
|L32.44|
;;;324 }
;;;325 return (status);
00002c 4628 MOV r0,r5
;;;326 }
00002e bd70 POP {r4-r6,pc}
;;;327
ENDP
AREA ||.data||, DATA, ALIGN=0
APBAHBPrescTable
000000 00000000 DCB 0x00,0x00,0x00,0x00
000004 01020304 DCB 0x01,0x02,0x03,0x04
000008 01020304 DCB 0x01,0x02,0x03,0x04
00000c 06070809 DCB 0x06,0x07,0x08,0x09
ADCPrescTable
000010 02040608 DCB 0x02,0x04,0x06,0x08
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