📄 stm32f10x_gpio.txt
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; generated by ARM C/C++ Compiler, 4.1 [Build 561]
; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\Flash\Obj\stm32f10x_gpio.o --depend=.\Flash\Obj\stm32f10x_gpio.d --cpu=Cortex-M3 --apcs=interwork -O0 --diag_suppress=870 -I..\..\Libraries\CMSIS\CM3\CoreSupport -I..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I..\..\User\bsp -I..\..\User\fatfs -I..\..\User -IC:\Keil\ARM\INC -IC:\Keil\ARM\INC\ST\STM32F10x -D__MICROLIB -DSTM32F10X_HD -DUSE_STDPERIPH_DRIVER ..\..\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c]
THUMB
AREA ||i.GPIO_AFIODeInit||, CODE, READONLY, ALIGN=1
GPIO_AFIODeInit PROC
;;;158 */
;;;159 void GPIO_AFIODeInit(void)
000000 b510 PUSH {r4,lr}
;;;160 {
;;;161 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
000002 2101 MOVS r1,#1
000004 4608 MOV r0,r1
000006 f7fffffe BL RCC_APB2PeriphResetCmd
;;;162 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
00000a 2100 MOVS r1,#0
00000c 2001 MOVS r0,#1
00000e f7fffffe BL RCC_APB2PeriphResetCmd
;;;163 }
000012 bd10 POP {r4,pc}
;;;164
ENDP
AREA ||i.GPIO_DeInit||, CODE, READONLY, ALIGN=2
GPIO_DeInit PROC
;;;107 */
;;;108 void GPIO_DeInit(GPIO_TypeDef* GPIOx)
000000 b510 PUSH {r4,lr}
;;;109 {
000002 4604 MOV r4,r0
;;;110 /* Check the parameters */
;;;111 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;112
;;;113 if (GPIOx == GPIOA)
000004 4829 LDR r0,|L2.172|
000006 4284 CMP r4,r0
000008 d108 BNE |L2.28|
;;;114 {
;;;115 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
00000a 2101 MOVS r1,#1
00000c 2004 MOVS r0,#4
00000e f7fffffe BL RCC_APB2PeriphResetCmd
;;;116 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
000012 2100 MOVS r1,#0
000014 2004 MOVS r0,#4
000016 f7fffffe BL RCC_APB2PeriphResetCmd
00001a e046 B |L2.170|
|L2.28|
;;;117 }
;;;118 else if (GPIOx == GPIOB)
00001c 4824 LDR r0,|L2.176|
00001e 4284 CMP r4,r0
000020 d108 BNE |L2.52|
;;;119 {
;;;120 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
000022 2101 MOVS r1,#1
000024 2008 MOVS r0,#8
000026 f7fffffe BL RCC_APB2PeriphResetCmd
;;;121 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
00002a 2100 MOVS r1,#0
00002c 2008 MOVS r0,#8
00002e f7fffffe BL RCC_APB2PeriphResetCmd
000032 e03a B |L2.170|
|L2.52|
;;;122 }
;;;123 else if (GPIOx == GPIOC)
000034 481f LDR r0,|L2.180|
000036 4284 CMP r4,r0
000038 d108 BNE |L2.76|
;;;124 {
;;;125 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
00003a 2101 MOVS r1,#1
00003c 2010 MOVS r0,#0x10
00003e f7fffffe BL RCC_APB2PeriphResetCmd
;;;126 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
000042 2100 MOVS r1,#0
000044 2010 MOVS r0,#0x10
000046 f7fffffe BL RCC_APB2PeriphResetCmd
00004a e02e B |L2.170|
|L2.76|
;;;127 }
;;;128 else if (GPIOx == GPIOD)
00004c 481a LDR r0,|L2.184|
00004e 4284 CMP r4,r0
000050 d108 BNE |L2.100|
;;;129 {
;;;130 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
000052 2101 MOVS r1,#1
000054 2020 MOVS r0,#0x20
000056 f7fffffe BL RCC_APB2PeriphResetCmd
;;;131 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
00005a 2100 MOVS r1,#0
00005c 2020 MOVS r0,#0x20
00005e f7fffffe BL RCC_APB2PeriphResetCmd
000062 e022 B |L2.170|
|L2.100|
;;;132 }
;;;133 else if (GPIOx == GPIOE)
000064 4815 LDR r0,|L2.188|
000066 4284 CMP r4,r0
000068 d108 BNE |L2.124|
;;;134 {
;;;135 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
00006a 2101 MOVS r1,#1
00006c 2040 MOVS r0,#0x40
00006e f7fffffe BL RCC_APB2PeriphResetCmd
;;;136 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
000072 2100 MOVS r1,#0
000074 2040 MOVS r0,#0x40
000076 f7fffffe BL RCC_APB2PeriphResetCmd
00007a e016 B |L2.170|
|L2.124|
;;;137 }
;;;138 else if (GPIOx == GPIOF)
00007c 4810 LDR r0,|L2.192|
00007e 4284 CMP r4,r0
000080 d108 BNE |L2.148|
;;;139 {
;;;140 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
000082 2101 MOVS r1,#1
000084 2080 MOVS r0,#0x80
000086 f7fffffe BL RCC_APB2PeriphResetCmd
;;;141 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
00008a 2100 MOVS r1,#0
00008c 2080 MOVS r0,#0x80
00008e f7fffffe BL RCC_APB2PeriphResetCmd
000092 e00a B |L2.170|
|L2.148|
;;;142 }
;;;143 else
;;;144 {
;;;145 if (GPIOx == GPIOG)
000094 480b LDR r0,|L2.196|
000096 4284 CMP r4,r0
000098 d107 BNE |L2.170|
;;;146 {
;;;147 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
00009a 2101 MOVS r1,#1
00009c 1580 ASRS r0,r0,#22
00009e f7fffffe BL RCC_APB2PeriphResetCmd
;;;148 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
0000a2 2100 MOVS r1,#0
0000a4 15a0 ASRS r0,r4,#22
0000a6 f7fffffe BL RCC_APB2PeriphResetCmd
|L2.170|
;;;149 }
;;;150 }
;;;151 }
0000aa bd10 POP {r4,pc}
;;;152
ENDP
|L2.172|
DCD 0x40010800
|L2.176|
DCD 0x40010c00
|L2.180|
DCD 0x40011000
|L2.184|
DCD 0x40011400
|L2.188|
DCD 0x40011800
|L2.192|
DCD 0x40011c00
|L2.196|
DCD 0x40012000
AREA ||i.GPIO_ETH_MediaInterfaceConfig||, CODE, READONLY, ALIGN=2
GPIO_ETH_MediaInterfaceConfig PROC
;;;629 */
;;;630 void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
000000 4901 LDR r1,|L3.8|
;;;631 {
;;;632 assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
;;;633
;;;634 /* Configure MII_RMII selection bit */
;;;635 *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
000002 6008 STR r0,[r1,#0]
;;;636 }
000004 4770 BX lr
;;;637
ENDP
000006 0000 DCW 0x0000
|L3.8|
DCD 0x422000dc
AREA ||i.GPIO_EXTILineConfig||, CODE, READONLY, ALIGN=2
GPIO_EXTILineConfig PROC
;;;608 */
;;;609 void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
000000 b530 PUSH {r4,r5,lr}
;;;610 {
;;;611 uint32_t tmp = 0x00;
000002 2200 MOVS r2,#0
;;;612 /* Check the parameters */
;;;613 assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
;;;614 assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
;;;615
;;;616 tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
000004 078b LSLS r3,r1,#30
000006 0f1c LSRS r4,r3,#28
000008 230f MOVS r3,#0xf
00000a fa03f204 LSL r2,r3,r4
;;;617 AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
00000e 4b0b LDR r3,|L4.60|
000010 108c ASRS r4,r1,#2
000012 f8533024 LDR r3,[r3,r4,LSL #2]
000016 4393 BICS r3,r3,r2
000018 4c08 LDR r4,|L4.60|
00001a 108d ASRS r5,r1,#2
00001c f8443025 STR r3,[r4,r5,LSL #2]
;;;618 AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
000020 4623 MOV r3,r4
000022 108c ASRS r4,r1,#2
000024 f8533024 LDR r3,[r3,r4,LSL #2]
000028 078c LSLS r4,r1,#30
00002a 0f24 LSRS r4,r4,#28
00002c fa00f404 LSL r4,r0,r4
000030 4323 ORRS r3,r3,r4
000032 4c02 LDR r4,|L4.60|
000034 108d ASRS r5,r1,#2
000036 f8443025 STR r3,[r4,r5,LSL #2]
;;;619 }
00003a bd30 POP {r4,r5,pc}
;;;620
ENDP
|L4.60|
DCD 0x40010008
AREA ||i.GPIO_EventOutputCmd||, CODE, READONLY, ALIGN=2
GPIO_EventOutputCmd PROC
;;;482 */
;;;483 void GPIO_EventOutputCmd(FunctionalState NewState)
000000 4901 LDR r1,|L5.8|
;;;484 {
;;;485 /* Check the parameters */
;;;486 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;487
;;;488 *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
000002 61c8 STR r0,[r1,#0x1c]
;;;489 }
000004 4770 BX lr
;;;490
ENDP
000006 0000 DCW 0x0000
|L5.8|
DCD 0x42200000
AREA ||i.GPIO_EventOutputConfig||, CODE, READONLY, ALIGN=2
GPIO_EventOutputConfig PROC
;;;461 */
;;;462 void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
000000 4602 MOV r2,r0
;;;463 {
;;;464 uint32_t tmpreg = 0x00;
000002 2000 MOVS r0,#0
;;;465 /* Check the parameters */
;;;466 assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
;;;467 assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
;;;468
;;;469 tmpreg = AFIO->EVCR;
000004 4b05 LDR r3,|L6.28|
000006 6818 LDR r0,[r3,#0]
;;;470 /* Clear the PORT[6:4] and PIN[3:0] bits */
;;;471 tmpreg &= EVCR_PORTPINCONFIG_MASK;
000008 f64f7380 MOV r3,#0xff80
00000c 4018 ANDS r0,r0,r3
;;;472 tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
00000e ea401002 ORR r0,r0,r2,LSL #4
;;;473 tmpreg |= GPIO_PinSource;
000012 4308 ORRS r0,r0,r1
;;;474 AFIO->EVCR = tmpreg;
000014 4b01 LDR r3,|L6.28|
000016 6018 STR r0,[r3,#0]
;;;475 }
000018 4770 BX lr
;;;476
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