stm32f10x_sdio.txt

stm32-SDIO+FatFS文件系统txt-int-ascii

                          DCD      0x40018000
                  |L10.32|
                          DCD      0x00c007ff

                          AREA ||i.SDIO_GetCommandResponse||, CODE, READONLY, ALIGN=2

                  SDIO_GetCommandResponse PROC
;;;396      */
;;;397    uint8_t SDIO_GetCommandResponse(void)
000000  4801              LDR      r0,|L11.8|
;;;398    {
;;;399      return (uint8_t)(SDIO->RESPCMD);
000002  6900              LDR      r0,[r0,#0x10]
000004  b2c0              UXTB     r0,r0
;;;400    }
000006  4770              BX       lr
;;;401    
                          ENDP

                  |L11.8|
                          DCD      0x40018000

                          AREA ||i.SDIO_GetDataCounter||, CODE, READONLY, ALIGN=2

                  SDIO_GetDataCounter PROC
;;;487      */
;;;488    uint32_t SDIO_GetDataCounter(void)
000000  4801              LDR      r0,|L12.8|
;;;489    { 
;;;490      return SDIO->DCOUNT;
000002  6b00              LDR      r0,[r0,#0x30]
;;;491    }
000004  4770              BX       lr
;;;492    
                          ENDP

000006  0000              DCW      0x0000
                  |L12.8|
                          DCD      0x40018000

                          AREA ||i.SDIO_GetFIFOCount||, CODE, READONLY, ALIGN=2

                  SDIO_GetFIFOCount PROC
;;;517      */
;;;518    uint32_t SDIO_GetFIFOCount(void)
000000  4801              LDR      r0,|L13.8|
;;;519    { 
;;;520      return SDIO->FIFOCNT;
000002  6c80              LDR      r0,[r0,#0x48]
;;;521    }
000004  4770              BX       lr
;;;522    
                          ENDP

000006  0000              DCW      0x0000
                  |L13.8|
                          DCD      0x40018000

                          AREA ||i.SDIO_GetFlagStatus||, CODE, READONLY, ALIGN=2

                  SDIO_GetFlagStatus PROC
;;;665      */
;;;666    FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG)
000000  4601              MOV      r1,r0
;;;667    { 
;;;668      FlagStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;669      
;;;670      /* Check the parameters */
;;;671      assert_param(IS_SDIO_FLAG(SDIO_FLAG));
;;;672      
;;;673      if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET)
000004  4a03              LDR      r2,|L14.20|
000006  6b52              LDR      r2,[r2,#0x34]
000008  420a              TST      r2,r1
00000a  d001              BEQ      |L14.16|
;;;674      {
;;;675        bitstatus = SET;
00000c  2001              MOVS     r0,#1
00000e  e000              B        |L14.18|
                  |L14.16|
;;;676      }
;;;677      else
;;;678      {
;;;679        bitstatus = RESET;
000010  2000              MOVS     r0,#0
                  |L14.18|
;;;680      }
;;;681      return bitstatus;
;;;682    }
000012  4770              BX       lr
;;;683    
                          ENDP

                  |L14.20|
                          DCD      0x40018000

                          AREA ||i.SDIO_GetITStatus||, CODE, READONLY, ALIGN=2

                  SDIO_GetITStatus PROC
;;;742      */
;;;743    ITStatus SDIO_GetITStatus(uint32_t SDIO_IT)
000000  4601              MOV      r1,r0
;;;744    { 
;;;745      ITStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;746      
;;;747      /* Check the parameters */
;;;748      assert_param(IS_SDIO_GET_IT(SDIO_IT));
;;;749      if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET)  
000004  4a03              LDR      r2,|L15.20|
000006  6b52              LDR      r2,[r2,#0x34]
000008  420a              TST      r2,r1
00000a  d001              BEQ      |L15.16|
;;;750      {
;;;751        bitstatus = SET;
00000c  2001              MOVS     r0,#1
00000e  e000              B        |L15.18|
                  |L15.16|
;;;752      }
;;;753      else
;;;754      {
;;;755        bitstatus = RESET;
000010  2000              MOVS     r0,#0
                  |L15.18|
;;;756      }
;;;757      return bitstatus;
;;;758    }
000012  4770              BX       lr
;;;759    
                          ENDP

                  |L15.20|
                          DCD      0x40018000

                          AREA ||i.SDIO_GetPowerState||, CODE, READONLY, ALIGN=2

                  SDIO_GetPowerState PROC
;;;268      */
;;;269    uint32_t SDIO_GetPowerState(void)
000000  4802              LDR      r0,|L16.12|
;;;270    {
;;;271      return (SDIO->POWER & (~PWR_PWRCTRL_MASK));
000002  6800              LDR      r0,[r0,#0]
000004  f0000003          AND      r0,r0,#3
;;;272    }
000008  4770              BX       lr
;;;273    
                          ENDP

00000a  0000              DCW      0x0000
                  |L16.12|
                          DCD      0x40018000

                          AREA ||i.SDIO_GetResponse||, CODE, READONLY, ALIGN=2

                  SDIO_GetResponse PROC
;;;411      */
;;;412    uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
000000  4601              MOV      r1,r0
;;;413    {
;;;414      __IO uint32_t tmp = 0;
000002  2200              MOVS     r2,#0
;;;415    
;;;416      /* Check the parameters */
;;;417      assert_param(IS_SDIO_RESP(SDIO_RESP));
;;;418    
;;;419      tmp = SDIO_RESP_ADDR + SDIO_RESP;
000004  4801              LDR      r0,|L17.12|
000006  180a              ADDS     r2,r1,r0
;;;420      
;;;421      return (*(__IO uint32_t *) tmp); 
000008  6810              LDR      r0,[r2,#0]
;;;422    }
00000a  4770              BX       lr
;;;423    
                          ENDP

                  |L17.12|
                          DCD      0x40018014

                          AREA ||i.SDIO_ITConfig||, CODE, READONLY, ALIGN=2

                  SDIO_ITConfig PROC
;;;306      */
;;;307    void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState)
000000  b129              CBZ      r1,|L18.14|
;;;308    {
;;;309      /* Check the parameters */
;;;310      assert_param(IS_SDIO_IT(SDIO_IT));
;;;311      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;312      
;;;313      if (NewState != DISABLE)
;;;314      {
;;;315        /* Enable the SDIO interrupts */
;;;316        SDIO->MASK |= SDIO_IT;
000002  4a06              LDR      r2,|L18.28|
000004  6bd2              LDR      r2,[r2,#0x3c]
000006  4302              ORRS     r2,r2,r0
000008  4b04              LDR      r3,|L18.28|
00000a  63da              STR      r2,[r3,#0x3c]
00000c  e004              B        |L18.24|
                  |L18.14|
;;;317      }
;;;318      else
;;;319      {
;;;320        /* Disable the SDIO interrupts */
;;;321        SDIO->MASK &= ~SDIO_IT;
00000e  4a03              LDR      r2,|L18.28|
000010  6bd2              LDR      r2,[r2,#0x3c]
000012  4382              BICS     r2,r2,r0
000014  4b01              LDR      r3,|L18.28|
000016  63da              STR      r2,[r3,#0x3c]
                  |L18.24|
;;;322      } 
;;;323    }
000018  4770              BX       lr
;;;324    
                          ENDP

00001a  0000              DCW      0x0000
                  |L18.28|
                          DCD      0x40018000

                          AREA ||i.SDIO_Init||, CODE, READONLY, ALIGN=2

                  SDIO_Init PROC
;;;180      */
;;;181    void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct)
000000  2100              MOVS     r1,#0
;;;182    {
;;;183      uint32_t tmpreg = 0;
;;;184        
;;;185      /* Check the parameters */
;;;186      assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge));
;;;187      assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass));
;;;188      assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave));
;;;189      assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide));
;;;190      assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl)); 
;;;191       
;;;192    /*---------------------------- SDIO CLKCR Configuration ------------------------*/  
;;;193      /* Get the SDIO CLKCR value */
;;;194      tmpreg = SDIO->CLKCR;
000002  4a0a              LDR      r2,|L19.44|
000004  6851              LDR      r1,[r2,#4]
;;;195      
;;;196      /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */
;;;197      tmpreg &= CLKCR_CLEAR_MASK;
000006  f64762ff          MOV      r2,#0x7eff
00000a  4391              BICS     r1,r1,r2
;;;198      
;;;199      /* Set CLKDIV bits according to SDIO_ClockDiv value */
;;;200      /* Set PWRSAV bit according to SDIO_ClockPowerSave value */
;;;201      /* Set BYPASS bit according to SDIO_ClockBypass value */
;;;202      /* Set WIDBUS bits according to SDIO_BusWide value */
;;;203      /* Set NEGEDGE bits according to SDIO_ClockEdge value */
;;;204      /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */
;;;205      tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv  | SDIO_InitStruct->SDIO_ClockPowerSave |
00000c  7d02              LDRB     r2,[r0,#0x14]
00000e  6883              LDR      r3,[r0,#8]
000010  431a              ORRS     r2,r2,r3
000012  6843              LDR      r3,[r0,#4]
000014  431a              ORRS     r2,r2,r3
000016  68c3              LDR      r3,[r0,#0xc]
000018  431a              ORRS     r2,r2,r3
00001a  6803              LDR      r3,[r0,#0]
00001c  431a              ORRS     r2,r2,r3
00001e  6903              LDR      r3,[r0,#0x10]
000020  431a              ORRS     r2,r2,r3
000022  4311              ORRS     r1,r1,r2
;;;206                 SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide |
;;;207                 SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl); 
;;;208      
;;;209      /* Write to SDIO CLKCR */
;;;210      SDIO->CLKCR = tmpreg;
000024  4a01              LDR      r2,|L19.44|
000026  6051              STR      r1,[r2,#4]
;;;211    }
000028  4770              BX       lr
;;;212    
                          ENDP