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📄 phy.c

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	u16 data;	ret_val = e1000_phy_hw_reset(hw);	if (ret_val) {		hw_dbg(hw, "Error resetting the PHY.\n");		return ret_val;	}	/*	 * Wait 100ms for MAC to configure PHY from NVM settings, to avoid	 * timeout issues when LFS is enabled.	 */	msleep(100);	/* disable lplu d0 during driver init */	ret_val = e1000_set_d0_lplu_state(hw, 0);	if (ret_val) {		hw_dbg(hw, "Error Disabling LPLU D0\n");		return ret_val;	}	/* Configure mdi-mdix settings */	ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CTRL, &data);	if (ret_val)		return ret_val;	data &= ~IGP01E1000_PSCR_AUTO_MDIX;	switch (phy->mdix) {	case 1:		data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;		break;	case 2:		data |= IGP01E1000_PSCR_FORCE_MDI_MDIX;		break;	case 0:	default:		data |= IGP01E1000_PSCR_AUTO_MDIX;		break;	}	ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CTRL, data);	if (ret_val)		return ret_val;	/* set auto-master slave resolution settings */	if (hw->mac.autoneg) {		/*		 * when autonegotiation advertisement is only 1000Mbps then we		 * should disable SmartSpeed and enable Auto MasterSlave		 * resolution as hardware default.		 */		if (phy->autoneg_advertised == ADVERTISE_1000_FULL) {			/* Disable SmartSpeed */			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,					   &data);			if (ret_val)				return ret_val;			data &= ~IGP01E1000_PSCFR_SMART_SPEED;			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,					   data);			if (ret_val)				return ret_val;			/* Set auto Master/Slave resolution process */			ret_val = e1e_rphy(hw, PHY_1000T_CTRL, &data);			if (ret_val)				return ret_val;			data &= ~CR_1000T_MS_ENABLE;			ret_val = e1e_wphy(hw, PHY_1000T_CTRL, data);			if (ret_val)				return ret_val;		}		ret_val = e1e_rphy(hw, PHY_1000T_CTRL, &data);		if (ret_val)			return ret_val;		/* load defaults for future use */		phy->original_ms_type = (data & CR_1000T_MS_ENABLE) ?			((data & CR_1000T_MS_VALUE) ?			e1000_ms_force_master :			e1000_ms_force_slave) :			e1000_ms_auto;		switch (phy->ms_type) {		case e1000_ms_force_master:			data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE);			break;		case e1000_ms_force_slave:			data |= CR_1000T_MS_ENABLE;			data &= ~(CR_1000T_MS_VALUE);			break;		case e1000_ms_auto:			data &= ~CR_1000T_MS_ENABLE;		default:			break;		}		ret_val = e1e_wphy(hw, PHY_1000T_CTRL, data);	}	return ret_val;}/** *  e1000_phy_setup_autoneg - Configure PHY for auto-negotiation *  @hw: pointer to the HW structure * *  Reads the MII auto-neg advertisement register and/or the 1000T control *  register and if the PHY is already setup for auto-negotiation, then *  return successful.  Otherwise, setup advertisement and flow control to *  the appropriate values for the wanted auto-negotiation. **/static s32 e1000_phy_setup_autoneg(struct e1000_hw *hw){	struct e1000_phy_info *phy = &hw->phy;	s32 ret_val;	u16 mii_autoneg_adv_reg;	u16 mii_1000t_ctrl_reg = 0;	phy->autoneg_advertised &= phy->autoneg_mask;	/* Read the MII Auto-Neg Advertisement Register (Address 4). */	ret_val = e1e_rphy(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);	if (ret_val)		return ret_val;	if (phy->autoneg_mask & ADVERTISE_1000_FULL) {		/* Read the MII 1000Base-T Control Register (Address 9). */		ret_val = e1e_rphy(hw, PHY_1000T_CTRL, &mii_1000t_ctrl_reg);		if (ret_val)			return ret_val;	}	/*	 * Need to parse both autoneg_advertised and fc and set up	 * the appropriate PHY registers.  First we will parse for	 * autoneg_advertised software override.  Since we can advertise	 * a plethora of combinations, we need to check each bit	 * individually.	 */	/*	 * First we clear all the 10/100 mb speed bits in the Auto-Neg	 * Advertisement Register (Address 4) and the 1000 mb speed bits in	 * the  1000Base-T Control Register (Address 9).	 */	mii_autoneg_adv_reg &= ~(NWAY_AR_100TX_FD_CAPS |				 NWAY_AR_100TX_HD_CAPS |				 NWAY_AR_10T_FD_CAPS   |				 NWAY_AR_10T_HD_CAPS);	mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS);	hw_dbg(hw, "autoneg_advertised %x\n", phy->autoneg_advertised);	/* Do we want to advertise 10 Mb Half Duplex? */	if (phy->autoneg_advertised & ADVERTISE_10_HALF) {		hw_dbg(hw, "Advertise 10mb Half duplex\n");		mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS;	}	/* Do we want to advertise 10 Mb Full Duplex? */	if (phy->autoneg_advertised & ADVERTISE_10_FULL) {		hw_dbg(hw, "Advertise 10mb Full duplex\n");		mii_autoneg_adv_reg |= NWAY_AR_10T_FD_CAPS;	}	/* Do we want to advertise 100 Mb Half Duplex? */	if (phy->autoneg_advertised & ADVERTISE_100_HALF) {		hw_dbg(hw, "Advertise 100mb Half duplex\n");		mii_autoneg_adv_reg |= NWAY_AR_100TX_HD_CAPS;	}	/* Do we want to advertise 100 Mb Full Duplex? */	if (phy->autoneg_advertised & ADVERTISE_100_FULL) {		hw_dbg(hw, "Advertise 100mb Full duplex\n");		mii_autoneg_adv_reg |= NWAY_AR_100TX_FD_CAPS;	}	/* We do not allow the Phy to advertise 1000 Mb Half Duplex */	if (phy->autoneg_advertised & ADVERTISE_1000_HALF)		hw_dbg(hw, "Advertise 1000mb Half duplex request denied!\n");	/* Do we want to advertise 1000 Mb Full Duplex? */	if (phy->autoneg_advertised & ADVERTISE_1000_FULL) {		hw_dbg(hw, "Advertise 1000mb Full duplex\n");		mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS;	}	/*	 * Check for a software override of the flow control settings, and	 * setup the PHY advertisement registers accordingly.  If	 * auto-negotiation is enabled, then software will have to set the	 * "PAUSE" bits to the correct value in the Auto-Negotiation	 * Advertisement Register (PHY_AUTONEG_ADV) and re-start auto-	 * negotiation.	 *	 * The possible values of the "fc" parameter are:	 *      0:  Flow control is completely disabled	 *      1:  Rx flow control is enabled (we can receive pause frames	 *	  but not send pause frames).	 *      2:  Tx flow control is enabled (we can send pause frames	 *	  but we do not support receiving pause frames).	 *      3:  Both Rx and Tx flow control (symmetric) are enabled.	 *  other:  No software override.  The flow control configuration	 *	  in the EEPROM is used.	 */	switch (hw->fc.type) {	case e1000_fc_none:		/*		 * Flow control (Rx & Tx) is completely disabled by a		 * software over-ride.		 */		mii_autoneg_adv_reg &= ~(NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);		break;	case e1000_fc_rx_pause:		/*		 * Rx Flow control is enabled, and Tx Flow control is		 * disabled, by a software over-ride.		 *		 * Since there really isn't a way to advertise that we are		 * capable of Rx Pause ONLY, we will advertise that we		 * support both symmetric and asymmetric Rx PAUSE.  Later		 * (in e1000e_config_fc_after_link_up) we will disable the		 * hw's ability to send PAUSE frames.		 */		mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);		break;	case e1000_fc_tx_pause:		/*		 * Tx Flow control is enabled, and Rx Flow control is		 * disabled, by a software over-ride.		 */		mii_autoneg_adv_reg |= NWAY_AR_ASM_DIR;		mii_autoneg_adv_reg &= ~NWAY_AR_PAUSE;		break;	case e1000_fc_full:		/*		 * Flow control (both Rx and Tx) is enabled by a software		 * over-ride.		 */		mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);		break;	default:		hw_dbg(hw, "Flow control param set incorrectly\n");		ret_val = -E1000_ERR_CONFIG;		return ret_val;	}	ret_val = e1e_wphy(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);	if (ret_val)		return ret_val;	hw_dbg(hw, "Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);	if (phy->autoneg_mask & ADVERTISE_1000_FULL) {		ret_val = e1e_wphy(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg);	}	return ret_val;}/** *  e1000_copper_link_autoneg - Setup/Enable autoneg for copper link *  @hw: pointer to the HW structure * *  Performs initial bounds checking on autoneg advertisement parameter, then *  configure to advertise the full capability.  Setup the PHY to autoneg *  and restart the negotiation process between the link partner.  If *  autoneg_wait_to_complete, then wait for autoneg to complete before exiting. **/static s32 e1000_copper_link_autoneg(struct e1000_hw *hw){	struct e1000_phy_info *phy = &hw->phy;	s32 ret_val;	u16 phy_ctrl;	/*	 * Perform some bounds checking on the autoneg advertisement	 * parameter.	 */	phy->autoneg_advertised &= phy->autoneg_mask;	/*	 * If autoneg_advertised is zero, we assume it was not defaulted	 * by the calling code so we set to advertise full capability.	 */	if (phy->autoneg_advertised == 0)		phy->autoneg_advertised = phy->autoneg_mask;	hw_dbg(hw, "Reconfiguring auto-neg advertisement params\n");	ret_val = e1000_phy_setup_autoneg(hw);	if (ret_val) {		hw_dbg(hw, "Error Setting up Auto-Negotiation\n");		return ret_val;	}	hw_dbg(hw, "Restarting Auto-Neg\n");	/*	 * Restart auto-negotiation by setting the Auto Neg Enable bit and	 * the Auto Neg Restart bit in the PHY control register.	 */	ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_ctrl);	if (ret_val)		return ret_val;	phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG);	ret_val = e1e_wphy(hw, PHY_CONTROL, phy_ctrl);	if (ret_val)		return ret_val;	/*	 * Does the user want to wait for Auto-Neg to complete here, or	 * check at a later time (for example, callback routine).	 */	if (phy->autoneg_wait_to_complete) {		ret_val = e1000_wait_autoneg(hw);		if (ret_val) {			hw_dbg(hw, "Error while waiting for "				 "autoneg to complete\n");			return ret_val;		}	}	hw->mac.get_link_status = 1;	return ret_val;}/** *  e1000e_setup_copper_link - Configure copper link settings *  @hw: pointer to the HW structure * *  Calls the appropriate function to configure the link for auto-neg or forced *  speed and duplex.  Then we check for link, once link is established calls *  to configure collision distance and flow control are called.  If link is *  not established, we return -E1000_ERR_PHY (-2). **/s32 e1000e_setup_copper_link(struct e1000_hw *hw){	s32 ret_val;	bool link;	if (hw->mac.autoneg) {		/*		 * Setup autoneg and flow control advertisement and perform		 * autonegotiation.		 */		ret_val = e1000_copper_link_autoneg(hw);		if (ret_val)			return ret_val;	} else {		/*		 * PHY will be set to 10H, 10F, 100H or 100F		 * depending on user settings.		 */		hw_dbg(hw, "Forcing Speed and Duplex\n");		ret_val = e1000_phy_force_speed_duplex(hw);		if (ret_val) {			hw_dbg(hw, "Error Forcing Speed and Duplex\n");			return ret_val;		}	}	/*	 * Check link status. Wait up to 100 microseconds for link to become	 * valid.	 */	ret_val = e1000e_phy_has_link_generic(hw,					     COPPER_LINK_UP_LIMIT,					     10,					     &link);	if (ret_val)		return ret_val;	if (link) {		hw_dbg(hw, "Valid link established!!!\n");		e1000e_config_collision_dist(hw);		ret_val = e1000e_config_fc_after_link_up(hw);	} else {		hw_dbg(hw, "Unable to establish link!!!\n");	}	return ret_val;}/** *  e1000e_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY *  @hw: pointer to the HW structure * *  Calls the PHY setup function to force speed and duplex.  Clears the *  auto-crossover to force MDI manually.  Waits for link and returns *  successful if link up is successful, else -E1000_ERR_PHY (-2). **/s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw){	struct e1000_phy_info *phy = &hw->phy;	s32 ret_val;	u16 phy_data;	bool link;	ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data);	if (ret_val)		return ret_val;	e1000e_phy_force_speed_duplex_setup(hw, &phy_data);	ret_val = e1e_wphy(hw, PHY_CONTROL, phy_data);	if (ret_val)		return ret_val;	/*	 * Clear Auto-Crossover to force MDI manually.  IGP requires MDI	 * forced whenever speed and duplex are forced.	 */	ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);	if (ret_val)		return ret_val;	phy_data &= ~IGP01E1000_PSCR_AUTO_MDIX;	phy_data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;	ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);	if (ret_val)		return ret_val;	hw_dbg(hw, "IGP PSCR: %X\n", phy_data);	udelay(1);	if (phy->autoneg_wait_to_complete) {		hw_dbg(hw, "Waiting for forced speed/duplex link on IGP phy.\n");		ret_val = e1000e_phy_has_link_generic(hw,						     PHY_FORCE_LIMIT,						     100000,						     &link);		if (ret_val)			return ret_val;		if (!link)			hw_dbg(hw, "Link taking longer than expected.\n");		/* Try once more */		ret_val = e1000e_phy_has_link_generic(hw,						     PHY_FORCE_LIMIT,						     100000,						     &link);		if (ret_val)			return ret_val;	}	return ret_val;}/** *  e1000e_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY *  @hw: pointer to the HW structure * *  Calls the PHY setup function to force speed and duplex.  Clears the *  auto-crossover to force MDI manually.  Resets the PHY to commit the *  changes.  If time expires while waiting for link up, we reset the DSP. *  After reset, TX_CLK and CRS on Tx must be set.  Return successful upon *  successful completion, else return corresponding error code. **/s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw){	struct e1000_phy_info *phy = &hw->phy;	s32 ret_val;	u16 phy_data;	bool link;	/*	 * Clear Auto-Crossover to force MDI manually.  M88E1000 requires MDI	 * forced whenever speed and duplex are forced.	 */	ret_val = e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);	if (ret_val)		return ret_val;	phy_data &= ~M88E1000_PSCR_AUTO_X_MODE;	ret_val = e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, phy_data);	if (ret_val)		return ret_val;	hw_dbg(hw, "M88E1000 PSCR: %X\n", phy_data);	ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data);	if (ret_val)		return ret_val;	e1000e_phy_force_speed_duplex_setup(hw, &phy_data);	/* Reset the phy to commit changes. */	phy_data |= MII_CR_RESET;	ret_val = e1e_wphy(hw, PHY_CONTROL, phy_data);	if (ret_val)		return ret_val;	udelay(1);	if (phy->autoneg_wait_to_complete) {		hw_dbg(hw, "Waiting for forced speed/duplex link on M88 phy.\n");		ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,						     100000, &link);		if (ret_val)			return ret_val;		if (!link) {			/*			 * We didn't get link.			 * Reset the DSP and cross our fingers.			 */			ret_val = e1e_wphy(hw, M88E1000_PHY_PAGE_SELECT,					   0x001d);			if (ret_val)				return ret_val;			ret_val = e1000e_phy_reset_dsp(hw);			if (ret_val)				return ret_val;		}		/* Try once more */

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