excarchlib.c

VxWorks BSP框架源代码包含头文件和驱动

    {_EXC_OFF_IPE,	excConnect,	  excExcHandle, 0}, /* instr prot */
    {_EXC_OFF_DPE,	excConnect,	  excExcHandle, 0}, /* data prot */
# endif	(CPU == PPC555)
    {_EXC_OFF_DATA_BKPT,excConnect,	  excExcHandle, 0}, /* data breakpt */
    {_EXC_OFF_INST_BKPT,excConnect,	  excExcHandle, 0}, /* instr breakpt */
    {_EXC_OFF_PERI_BKPT,excConnect,	  excExcHandle, 0}, /* peripheral BP */
    {_EXC_OFF_NM_DEV_PORT, excConnect,	  excExcHandle, 0}, /* non maskable */

#elif	(CPU == PPC601)
    {_EXC_OFF_RESET,	excConnect,	  excExcHandle, 0}, /* system reset */
    {_EXC_OFF_MACH,	excConnect,	  excExcHandle, 0}, /* machine chk */
    {_EXC_OFF_DATA,	excConnect,	  excExcHandle, 0}, /* data access */
    {_EXC_OFF_INST,	excConnect,	  excExcHandle, 0}, /* instr access */
    {_EXC_OFF_INTR,	excIntConnect,    excIntHandle, 0}, /* ext int */
    {_EXC_OFF_ALIGN,	excConnect,	  excExcHandle, 0}, /* alignment */
    {_EXC_OFF_PROG,	excConnect,	  excExcHandle, 0}, /* program */
    {_EXC_OFF_FPU,	excConnect,	  excExcHandle, 0}, /* fp unavail */
    {_EXC_OFF_DECR,	excIntConnect,    excIntHandle, 0}, /* decrementer */
    {_EXC_OFF_IOERR,	excConnect,	  excExcHandle, 0}, /* i/o ctrl err */
    {_EXC_OFF_SYSCALL,	excConnect,	  excExcHandle, 0}, /* system call */
    {_EXC_OFF_RUN_TRACE,excConnect,	  excExcHandle, 0}, /* run/trace */

#elif	((CPU == PPC603) || (CPU == PPCEC603) || (CPU == PPC604))
    {_EXC_OFF_RESET,	excConnect,	  excExcHandle, 0}, /* system reset */
    {_EXC_OFF_MACH,	excConnect,	  excExcHandle, 0}, /* machine chk */
    {_EXC_OFF_DATA,	excConnect,	  excExcHandle, 0}, /* data access */
    {_EXC_OFF_INST,	excConnect,	  excExcHandle, 0}, /* instr access */
    {_EXC_OFF_INTR,	excIntConnect,    excIntHandle, 0}, /* ext int */
    {_EXC_OFF_ALIGN,	excConnect,	  excExcHandle, 0}, /* alignment */
    {_EXC_OFF_PROG,	excConnect,	  excExcHandle, 0}, /* program */
    {_EXC_OFF_FPU,	excConnect,	  excExcHandle, 0}, /* fp unavail */
    {_EXC_OFF_DECR,	excIntConnect,    excIntHandle, 0}, /* decrementer */
    {_EXC_OFF_SYSCALL,	excConnect,	  excExcHandle, 0}, /* system call */
    {_EXC_OFF_TRACE,	excConnect,	  excExcHandle, 0}, /* trace excepti */
# if	((CPU == PPC603) || (CPU == PPCEC603))
    {_EXC_OFF_INST_MISS,excConnect,	  excExcHandle, 0}, /* i-trsl miss */
    {_EXC_OFF_LOAD_MISS,excConnect,       excExcHandle, 0}, /* d-trsl miss */
    {_EXC_OFF_STORE_MISS,  excConnect,	  excExcHandle, 0}, /* d-trsl miss */
# else	/* (CPU == PPC604) */
#ifdef _EXC_NEW_OFF_PERF  /* perf mon */
    {_EXC_OFF_PERF,	excRelocConnect,  excExcHandle, _EXC_NEW_OFF_PERF},
#else
    {_EXC_OFF_PERF,	excConnect,	  excExcHandle, 0}, /* perf mon */
#endif  /* _EXC_NEW_OFF_PERF */
#  ifdef _WRS_ALTIVEC_SUPPORT
    {_EXC_ALTIVEC_UNAVAILABLE, excConnect,excExcHandle, 0}, /* altivec unav */
    {_EXC_ALTIVEC_ASSIST,  excConnect,   excExcHandle, 0},  /* altivec asst */
#  endif /* _WRS_ALTIVEC_SUPPORT */
    {_EXC_OFF_THERMAL, 	excConnect,	  excExcHandle, 0}, /* thermal */
# endif	/* (CPU == PPC604) */
    {_EXC_OFF_INST_BRK,	excConnect,	  excExcHandle, 0}, /* instr BP */
    {_EXC_OFF_SYS_MNG,	excConnect,	  excExcHandle, 0}, /* sys mgt*/

#elif	(CPU == PPC860)
    {_EXC_OFF_RESET,	excConnect,	  excExcHandle, 0}, /* system reset */
    {_EXC_OFF_MACH,	excConnect,	  excExcHandle, 0}, /* machine chk */
    {_EXC_OFF_DATA,	excConnect,	  excExcHandle, 0}, /* data access */
    {_EXC_OFF_INST,	excConnect,	  excExcHandle, 0}, /* instr access */
    {_EXC_OFF_INTR,	excIntConnect,    excIntHandle, 0}, /* ext int */
    {_EXC_OFF_ALIGN,	excConnect,	  excExcHandle, 0}, /* alignment */
    {_EXC_OFF_PROG,	excConnect,	  excExcHandle, 0}, /* program */
    {_EXC_OFF_FPU,	excConnect,	  excExcHandle, 0}, /* fp unavail */
    {_EXC_OFF_DECR,	excIntConnect,    excIntHandle, 0}, /* decrementer */
    {_EXC_OFF_SYSCALL,	excConnect,	  excExcHandle, 0}, /* system call */
    {_EXC_OFF_TRACE,	excConnect,	  excExcHandle, 0}, /* trace except */
    {_EXC_OFF_SW_EMUL,	excConnect,	  excExcHandle, 0}, /* sw emul */
    {_EXC_OFF_INST_MISS,excConnect,	  excExcHandle, 0}, /* inst TLB Miss */
    {_EXC_OFF_DATA_MISS,excConnect,	  excExcHandle, 0}, /* data TLB Miss */
    {_EXC_OFF_INST_ERROR,  excConnect,	  excExcHandle, 0}, /* inst TLB err */
    {_EXC_OFF_DATA_ERROR,  excConnect,	  excExcHandle, 0}, /* data TLB err */
    {_EXC_OFF_DATA_BKPT,excConnect,	  excExcHandle, 0}, /* data BP */
    {_EXC_OFF_INST_BKPT,excConnect,	  excExcHandle, 0}, /* instr BP */
    {_EXC_OFF_PERI_BKPT,excConnect,	  excExcHandle, 0}, /* peripheral BP */
    {_EXC_OFF_NM_DEV_PORT,  excConnect,	  excExcHandle, 0}, /* non maskable */

#endif	/* 40x : 440 : 5xx : 601 : 603 | 604 : 860 */

    {0,  (STATUS (*)()) NULL,  (void (*) ()) NULL,  0},      /* end of table */
    };

/*
 * XXX - The special handling of critical events during normal ones seems
 *       bogus:  if the critical handler does proper state-save/restore
 *       it should be able to safely interrupt the normal handler.
 *
 * It is necessary to clear the MSR[CE] bit upon an external interrupt
 * on the PowerPC 403 architecture, to prevent this interrupt being
 * interrupted by a critical interrupt before the context is saved.
 * There's still a window of 5 instructions were the external interrupt 
 * can be interrupted. This is taken care of, in the critical interrupt
 * entry code (intCrtEnt), by saving SPRG3 before using it and restoring
 * its original value later on.
 *
 * In excConnectCode,
 *   xxxEnt is either intEnt or excEnt.
 *   xxxHandler is either excIntHandle or excExcHandle.
 *   xxxExit is either intExit or excExit.
 *
 * Changes here may affect code in excALib.s:excEnt(), e.g. the offsets
 * used in calculating the original vector address from the LR value.
 */

LOCAL INSTR excConnectCode[]=
    {
    /*  data	      word    byte     opcode  operands		      */
    0x7c7343a6,	    /*  0     0x00     mtspr   SPRG3, p0	      */
#ifdef	_EXC_OFF_CRTL
    0x7c6000a6,	    /*  1     0x04     mfmsr   p0		      */
    0x546303da,	    /*  2     0x08     rlwinm  p0,p0,0,15,13  clear MSR [CE] */
    0x7c600124,	    /*  3     0x0c     mtmsr   p0		      */
    0x4c00012c,	    /*  4     0x10     isync			      */
#endif	/* _EXC_OFF_CRTL */
    /* If _EXC_OFF_CRTL, then add 4 words/0x10 bytes to following offsets */
    0x7c6802a6,	    /*  1     0x04     mflr    p0		      */
    0x48000001,	    /*  2(6)  0x08/18  bl      xxxEnt		      */
    0x38610000,	    /*  3     0x0c     addi    r3, sp, 0	      */
    0x9421fff0,	    /*  4     0x10     stwu    sp, -FRAMEBASESZ(sp)   */ 
    0x48000001,	    /*  5(9)  0x14/24  bl      xxxHandler	      */
    0x38210010,	    /*  6     0x18     addi    sp, sp, FRAMEBASESZ    */
    0x48000001	    /*  7(11) 0x1c/2c  bl      xxxExit		      */
    };

/* 
 * Stub code for extended-branch vectors. This stub will be installed into
 * the trap table if excExtendedVectors is TRUE. Branches to the xxxEnt,
 * xxxExit and xxxHandler functions are made via an absolute 32-bit address
 * stored in the LR.
 */

LOCAL INSTR excExtConnectCode[]=
    {
    /*  data	      word    byte     opcode  operands		      */
    0x7c7343a6,	    /*  0     0x00     mtspr	  SPRG3, p0	      */
#ifdef	_EXC_OFF_CRTL
    0x7c6000a6,	    /*  1     0x04     mfmsr   p0 		      */
    0x546303da,	    /*  2     0x08     rlwinm  p0,p0,0,15,13  clear MSR [CE] */
    0x7c600124,	    /*  3     0x0c     mtmsr   p0 		      */
    0x4c00012c,	    /*  4     0x19     isync    		      */
#endif	/* _EXC_OFF_CRTL */
    /* If _EXC_OFF_CRTL, then add 4 words/0x10 bytes to following offsets */
    0x7c6802a6,	    /*  1     0x04     mflr    p0                     */
    0x7c7043a6,	    /*  2     0x08     mtspr   SPRG0, p0              */
    0x3c600000,	    /*  3(7)  0x0c     lis     p0, HI(xxxEnt)         */
    0x60630000,	    /*  4(8)  0x10     ori     p0, p0, LO(xxxEnt)     */
    0x7c6803a6,	    /*  5     0x14     mtlr    p0                     */
    0x7c7042a6,	    /*  6     0x18     mfspr   p0, SPRG0              */
    0x4e800021,	    /*  7     0x1c     blrl                           */
    0x3c600000,	    /*  8(12) 0x20     lis     p0, HI(xxxHandler)     */
    0x60630000,	    /*  9(13) 0x24     ori     p0, p0, LO(xxxHandler) */
    0x7c6803a6,	    /* 10     0x28     mtlr    p0                     */
    0x38610000,	    /* 11     0x2c     addi    p0, sp, 0              */
    0x9421fff0,     /* 12     0x30     stwu    sp, -FRAMEBASESZ(sp)   */ 
    0x4e800021,	    /* 13     0x34     blrl                           */
    0x38210010,	    /* 14     0x38     addi    sp, sp, FRAMEBASESZ    */
    0x3c600000,	    /* 15(19) 0x3c     lis     p0, HI(xxxExit)        */
    0x60630000,	    /* 16(20) 0x40     ori     p0, p0, LO(xxxExit)    */
    0x7c6803a6,	    /* 17     0x44     mtlr    p0                     */
    0x4e800021	    /* 18     0x48     blrl                           */
    };

#ifdef	_EXC_OFF_CRTL
/*
 * In excCrtConnectCode,
 *   xxxCrtEnt is either intCrtEnt or excCrtEnt.
 *   xxxHandler is either excIntHandle or excExcHandle.
 *   xxxCrtExit is either intCrtExit or excCrtExit.
 *
 * Changes here may affect code in excALib.s:excCrtEnt(), e.g. the offset
 * used in calculating the original vector address from the LR value.
 *
 * In order to determine which type of vector is being accessed, code
 * in excVecGet() and excVecSet() depends on excCrtConnectCode[0] and
 * excConnectCode[0] being different.
 */

LOCAL INSTR excCrtConnectCode[]=
    {
    /*  data	      word  byte  opcode  operands		     */
    0x7c7243a6,	    /*  0   0x00  mtspr   SPRG2, p0 # SPRG4 for mchk */
    0x7c6802a6,	    /*  1   0x04  mflr    p0			     */
    0x48000003,	    /*  2   0x08  bla     xxxCrtEnt		     */
    0x38610000,	    /*  3   0x0c  addi    r3, sp, 0		     */
    0x9421fff0,	    /*  4   0x10  stwu    sp, -FRAMEBASESZ(sp)	     */ 
    0x48000003,	    /*  5   0x14  bla     xxxHandler		     */
    0x38210010,	    /*  6   0x18  addi    sp, sp, FRAMEBASESZ	     */
    0x48000003	    /*  7   0x1c  bla     xxxCrtExit		     */
    };

LOCAL INSTR excExtCrtConnectCode[]=
    {
    /*  data	      word  byte  opcode  operands		     */
    0x7c7243a6,	    /*  0   0x00  mtspr   SPRG2, p0 # SPRG4 for mchk */
    0x7c6802a6,	    /*  1   0x00  mflr    p0                         */
    0x7c7043a6,	    /*  2   0x00  mtspr	  SPRG0, p0                  */
    0x3c600000,	    /*  3   0x00  lis	  p0, HI(xxxEnt)             */
    0x60630000,	    /*  4   0x00  ori	  p0, p0, LO(xxxEnt)         */
    0x7c6803a6,	    /*  5   0x00  mtlr	  p0                         */
    0x7c7042a6,	    /*  6   0x00  mfspr	  p0, SPRG0                  */
    0x4e800021,	    /*  7   0x00  blrl                               */
    0x3c600000,	    /*  8   0x00  lis	  p0, HI(xxxHandler)         */
    0x60630000,	    /*  9   0x00  ori	  p0, p0, LO(xxxHandler)     */
    0x7c6803a6,	    /*  10  0x00  mtlr	  p0                         */
    0x38610000,	    /*  11  0x00  addi	  p0, sp, 0                  */
    0x9421fff0,     /*  12  0x00  stwu    sp, -FRAMEBASESZ(sp)       */ 
    0x4e800021,	    /*  13  0x00  blrl                               */
    0x38210010,	    /*  14  0x00  addi	  sp, sp, FRAMEBASESZ        */
    0x3c600000,	    /*  15  0x00  lis	  p0, HI(xxxExit)            */
    0x60630000,	    /*  16  0x00  ori	  p0, p0, LO(xxxExit)        */
    0x7c6803a6,	    /*  17  0x00  mtlr	  p0                         */
    0x4e800021	    /*  18  0x00  blrl                               */
    };

/* Word offsets to the branch instructions in
 * the excConnectCode and excCrtConnectCode arrays
 *
 * Changes affecting ENT_OFF or ENT_CRT_OFF will require corresponding
 * changes in excALib.s:excEnt() and excCrtEnt() when calculating the
 * original vector address from the LR value.
 */

#   define	ENT_OFF		 6	/* offset for intEnt/excEnt */
#   define	ISR_OFF		 9	/* offset for ISR or exc. handler */
#   define	EXIT_OFF	 11	/* offset for intExit/excExit */
#   define	EXT_ENT_OFF	 7	/* offset for ext intEnt/excEnt */
#   define	EXT_ISR_OFF	 12	/* offset for ext ISR or exc handler */
#   define	EXT_EXIT_OFF	 19	/* offset for ext intExit/excExit */
#   define	EXT_ENT_CRT_OFF	 3	/* offset for ext intEnt/excEnt */
#   define	EXT_ISR_CRT_OFF	 8	/* offset for ext ISR or exc handler */
#   define	EXT_EXIT_CRT_OFF 15	/* offset for ext intExit/excExit */
#   define	ENT_CRT_OFF	 2	/* offset for intEnt/excEnt */
#   define	ISR_CRT_OFF	 5	/* offset for ISR or exc. handler */
#   define	EXIT_CRT_OFF	 7	/* offset for intCrtExit/excCrtExit */
#else	/* _EXC_OFF_CRTL */
#   define	ENT_OFF		 2	/* offset for intEnt/excEnt */
#   define	ISR_OFF		 5	/* offset for ISR or exc. handler */
#   define	EXIT_OFF	 7	/* offset for intExit/excExit */
#   define	EXT_ENT_OFF	 3	/* offset for ext intEnt/excEnt */
#   define	EXT_ISR_OFF	 8	/* offset for ext ISR or exc handler */
#   define	EXT_EXIT_OFF	 15	/* offset for ext intExit/excExit */
#endif	/* _EXC_OFF_CRTL */

/*******************************************************************************
*
* excVecInit - initialize the exception vectors
*
* This routine sets up PowerPC exception vectors to point to the 
* appropriate default exception handlers.
*
* WHEN TO CALL
* This routine is usually called from the system start-up routine
* usrInit() in usrConfig.c, before interrupts are enabled.
*
* RETURNS: OK (always).
*
* SEE ALSO: excLib
*
* INTERNAL:  excCnctRtn is one of excConnect, excIntConnect,
*            excCrtConnect, excIntCrtConnect, or the reloc versions of
*            them as excReloc*Connect
*/

STATUS excVecInit (void)
    {
    FAST int ix;

    /* 
     * Set the values of entOffset, exitOffset and isrOffset once. These are
     * offsets into the exception stubs where the respective ent, exit and ISR
     * function addresses are located. 
     * These offsets are set once during the lifetime of the system, so they
     * cannot (and are not meant to) handle runtime changes in the value of
     * the global excExtendedVectors.
     */
    if (excExtendedVectors == TRUE)
	{
	entOffset     = EXT_ENT_OFF;
	isrOffset     = EXT_ISR_OFF;
	exitOffset    = EXT_EXIT_OFF;
#ifdef _EXC_OFF_CRTL
	entCrtOffset  = EXT_ENT_CRT_OFF;
	isrCrtOffset  = EXT_ISR_CRT_OFF;
	exitCrtOffset = EXT_EXIT_CRT_OFF;
#endif  /* _EXC_OFF_CRTL */
	}
    else
        {
	entOffset     = ENT_OFF;
	isrOffset     = ISR_OFF;
	exitOffset    = EXIT_OFF;
#ifdef _EXC_OFF_CRTL
	entCrtOffset  = ENT_CRT_OFF;
	isrCrtOffset  = ISR_CRT_OFF;
	exitCrtOffset = EXIT_CRT_OFF;
#endif  /* _EXC_OFF_CRTL */
        }


    for (ix = 0; excBlTbl[ix].excHandler != (void (*)()) NULL; ix++)
	{
        /* harmless extra 3rd argument to non-Reloc exc*Connect */
	excBlTbl[ix].excCnctRtn ((VOIDFUNCPTR *) excBlTbl[ix].vecOff, 
				 (VOIDFUNCPTR ) excBlTbl[ix].excHandler,
                                 (VOIDFUNCPTR *) excBlTbl[ix].vecOffReloc);
	}
#if	(defined(IVPR) || defined(EVPR))
    excVecBaseSet((FUNCPTR *)NULL);	/* may want *excVecBase in future */
#endif	/* defined(IVPR) || defined(EVPR) */
#ifdef	IVOR0
    excIvorInit();
#endif	/* IVOR0 */

    /* Now that the vectors are set up, enable Machine Check exceptions */
    vxMsrSet (vxMsrGet() | _PPC_MSR_ME);

    return (OK);
    }

/*******************************************************************************
*
* blCompute - compute branch-and-link instruction to reach a specified address
*
* This routine attempts to find a single branch-and-link (i.e BL or BLA) 
* instruction, located at address branch, that can reach address target.
*
* RETURNS: The actual branch-and-link instruction opcode, 
*          or zero if the target address is too far away for a BL/BLA instr.
*
* INTERNAL:  Used by the exc*Connect routines.
*/