fpsp060alib.s

VxWorks BSP框架源代码包含头文件和驱动

/* fpsp060ALib.s - MC68060 floating point support package assembly library */

/* Copyright 1984-1996 Wind River Systems, Inc. */
	.data
	.globl	_copyright_wind_river
	.long	_copyright_wind_river

/*
modification history
--------------------
01e,28feb97,tam jump to excStub() if FP exception enabled (ovfl & unfl only)
01d,09jul96,p_m replaced addql by addl where needed.
01c,01apr96,kdl replaced Motorola binary code with new version.
01b,21sep95,ms  moved data to data segement to fix SPR 4987
01a,28jun94,tpr clean up following code review.
		written, handler source code from Motorola FPSP 060sp_B1.
*/

/*
DESCRIPTION
This file provides the floating point execption handlers and the interface
functions between the host operating system (VxWorks) and the floating point
exception handlers.

These floating point exception handlers emulate unimplemented FP instructions
using unimplemented data types and instructions using unimplemented
addressing mode. In addition, the FP exception handlers provide full IEEE-754
compliant exception handling.

Nine exception handlers are available to handle the following exceptions:

	- vector 11: FP unimplemented instruction
	- vector 49: FP inexact result
	- vector 50: FP divide by zero
	- vector 51: FP underflow
	- vector 52: FP operand error
	- vector 53: FP overflow
	- vector 54: FP signalling not a number (SNAN)
	- vector 55: FP unimplemented data type
	- vector 60: unimplemented effective address

These floating point exception handlers are connected to the exceptions
by mathHardInit(). This function is called from usrConfig.c if INCLUDE_HW_FP
is defined.

The FP exception handlers code comes from the Motorola software package
provided with the MC68060 cpu (fpsp.sa file). This source code is essentially
an hexadecimal image because this is the only format supported by Motorola.
This format allows code use wihout converting code from Motorola to GNU sytle
and recompiling. Furthermore futur update are easied by substituting the current
hex image by the new hexa image (see below: How to update Motorola code ).
The hex image is placed between the _FPSP_060_START symbole and the end of
this file.

To integrate the Motorola hex image to a host operating system (VxWorks) some
code must be added to allow the exception handlers to run properly. Two kinds
of functions must be provided. The first kind of function allows read/write to
the instruction/data area in/to the supervior and user mode. These functions
are provided by the os060ALib.s file (see os060Alib.s file header for more
information about this function). 
The second function group is provided below and only used by the FP exception
handlers. Some functions are called when the handlers exit to allow the host
OS to perform its own code. VxWorks exits directly the exceptions wihout adding
code. Others functions are called when the exception handlers cannot handle
the exception. Thus the exception traitement is reported to the host OS. In
that case the appropriate VxWorks exception handler is called.
 
The way specified by Motorola to link the host OS dependant functions with the
hexa code is to place a "call out" table just before the hex code. This table
is exactly 128 bytes in size for 32 entries, each 4 bytes in size. Each entry
contains the address of the OS dependant function RELATIVE to the starting
address. The OS dependant function order is given by Motorola. This order
must never be changed. Also the "call out" table must never be separated from
the hex code.

The floating point handler call out table is filled with the following
relative function addresses:
	_060_real_bsun		_060_real_snan		_060_real_operr
	_060_real_ovfl		_060_real_unfl		_060_real_dz
	_060_real_inex		_060_real_fline		_060_real_fpu_disabled
	_060_real_trap		_060_real_trace 	_060_real_access
	_060_fpsp_done		_060_imem_read		_060_dmem_read
	_060_dmem_write		_060_imem_read_word	_060_imem_read_long
	_060_dmem_read_byte	_060_dmem_read_word	_060_dmem_read_long
	_060_dmem_write_byte	_060_dmem_write_word	_060_dmem_write_long
	
This call out table is initialized by the fpsp060COTblInit() function
called by mathHardInit(). 

How to update Motorola code:

    1) remove all '.long' lignes between _FPSP_060_START symbol and this
       file ending.

    2) insert after the _FPSP_060_START symbol the new Motorola hexa code.

    3) replace all dc.l by .long

    4) replace all $ by 0x

    5) save and recompile


SEE ALSO: MC68060, MC68LC60, MC68EC60 MICROPROCESSORS USER'S MANUAL appendix C.

*/

	/* internals */

	.global		__060_fpsp_done
	.global		__060_real_ovfl
	.global		__060_real_unfl
	.global		__060_real_operr
	.global		__060_real_snan
	.global		__060_real_dz
	.global		__060_real_inex
	.global		__060_real_bsun
	.global		__060_real_fline
	.global		__060_real_fpu_disabled
	.global		__060_real_trap
	.global		_FPSP_060_CO_TBL

	/* externals */


	.text
	.even

/*******************************************************************************
*
* _060_fpsp_done - main exit point from the 68060 Floating-Point. 
*
* This is the main exit point for the 68060 Floating-Point
* Software Package. For a normal exit, all 060FPSP routines call this
* routine.
* 
* No special code must be added so we exit the exception handler directly . 
* 
*/
__060_fpsp_done:
	rte

/*******************************************************************************
*
* _060_real_ovfl - exit point from an FP overflow exception.
*
* This is the exit point for the 060FPSP when an enabled overflow exception
* is present. The routine below should point to the operating system handler 
* for enabled overflow conditions. The exception stack frame is an overflow
* stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
*
* The exception status bit is cleared before exiting the exception handler.
*
*/
__060_real_ovfl:
	fsave		-(sp)
	movew		#0x6000,0x2(sp)
	frestore	(sp)+

	movel		d0,sp@-			/* push d0 */
	fmovel  	fpcr, d0
	andw		#0x1000, d0		/* test ovfl enable bit */
	bne		__060_fpsp_osExcHandler
	movel		sp@+, d0		/* pop d0 */
	rte

/*******************************************************************************
*
* _060_real_unfl - exit point from an FP underflow exception.
*
* This is the exit point for the 060FPSP when an enabled underflow exception
* is present. The routine below should point to the operating system handler 
* for enabled underflow conditions. The exception stack frame is an underflow
* stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
*
* The exception status bit is cleared before exiting the exception handler.
*
*/
__060_real_unfl:
	fsave		-(sp)
	movew		#0x6000,0x2(sp)
	frestore	(sp)+

	movel		d0,sp@-			/* push d0 */
	fmovel  	fpcr, d0
	andw		#0x0800, d0		/* test unfl enable bit */
	bne		__060_fpsp_osExcHandler
	movel		sp@+, d0		/* pop d0 */
	rte

__060_fpsp_osExcHandler:
	movel		sp@+, d0		/* pop d0 */
	jmp		_excStub		/* jump to VxWorks exception */
						/* handler 		     */

/*******************************************************************************
*
* _060_real_operr - exit point from an operand error exception.
*
* This is the exit point for the 060FPSP when an enabled operand error exception
* is present. The routine below should point to the operating system handler 
* for enabled operand error exceptions. The exception stack frame is an operand
* error stack frame. The FP state frame holds the source operand of the faulting
* instruction.
*
* The exception status bit is cleared before exiting the exception handler.
*
*/
__060_real_operr:
	fsave		-(sp)
	movew		#0x6000,0x2(sp)
	frestore	(sp)+
	rte

/*******************************************************************************
*
* _060_real_snan - exit point from an FP SNAN exception.
*
* This is the exit point for the 060FPSP when an enabled signalling NaN
* exception is present. The routine below should point to the operating system
* handler for enabled signalling NaN exceptions. The exception stack frame is
* a signalling NaN stack frame. The FP state frame holds the source operand of
* the faulting instruction.
*
* The exception status bit is cleared before exiting the exception handler.
*
*/
__060_real_snan:
	fsave		-(sp)
	movew		#0x6000,0x2(sp)
	frestore	(sp)+
	rte

/*******************************************************************************
*
* _060_real_dz - exit point from an FP divide-by-zero exception.
*
* This is the exit point for the 060FPSP when an enabled divide-by-zero
* exception is present. The routine below should point to the operating system
* handler for enabled divide-by-zero exceptions. The exception stack frame is
* a divide-by-zero stack frame. The FP state frame holds the source operand of
* the faulting instruction.
*
* The exception status bit is cleared before exiting the exception handler.
*
*/
__060_real_dz:
	fsave		-(sp)
	movew		#0x6000,0x2(sp)
	frestore	(sp)+
	rte

/*******************************************************************************
*
* _060_real_inex - exit point from an FP inexact exception.
*
* This is the exit point for the 060FPSP when an enabled inexact exception
* is present. The routine below should point to the operating system handler 
* for enabled inexact exceptions. The exception stack frame is an inexact
* stack frame. The FP state frame holds the source operand of the faulting
* instruction.
*
* The exception status bit is cleared before exiting the exception handler.
*
*/
__060_real_inex:
	fsave		-(sp)
	movew		#0x6000,0x2(sp)
	frestore	(sp)+
	rte

/*******************************************************************************
*
* _060_real_bsun - exit point from an FP bsun exception.
*
* This is the exit point for the 060FPSP when an enabled bsun exception
* is present. The routine below should point to the operating system handler 
* for enabled bsun exceptions. The exception stack frame is a bsun
* stack frame.
*
* The routine below clears the exception status bit, clears the NaN
* bit in the FPSR, and does an "rte". The instruction that caused the