dsmlib.c

VxWorks BSP框架源代码包含头文件和驱动

* prepend the instruction.
*/

LOCAL void dsmPrint
    (
    USHORT binInst [],  /* Pointer to instructin */
    FAST INST *iPtr,            /* Pointer to INST returned by dsmFind */
    int address,                /* Address with which to prepend instructin */
    int nwords,                 /* Instruction length, in words */
    FUNCPTR prtAddress          /* Address printing function */
    )
    {
    FAST int ix;		/* index into binInst */
    FAST int wordsToPrint;	/* # of 5-char areas to reserve for printing
				   of hex version of instruction */
    wordsToPrint = (((nwords - 1) / 5) + 1) * 5;

    /* Print the address and the instruction, in hex */

    printf ("%06x  ", address);
    for (ix = 0; ix < wordsToPrint; ++ix)
	/* print lines in multiples of 5 words */
	{
	if ((ix > 0) && (ix % 5) == 0)		/* print words on next line */
	    printf ("\n        ");
	printf ((ix < nwords) ? "%04x " : "     ", binInst [ix]);
	}

    if (iPtr == NULL)
	{
	printf ("DC.W        0x%04x\n", binInst[0]);
	return;
	}

    /* Print the instruction mnemonic, the size code (.w, or whatever), and
       the arguments */

    printf ("%-6s", iPtr->name);
    prtSizeField (binInst, iPtr);
    printf ("    ");
    prtArgs (binInst, iPtr, address, prtAddress);
    }
/*******************************************************************************
*
* dsmNwords - return the length (in words) of an instruction
*/

LOCAL int dsmNwords
    (
    USHORT binInst [],
    FAST INST *iPtr
    )
    {
    int frstArg;	/* length of first argument */

    if (iPtr == NULL)
	return (1);			/* not an instruction */

    switch (iPtr->type)
	{
	case itLea:
	case itBcd:
	case itNbcd:
	case itDynBit:
	case itMemShift:
	case itMoveTSR:
	case itMoveFSR:
	case itMoveCCR:
	case itQuick:
	case itScc:
	case itMoveFCCR:
	case itDivW:
	case itCpSave:
	    return (1 + modeNwords ((binInst [0] & 0x0038) >> 3,
				    binInst [0] & 7, 1, &binInst [1]));

	case itMoves:
	case itStatBit:
	case itMovem:
	case itCallm:
	case itBfchg:
	case itBfext:
	case itBfins:
	case itCpGen:
	case itCpScc:
	    return (2 + modeNwords ((binInst [0] & 0x0038) >> 3,
				    binInst [0] & 7, 0, &binInst [2]));

	case itDivL:
	    return (2 + modeNwords ((binInst [0] & 0x0038) >> 3,
				    binInst [0] & 7, 2, &binInst [2]));

	case itAdda:
	    return (1 + modeNwords ((binInst [0] & 0x0038) >> 3,
				    binInst [0] & 7,
				    ((binInst [0] & 0x0100) == 0) ? 1 : 2,
				    &binInst [1]));
	case itMoveA:
	    return (1 + modeNwords ((binInst [0] & 0x0038) >> 3,
				    binInst [0] & 7,
				    ((binInst [0] & 0x1000) == 0) ? 2 : 1,
				    &binInst [1]));
	case itNegx:
	case itOr:
	    return (1 + modeNwords ((binInst [0] & 0x0038) >> 3,
				    binInst [0] & 7,
				    ((binInst [0] & 0x0080) == 0) ? 1 : 2,
				    &binInst [1]));
	case itChk:
	    return (1 + modeNwords ((binInst [0] & 0x0038) >> 3,
				    binInst [0] & 7,
				    ((binInst [0] & 0x0080) == 0) ? 2 : 1,
				    &binInst [1]));

	case itChk2:
	    return (2 + modeNwords ((binInst [0] & 0x0038) >> 3,
				    binInst [0] & 7,
				    ((binInst [0] & 0x0400) == 0) ? 1 : 2,
				    &binInst [2]));

	case itCas:
	    return (2 + modeNwords ((binInst [0] & 0x0038) >> 3,
				    binInst [0] & 7,
				    ((binInst [0] & 0x0600) == 3) ? 2 : 1,
				    &binInst [2]));

	case itComplete:
	case itMoveq:
	case itExg:
	case itSwap:
	case itTrap:
	case itX:
	case itMoveUSP:
	case itUnlk:
	case itCmpm:
	case itExt:
	case itBkpt:
	case itRtm:
	case itRegShift:
#if ((CPU==MC68040) || (CPU==MC68060) || (CPU==MC68LC040))
	case itCinv:
	case itCinva:
	case itCpush:
	case itCpusha:
#endif	/* ((CPU==MC68040) || (CPU==MC68060) || (CPU==MC68LC040)) */
	    return (1);

	case itMovep:
	case itStop:
	case itLink:
	case itDb:
	case itRTD:
	case itMovec:
	case itPack:
	case itImmCCR:
	case itImmTSR:
#if ((CPU==MC68040) || (CPU==MC68060) || (CPU==MC68LC040))
	case itMove16:
#endif	/* ((CPU==MC68040) || (CPU==MC68060) || (CPU==MC68LC040)) */
	    return (2);

	case itLinkL:
	case itCas2:
	case itCpDbcc:
#if ((CPU==MC68040) || (CPU==MC68060) || (CPU==MC68LC040))
	case itMove16L:
#endif	/* ((CPU==MC68040) || (CPU==MC68060) || (CPU==MC68LC040)) */
	    return (3);

	case itBra:
	    switch (binInst [0] & 0xff)
		{
		case 0: 	return (2);
		case 0xff:	return (3);
		default:	return (1);
		}

	case itTrapcc:
	    return (((binInst [0] & 7) == 4) ? 1 : binInst [0] & 7);

	case itImm:
	    return ((((binInst [0] & 0x0080) == 0) ? 2 : 3) +
		modeNwords ((binInst [0] & 0x0038) >> 3, binInst [0] & 7, 0,
			((binInst [0] & 0x0080) == 0) ? &binInst [2]
			: &binInst [3]));

	case itMoveB:
	case itMoveW:
	    {
	    frstArg = modeNwords ((binInst [0] & 0x0038) >> 3,
				   binInst [0] & 7, 1, &binInst [1]);
	    return (1 + frstArg + modeNwords ((binInst [0] & 0x01c0) >> 6,
			    		      (binInst [0] & 0x0e00) >> 9, 1,
			    		      &binInst [1 + frstArg]));
	    }
	case itMoveL:
	    {
	    frstArg = modeNwords ((binInst [0] & 0x0038) >> 3,
				    binInst [0] & 7, 2, &binInst [1]);
	    return (1 + frstArg + modeNwords ((binInst [0] & 0x01c0) >> 6,
				    	      (binInst [0] & 0x0e00) >> 9, 2,
					      &binInst [1 + frstArg]));
	    }
	case itCpBcc:
	    return ((binInst [0] & 0x40) ? 3 : 2);

	case itCpTrapcc:
	    switch (binInst [0] & 7)
		{
		case 2:		return (3);
		case 3:		return (4);
		case 4:		return (2);
		}

	/* fpp instructions */
	case itFb:
	    if (binInst[0] & 0x0040)
		return(3);
	    else
		return(2);

	case itFrestore:
	case itFsave:
	    return(1 + modeNwords((binInst[0] & 0x0038) >> 3,
			    binInst[0] & 0x7, 0, &binInst[1]));

	case itFmovek:
	case itFmovel:
	case itFmovem:
	case itFmovemc:
	    return(2 + fppNwords((binInst[0] & 0x0038) >> 3,
			    binInst[0] & 0x7, 1, 0, &binInst[2]));

	case itFmovecr:
		return(2);

	case itFabs:
	case itFacos:
	case itFadd:
	case itFasin:
	case itFatan:
	case itFatanh:
	case itFcmp:
	case itFcos:
	case itFcosh:
	case itFdb:
	case itFdiv:
	case itFetox:
	case itFetoxm1:
	case itFgetexp:
	case itFgetman:
	case itFint:
	case itFintrz:
	case itFlog10:
	case itFlog2:
	case itFlogn:
	case itFlognp1:
	case itFmod:
	case itFmove:
	case itFmul:
	case itFneg:
	case itFnop:
	case itFrem:
	case itFscale:
	case itFs:
	case itFsgldiv:
	case itFsglmul:
	case itFsin:
	case itFsincos:
	case itFsinh:
	case itFsqrt:
	case itFsub:
	case itFtan:
	case itFtanh:
	case itFtentox:
	case itFtrap:
	case itFtst:
	case itFtwotox:
	    return (2 + fppNwords ((binInst[0] & 0x0038) >> 3,
		    binInst[0] & 0x7, (binInst[1] & 0x4000) >> 14,
		    (binInst[1] & 0x1c00) >> 10,
		    /* (binInst[1] & 0x0380) >> 7, XXX eliminate? */
		    &binInst[2]));

#if	(CPU == MC68020 || CPU == MC68030)
	case itPflush:
	case itPload:
	case itPmove:
	case itPtest:
	    return (2);
#endif	/* CPU == MC68020 || CPU == MC68030 */

#if	((CPU==MC68040) || (CPU==MC68060) || (CPU==MC68LC040))
	case itPflush:
	case itPtest:
	    return (1);
#endif	/* ((CPU==MC68040) || (CPU==MC68060) || (CPU==MC68LC040)) */
	}

    /* We never get here, but just for lint ... */
    return (0);
    }
/*******************************************************************************
*
* fppNwords - number of words of extension used by the mode for fpp instrutions
*/

LOCAL int fppNwords
    (
    FAST USHORT mode,
    USHORT reg,
    USHORT rm,
    USHORT src,
    USHORT extension []         /* extension array for effective address */
    )
    {
    if (rm != 0)
	{
	if (mode == 0x7 && reg == 0x4)
	    {
	    switch (src)
		{
		case 0:
		case 1:
		    return (2);
		case 2:
		case 3:
		    return (6);
		case 4:
		    return (1);
		case 5:
		    return (4);
		case 6:
		    return (1);
		}
	    }
	else
	    return (modeNwords (mode, reg, 0, extension));
	}

    return (0);
    }
/*******************************************************************************
*
* modeNwords - Figure out the number of words of extension needed for a mode
*/

LOCAL int modeNwords
    (
    FAST USHORT mode,
    USHORT reg,
    int size,           /* the size of an immediate operand in words */
    USHORT extension [] /* extension array for effective address */
    )
    {
    switch (mode)
	{
	case 0x00:    				/* Dn */
	case 0x01:				/* An */
	case 0x02:				/* (An) */
	case 0x03:				/* (An)+ */
	case 0x04:				/* -(An) */

	    return (0);

	case 0x05:				/* (d16,An) */