dsmlib.c

VxWorks BSP框架源代码包含头文件和驱动

/* dsmLib.c - ColdFire disassembler */

/* Copyright 1984-2000 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01f,26nov01,dee  remove references to MCF5200
01e,19nov00,dh  Fix typo.
01d,02oct00,bittner INTOUCH instruction, corrected CPUSHL, removed all #ifdef MCF5200
		    from the code. Only parts of the instruction table are idef'ed.
		    (if the instruction isn't found in the table, the corresponding code
		    will not be executed anyway)
01c,29sep00,bittner Multiply and Accumulate (MAC) and v4 instruction set enhancements
01b,19jun00,ur   Removed all non-Coldfire stuff.
01a,17mar00,dra  Created from T1.0.1 ColdFire and T2 m68k ports.
*/

/*
This library contains everything necessary to print Coldfire object code in
assembly language format.  The disassembly is done in Motorola format.

The programming interface is via dsmInst(), which prints a single disassembled
instruction, and dsmNbytes(), which reports the size of an instruction.

To disassemble from the shell, use l(), which calls this
library to do the actual work.  See dbgLib() for details.

INCLUDE FILE: dsmLib.h

SEE ALSO: dbgLib
*/

#include "vxWorks.h"
#include "dsmLib.h"
#include "symLib.h"
#include "string.h"
#include "stdio.h"
#include "errnoLib.h"

#define LONGINT	 	0
#define SINGLEREAL	1
#define EXTENDEDREAL	2
#define PACKEDDECIMAL	3
#define WORDINT		4
#define DOUBLEREAL	5
#define BYTEINT		6

/* forward static functions */

static INST *dsmFind (USHORT binInst [ ]);
static void dsmPrint (USHORT binInst [ ], INST *iPtr, int address, int
		nwords, FUNCPTR prtAddress);
static int dsmNwords (USHORT binInst [ ], INST *iPtr);
static int fppNwords (USHORT mode, USHORT reg, USHORT rm, USHORT src, USHORT
		extension [ ]);
static int modeNwords (USHORT mode, USHORT reg, int size, USHORT extension [
		]);
static int mode6And7Words (USHORT extension [ ]);
static void prtArgs (USHORT binInst [ ], INST *iPtr, int address, FUNCPTR
		prtAddress);
static void prContReg (USHORT contReg);
static void prEffAddr (USHORT mode, USHORT reg, USHORT extension [ ], int
		size, FUNCPTR prtAddress);
static void prMovemRegs (USHORT extension, USHORT mode);
static void prFmovemr (USHORT mode, USHORT rlist);
static void prFmovemcr (USHORT rlist);
static void prtSizeField (USHORT binInst [ ], INST *iPtr);
static void nPrtAddress (int address);
static void prOffWid (USHORT dO, USHORT offset, USHORT dW, USHORT width);
static void prIndirectIndex (USHORT extension [ ], USHORT mode, USHORT reg);
static void prDisplace (USHORT size, USHORT pDisp [ ]);

/* 
 * include MAC (5206e and 53xx) CPUs
 * and V4 enhancements
 * 
 */
#define MCF52PLUS		/* additions to instruction set for MCF5200 and higher */
#define INCLUDE_MAC		/* multiply and accumulate instructions */
#if (CPU==MCF5400)
#define INCLUDE_V4		/* Coldfire V4 intruction set enhancements */
#endif

/*
This table is ordered by the number of bits in an instruction's
two word mask, beginning with the greatest number of bits in masks.
This scheme is used for avoiding conflicts between instructions
when matching bit patterns.  The instruction ops are arranged
sequentially within each group of instructions for a particular
mask so that uniqueness can be easily spotted.
*/

#if defined (INCLUDE_MAC)
/*    MAC instructions for Coldfire 5206 & 53xx	*/
LOCAL INST inst_add [] =
    {
    /* 16 bit mask */ 
    {"MOVE",	itMoveTCCR,   0xa9c0, 0x0000,	  0xffc0, 0x0000,    0x00, 0x00},
    
    /*    12 bit mask	*/
    {"MOVE",	itMoveFACC,   0xa180, 0x0000, 0xfff0, 0x0000,  0x00, 0x00},
    {"MOVE",	itMoveFMACSR, 0xa980, 0x0000, 0xfff0, 0x0000,  0x00, 0x00},
    {"MOVE",	itMoveFMASK,  0xad80, 0x0000, 0xfff0, 0x0000,  0x00, 0x00},
    
    /*    10 bit mask	*/
    {"MOVE",	itMoveTACC,   0xa100, 0x0000, 0xffc0, 0x0000,  0xfc, 0xef},
    {"MOVE",	itMoveTMACSR, 0xa900, 0x0000, 0xffc0, 0x0000,  0xfc, 0xef},
    {"MOVE",	itMoveTMASK,  0xad00, 0x0000, 0xffc0, 0x0000,  0xfc, 0xef},
    
    /*    9 bit mask	*/
    {"MAC",	itMac,        0xa000, 0x0000, 0xf1b0, 0x0100,  0x00, 0x00},
    {"MSAC",	itMsac,       0xa000, 0x0100, 0xf1b0, 0x0100,  0x00, 0x00},
    
     /*    8 bit mask	*/
    {"MACL",	itMacl,       0xa080, 0x0000, 0xf180, 0x0110,  0xc3, 0x00},
    {"MSACL",	itMsacl,      0xa080, 0x0100, 0xf180, 0x0110,  0xc3, 0x00},
    {""	    ,	0,	      0,      0,      0,      0,       0,    0   }
    };
#endif

LOCAL INST inst [] =
    {
    /*   26 bit mask */
    {"DIVU",	itDivL, 0x4c40, 0x0000,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVS",	itDivL, 0x4c40, 0x0800,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVU",	itDivL, 0x4c40, 0x1001,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVS",	itDivL, 0x4c40, 0x1801,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVU",	itDivL, 0x4c40, 0x2002,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVS",	itDivL, 0x4c40, 0x2802,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVU",	itDivL, 0x4c40, 0x3003,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVS",	itDivL, 0x4c40, 0x3803,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVU",	itDivL, 0x4c40, 0x4004,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVS",	itDivL, 0x4c40, 0x4804,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVU",	itDivL, 0x4c40, 0x5005,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVS",	itDivL, 0x4c40, 0x5805,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVU",	itDivL, 0x4c40, 0x6006,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVS",	itDivL, 0x4c40, 0x6806,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVU",	itDivL, 0x4c40, 0x7007,	  0xffc0, 0xffff,    0x02, 0x00},
    {"DIVS",	itDivL, 0x4c40, 0x7807,	  0xffc0, 0xffff,    0x02, 0x00},

#if defined (MCF52PLUS)
    {"WDEBUG",	itWDebug, 0xfbc0, 0x0003, 0xffc0, 0xffff,    0x00, 0x00},
#endif /* MCF52PLUS */

    /*   24 bit mask */
    {"ORI",	itImmCCR, 0x003c, 0x0000, 0xffff, 0xff00,    0x00, 0x00},
								    /* to CCR */
    {"ANDI",	itImmCCR, 0x023c, 0x0000, 0xffff, 0xff00,    0x00, 0x00},
								    /* to CCR */
    {"EORI",	itImmCCR, 0x0a3c, 0x0000, 0xffff, 0xff00,    0x00, 0x00},
								   /* to CCR */
    {"CAS2",	itCas2,   0x0cfc, 0x0000, 0xffff, 0x0e38,    0x00, 0x00},
    {"CAS2",	itCas2,   0x0efc, 0x0000, 0xffff, 0x0e38,    0x00, 0x00},

    /*     22 bit mask	*/
    {"CHK2",	itChk2, 0x00c0, 0x0800,	  0xffc0, 0x0fff,    0x9b, 0x10},
    {"CMP2",	itChk2, 0x00c0, 0x0000,	  0xffc0, 0x0fff,    0x9b, 0x10},
    {"CHK2",	itChk2, 0x02c0, 0x0800,   0xffc0, 0x0fff,    0x9b, 0x10},
    {"CMP2",	itChk2, 0x02c0, 0x0000,	  0xffc0, 0x0fff,    0x9b, 0x10},
    {"CHK2",	itChk2, 0x04c0, 0x0800,	  0xffc0, 0x0fff,    0x9b, 0x10},
    {"CMP2",	itChk2, 0x04c0, 0x0000,	  0xffc0, 0x0fff,    0x9b, 0x10},
    {"MOVES",	itMoves,0x0e00, 0x0000,   0xffc0, 0x0fff,    0x83, 0x1c},
    {"MOVES",	itMoves,0x0e40, 0x0000,   0xffc0, 0x0fff,    0x83, 0x1c},
    {"MOVES",	itMoves,0x0e80, 0x0000,   0xffc0, 0x0fff,    0x83, 0x1c},

    /*     21 bit mask	*/
    {"CAS",	itCas, 0x0ac0, 0x0000,	  0xffc0, 0xfe38,    0x83, 0x1c},
    {"CAS",	itCas, 0x0cc0, 0x0000,	  0xffc0, 0xfe38,    0x83, 0x1c},
    {"CAS",	itCas, 0x0ec0, 0x0000,	  0xffc0, 0xfe38,    0x83, 0x1c},

    /*   Fpp instructions */
    {"FABS",	itFabs,   0xf200, 0x0018,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FACOS",   itFacos,  0xf200, 0x001c,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FADD",    itFadd,   0xf200, 0x0022,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FASIN",	itFasin,  0xf200, 0x000c,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FATAN",	itFatan,  0xf200, 0x000a,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FATANH",	itFatanh, 0xf200, 0x000b,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FCMP",	itFcmp,   0xf200, 0x0038,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FCOS",	itFcos,   0xf200, 0x001d,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FCOSH",	itFcosh,  0xf200, 0x0019,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FDB",	itFdb,    0xf248, 0x0000,   0xfff8, 0xffc0,    0x00, 0x00},
    {"FDIV",	itFdiv,   0xf200, 0x0020,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FETOX",	itFetox,  0xf200, 0x0010,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FETOXM1",	itFetoxm1,0xf200, 0x0008,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FGETEXP",	itFgetexp,0xf200, 0x001e,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FGETMAN",	itFgetman,0xf200, 0x001f,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FINT",	itFint,   0xf200, 0x0001,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FINTRZ",	itFintrz, 0xf200, 0x0003,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FLOG10",	itFlog10, 0xf200, 0x0015,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FLOG2",	itFlog2,  0xf200, 0x0016,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FLOGN",	itFlogn,  0xf200, 0x0014,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FLOGNP1",	itFlognp1,0xf200, 0x0006,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FMOD",	itFmod,   0xf200, 0x0021,   0xffc0, 0xa07f,    0x02, 0x00},
    {"FMOVE",	itFmove,  0xf200, 0x0000,   0xffc0, 0xffff,    0x00, 0x00},
    {"FMOVE",	itFmove,  0xf200, 0x4000,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FMOVE",	itFmovek, 0xf200, 0x6000,   0xffc0, 0xe000,    0x82, 0x1c},
    {"FMOVE",	itFmovel, 0xf200, 0x8000,   0xffc0, 0xe3ff,    0x00, 0x00},
    {"FMOVE",	itFmovel, 0xf200, 0xa000,   0xffc0, 0xe3ff,    0x80, 0x1c},
    {"FMOVECR",	itFmovecr,0xf200, 0x5c00,   0xffc0, 0xfc00,    0x00, 0x00},
    {"FMOVEM",	itFmovem, 0xf200, 0xc000,   0xffc0, 0xe700,    0x83, 0x10},
    {"FMOVEM",	itFmovem, 0xf200, 0xe000,   0xffc0, 0xe700,    0x83, 0x1c},
    {"FMOVEM",	itFmovemc,0xf200, 0xc000,   0xffc0, 0xe3ff,    0x00, 0x00},
    {"FMOVEM",	itFmovemc,0xf200, 0xe000,   0xffc0, 0xe3ff,    0x80, 0x1c},
    {"FMUL",	itFmul,   0xf200, 0x0023,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FMUL",	itFmul,   0xf200, 0x4023,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FNEG",	itFneg,   0xf200, 0x001a,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FNEG",	itFneg,   0xf200, 0x401a,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FNOP",	itFnop,   0xf200, 0x0000,   0xffc0, 0xffff,    0x00, 0x00},
    {"FREM",	itFrem,   0xf200, 0x0025,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FREM",	itFrem,   0xf200, 0x4025,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FSCALE",	itFscale, 0xf200, 0x0026,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FSCALE",	itFscale, 0xf200, 0x4026,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FS",	itFs,     0xf200, 0x0000,   0xffc0, 0xffc0,    0x82, 0x1c},
    {"FSGLDIV",	itFsgldiv,0xf200, 0x0024,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FSGLDIV",	itFsgldiv,0xf200, 0x4024,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FSGLMUL",	itFsglmul,0xf200, 0x0027,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FSGLMUL",	itFsglmul,0xf200, 0x4027,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FSIN",	itFsin,   0xf200, 0x000e,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FSIN",	itFsin,   0xf200, 0x400e,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FSINCOS",	itFsincos,0xf200, 0x0030,   0xffc0, 0xe078,    0x00, 0x00},
    {"FSINCOS",	itFsincos,0xf200, 0x4030,   0xffc0, 0xe078,    0x00, 0x00},
    {"FSINH",	itFsinh,  0xf200, 0x0002,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FSINH",	itFsinh,  0xf200, 0x4002,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FSQRT",	itFsqrt,  0xf200, 0x0004,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FSQRT",	itFsqrt,  0xf200, 0x4004,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FSUB",	itFsub,   0xf200, 0x0028,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FSUB",	itFsub,   0xf200, 0x4028,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FTAN",	itFtan,   0xf200, 0x000f,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FTAN",	itFtan,   0xf200, 0x400f,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FTANH",	itFtanh,  0xf200, 0x0009,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FTANH",	itFtanh,  0xf200, 0x4009,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FTENTOX",	itFtentox,0xf200, 0x0012,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FTENTOX",	itFtentox,0xf200, 0x4012,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FTRAP",	itFtrap,  0xf200, 0x0000,   0xffc0, 0xffc0,    0x00, 0x00},
    {"FTST",	itFtst,   0xf200, 0x003a,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FTST",	itFtst,   0xf200, 0x403a,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FTWOTOX",	itFtwotox,0xf200, 0x0011,   0xffc0, 0xe07f,    0x00, 0x00},
    {"FTWOTOX",	itFtwotox,0xf200, 0x4011,   0xffc0, 0xe07f,    0x02, 0x00},
    {"FB",	itFb,     0xf280, 0x0000,   0xff80, 0x0000,    0x00, 0x00},
    {"FRESTORE",itFrestore,0xf340,0x0000,   0xffc0, 0x0000,    0x93, 0x10},
    {"FSAVE",	itFsave,  0xf300, 0x0000,   0xffc0, 0x0000,    0x8b, 0x1c},

    /*     20 bit mask	*/
    {"DIVUL",	itDivL,    0x4c40, 0x0000,   0xffc0, 0x8ff8,    0x02, 0x00},
    {"DIVU",	itDivL,    0x4c40, 0x0400,   0xffc0, 0x8ff8,    0x02, 0x00},
    {"DIVSL",	itDivL,    0x4c40, 0x0800,   0xffc0, 0x8ff8,    0x02, 0x00},
    {"DIVS",	itDivL,    0x4c40, 0x0c00,   0xffc0, 0x8ff8,    0x02, 0x00},
    {"cpDBcc",	itCpDbcc,  0xf048, 0x0000,   0xf1f8, 0xffc0,    0x00, 0x00},
    {"cpTRAP",	itCpTrapcc,0xf078, 0x0000,   0xf1f8, 0xffc0,    0x00, 0x00},

    /*    19 bit mask	*/
    {"MULS",	itDivL, 0x4c00, 0x0800,	  0xffc0, 0x8bf8,    0x02, 0x00},
    {"MULU",	itDivL, 0x4c00, 0x0000,	  0xffc0, 0x8bf8,    0x02, 0x00},

    /*    18 bit mask	*/
    {"BTST",	itStatBit, 0x0800,0x0000,   0xffc0, 0xff00,    0x82, 0x10},
    {"BCHG",	itStatBit, 0x0840,0x0000,   0xffc0, 0xff00,    0x82, 0x1c},
    {"BCLR",	itStatBit, 0x0880,0x0000,   0xffc0, 0xff00,    0x82, 0x1c},
    {"CALLM",	itCallm,   0x06c0,0x0000,   0xffc0, 0xff00,    0x9b, 0x10},

    /*    17 bit mask	*/
    {"BSET",	itStatBit,  0x08c0, 0x0000,  0xffc0, 0xfe00,    0x82, 0x1c},

    /*    16 bit mask */
    {"ANDI",	itImmTSR,   0x027c, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
								    /* to SR */
    {"ORI",	itImmTSR,   0x007c, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
								    /* to SR */
    {"EORI",	itImmTSR,   0x0a7c, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
								    /* to SR */
#if defined ( MCF52PLUS )
    {"HALT",	itComplete, 0x4ac8, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
    {"PULSE",	itComplete, 0x4acc, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
#endif /* MCF52PLUS */
    {"ILL",	itComplete, 0x4afc, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
    {"RESET",	itComplete, 0x4e70, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
    {"NOP",	itComplete, 0x4e71, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
    {"STOP",	itStop,     0x4e72, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
    {"RTE",	itComplete, 0x4e73, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
    {"RTD",	itRTD, 	    0x4e74, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
    {"RTS",	itComplete, 0x4e75, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
    {"TRAPV",	itComplete, 0x4e76, 0x0000,  0xffff, 0x0000,    0x00, 0x00},
    {"RTR",	itComplete, 0x4e77, 0x0000,  0xffff, 0x0000,    0x00, 0x00},

    /*     15 bit mask	*/
    {"MOVEC",	itMovec,    0x4e7a, 0x0000,  0xfffe, 0x0000,    0x00, 0x00},

    /*     14 bit mask	*/
    {"BFCHG",	itBfchg,    0xeac0, 0x0000,  0xffc0, 0xf000,    0x9a, 0x1c},
    {"BFCLR",	itBfchg,    0xecc0, 0x0000,  0xffc0, 0xf000,    0x9a, 0x1c},
    {"BFSET",	itBfchg,    0xeec0, 0x0000,  0xffc0, 0xf000,    0x9a, 0x1c},

    /*    13 bit mask	*/
    {"LINK",	itLinkL,    0x4808, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"SWAP",	itSwap,     0x4840, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"BKPT",	itBkpt,     0x4848, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"EXT",	itExt,      0x4880, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"EXT",	itExt,      0x48c0, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"EXTB",	itExt,      0x49c0, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"LINK",	itLink,     0x4e50, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"UNLK",	itUnlk,     0x4e58, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBT",	itDb,       0x50c8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPT",	itTrapcc,   0x50f8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBF",	itDb,       0x51c8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPF",	itTrapcc,   0x51f8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBHI",	itDb,       0x52c8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPHI",	itTrapcc,   0x52f8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBLS",	itDb,       0x53c8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPLS",	itTrapcc,   0x53f8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBCC",	itDb,       0x54c8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPCC",	itTrapcc,   0x54f8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBCS",	itDb,       0x55c8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPCS",	itTrapcc,   0x55f8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBNE",	itDb,       0x56c8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPNE",	itTrapcc,   0x56f8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBEQ",	itDb,       0x57c8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPEQ",	itTrapcc,   0x57f8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBVC",	itDb,       0x58c8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPVC",	itTrapcc,   0x58f8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBVS",	itDb,       0x59c8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPVS",	itTrapcc,   0x59f8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBPL",	itDb,       0x5ac8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPPL",	itTrapcc,   0x5af8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBMI",	itDb,       0x5bc8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPMI",	itTrapcc,   0x5bf8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBGE",	itDb,       0x5cc8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPGE",	itTrapcc,   0x5cf8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBLT",	itDb,       0x5dc8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPLT",	itTrapcc,   0x5df8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBGT",	itDb, 	    0x5ec8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPGT",	itTrapcc,   0x5ef8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"DBLE",	itDb,       0x5fc8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"TRAPLE",	itTrapcc,   0x5ff8, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"BFTST",	itBfchg,    0xe8c0, 0x0000,  0xffc0, 0xe000,    0x9a, 0x10},
#if defined ( MCF52PLUS )
    {"CPUSHL", itCpush,	    0xf4e8, 0x0000, 0xfff8,  0x0000,    0x00, 0x00},
#endif /* defined ( MCF52PLUS ) */
#if defined ( INCLUDE_V4 )
    {"CPUSHL", itCpush,	    0xf468, 0x0000, 0xfff8,  0x0000,    0x00, 0x00},
    {"CPUSHL", itCpush,	    0xf4a8, 0x0000, 0xfff8,  0x0000,    0x00, 0x00},
    {"SATS",	itSats,	    0x4c80, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
    {"INTOUCH",	itIntouch,  0xf428, 0x0000,  0xfff8, 0x0000,    0x00, 0x00},
#endif

    /*     12 bit mask	*/
    {"RTM",	itRtm, 	    0x06c0, 0x0000,  0xfff0, 0x0000,    0x00, 0x00},
    {"TRAP",	itTrap,     0x4e40, 0x0000,  0xfff0, 0x0000,    0x00, 0x00},
    {"MOVE",	itMoveUSP,  0x4e60, 0x0000,  0xfff0, 0x0000,    0x00, 0x00},
								    /* USP */
    /*    11 bit mask	*/
    {"BFEXTU",	itBfext,    0xe9c0, 0x0000,  0xffc0, 0x8000,    0x9a, 0x10},
    {"BFEXTS",	itBfext,    0xebc0, 0x0000,  0xffc0, 0x8000,    0x9a, 0x10},
    {"BFFFO",	itBfext,    0xedc0, 0x0000,  0xffc0, 0x8000,    0x9a, 0x10},
    {"BFINS",	itBfins,    0xefc0, 0x0000,  0xffc0, 0x8000,    0x9a, 0x1c},

    /*     10 bit mask	*/
    {"ORI",	itImm,      0x0000, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"ORI",	itImm,      0x0040, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"ORI",	itImm,      0x0080, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"ANDI",	itImm,      0x0200, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"ANDI",	itImm,      0x0240, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"ANDI",	itImm,      0x0280, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SUBI",	itImm,      0x0400, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SUBI",	itImm,      0x0440, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SUBI",	itImm,      0x0480, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"ADDI",	itImm,      0x0600, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"ADDI",	itImm,      0x0640, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"ADDI",	itImm,      0x0680, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"EORI",	itImm,      0x0a00, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"EORI",	itImm,      0x0a40, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"EORI",	itImm,      0x0a80, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"CMPI",	itImm,      0x0c00, 0x0000,  0xffc0, 0x0000,    0x82, 0x10},
    {"CMPI",	itImm,      0x0c40, 0x0000,  0xffc0, 0x0000,    0x82, 0x10},
    {"CMPI",	itImm,      0x0c80, 0x0000,  0xffc0, 0x0000,    0x82, 0x10},
    {"MOVE",	itMoveFSR,  0x40c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
					 		    /* from SR*/
    {"MOVE",	itMoveFCCR, 0x42c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    								    /*from CCR*/
    {"MOVE",	itMoveCCR,  0x44c0, 0x0000,  0xffc0, 0x0000,    0x02, 0x00},
								    /* to CCR */
    {"MOVE",	itMoveTSR,  0x46c0, 0x0000,  0xffc0, 0x0000,    0x02, 0x00},
								    /* to SR */
    {"NBCD",	itNbcd,     0x4800, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"PEA",	itNbcd,     0x4840, 0x0000,  0xffc0, 0x0000,    0x9b, 0x10},
    {"TAS",	itNbcd,     0x4ac0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"JSR",	itNbcd,     0x4e80, 0x0000,  0xffc0, 0x0000,    0x9b, 0x10},
    {"JMP",	itNbcd,     0x4ec0, 0x0000,  0xffc0, 0x0000,    0x9b, 0x10},
    {"ST",	itScc,      0x50c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SF",	itScc,      0x51c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SHI",	itScc,      0x52c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SLS",	itScc,      0x53c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SCC",	itScc,      0x54c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SCS",	itScc,      0x55c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SNE",	itScc,      0x56c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SEQ",	itScc,      0x57c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SVC",	itScc,      0x58c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SVS",	itScc,      0x59c0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SPL",	itScc,      0x5ac0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SMI",	itScc,      0x5bc0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SGE",	itScc,      0x5cc0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SLT",	itScc,      0x5dc0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SGT",	itScc,      0x5ec0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"SLE",	itScc,      0x5fc0, 0x0000,  0xffc0, 0x0000,    0x82, 0x1c},
    {"ASR",	itMemShift, 0xe0c0, 0x0000,  0xffc0, 0x0000,    0x83, 0x1c},
    {"ASL",	itMemShift, 0xe1c0, 0x0000,  0xffc0, 0x0000,    0x83, 0x1a},