dbgstrlib.c

VxWorks BSP框架源代码包含头文件和驱动

	}

    /* set the BTS and PEBS index */

    pH->btsIndex  = pH->btsBase;
    pH->pebsIndex = pH->pebsBase;

    /* clear the buffer to set access & dirty bit in PTE */

    bfill ((char *)pH->btsBase, pH->btsMax - (UINT32)pH->btsBase - 1, 0);
    bfill ((char *)pH->pebsBase, pH->pebsMax - (UINT32)pH->pebsBase - 1, 0);

    return (pH);
    }

/*******************************************************************************
*
* dbgStrBufAlloc - allocate the Debug Store buffers of the specified task
*
* This routine allocates the Debug Store buffers of the specified task
* The first and second parameter of dbgStrLibInit() is used for the BTS and 
* PEBS buffer size respectively.  If the pTcb is NONE, the allocated buffer 
* is set to the system DS config - dbgStrcfg.
*
* RETURNS: OK, or ERROR if there is no memory to alloc.
*/

STATUS dbgStrBufAlloc
    (
    WIND_TCB * pTcb	/* pointer to the task's WIND_TCB */
    )
    {
    X86_EXT * pExt = NULL;	/* X86 TCB extension */
    DS_CONFIG * pC = NULL;	/* DS config */
    DS_BUF_HEADER * pH;		/* DS header */
    UINT32 btsNbytesMax = 0;	/* BTS max bytes */
    UINT32 btsNbytesInt = 0;	/* BTS threshold bytes */
    UINT32 pebsNbytesMax = 0;	/* PEBS max bytes */
    UINT32 pebsNbytesInt = 0;	/* PEBS threshold bytes */
    UINT32 nRec;

    /* get the DS config */

    if (pTcb == (WIND_TCB *)NONE)
	pC = &dbgStrCfg;
    else if (pTcb == NULL)
	pExt = (X86_EXT *)taskIdCurrent->reserved2;
    else
	pExt = (X86_EXT *)pTcb->reserved2;

    if (pExt != NULL)
	pC = (DS_CONFIG *)pExt->reserved0;

    if (pC == NULL)
	return (ERROR);
    
    /* get (btsMax - btsBase) and (btsThreshold - btsBase) */

    nRec = pC->btsNbytes / sizeof (BTS_REC);
    btsNbytesMax = nRec * sizeof (BTS_REC);
    nRec = (pC->btsNbytes - BTS_NBYTES_OFF) / sizeof (BTS_REC);
    btsNbytesInt = nRec * sizeof (BTS_REC);

    /* get (pebsMax - pebsBase) and (pebsThreshold - pebsBase) */

    nRec = pC->pebsNbytes / sizeof (PEBS_REC);
    pebsNbytesMax = nRec * sizeof (PEBS_REC);
    nRec = (pC->pebsNbytes - PEBS_NBYTES_OFF) / sizeof (PEBS_REC);
    pebsNbytesInt = nRec * sizeof (PEBS_REC);

    /* allocate and initialize the DS header, BTS/PEBS buffer */

    pH = dbgStrBufInit (NULL, NULL, btsNbytesMax, btsNbytesInt, 
			NULL, pebsNbytesMax, pebsNbytesInt);

    if (pH == NULL)
	return (ERROR);

    pC->pH = pH;

    return (OK);
    }

/*******************************************************************************
*
* dbgStrBufFree - deallocate the Debug Store buffers of the specified task
*
* This routine deallocates the Debug Store buffers of the specified task
* If the pTcb is NONE, the allocated buffer for the system DS config 
* - dbgStrCfg is deallocated.
*
* RETURNS: OK, or ERROR if the specified task is NONE or has no buffer.
*/

STATUS dbgStrBufFree
    (
    WIND_TCB * pTcb	/* pointer to the task's WIND_TCB */
    )
    {
    X86_EXT * pExt = NULL;	/* X86 TCB extension */
    DS_CONFIG * pC = NULL;	/* DS config */
    DS_BUF_HEADER * pH;		/* DS header */

    /* get the DS config */

    if (pTcb == (WIND_TCB *)NONE)
	pC = &dbgStrCfg;
    else if (pTcb == NULL)
	pExt = (X86_EXT *)taskIdCurrent->reserved2;
    else
	pExt = (X86_EXT *)pTcb->reserved2;

    if (pExt != NULL)
	pC = (DS_CONFIG *)pExt->reserved0;

    if ((pC == NULL) || (pC->pH == NULL))
	return (ERROR);
    
    /* free the DS header and the DS config */

    pH = pC->pH;

    if (pH->btsBase != NULL)
        KMEM_FREE ((char *)pH->btsBase);

    if (pH->pebsBase != NULL)
        KMEM_FREE ((char *)pH->pebsBase);

    KMEM_FREE ((char *)pH);

    return (OK);
    }

/*******************************************************************************
*
* dbgStrConfig - configure the Debug Store (BTS + PEBS) mechanism
*
* This routine configures the Debug Store (BTS + PEBS) mechanism
* This routine stores the configuration parameters in the DS_CONFIG
* structure.  If the first parameter is NONE, the system DS_CONFIG 
* structure is used.  If it is NULL, the current task's one is used.
* If the BTS interrupt mode is FALSE, the BTS buffer is used as a
* circular buffer.  This routine does not access any MSRs.
*
* RETURNS: OK, or ERROR if there is no DS header
*/

STATUS dbgStrConfig 
    (
    WIND_TCB * pTcb,	/* pointer to deleted task's WIND_TCB */
    BOOL  btsEnable,	/* BTS,  TRUE to enable BTS, FALSE to disable */
    BOOL  pebsEnable,	/* PEBS, TRUE to enable PEBS, FALSE to disable */
    BOOL  btsIntMode,	/* BTS,  TRUE to raise int, FALSE to circular mode */
    BOOL  btsBufMode,	/* BTS,  TRUE to store BTMs, FALSE to send it on Bus */
    INT32 pebsEvent,	/* PEBS, event */
    INT32 pebsMetric,	/* PEBS, metric in the event */
    BOOL  pebsOs,	/* PEBS, TRUE if OS mode, otherwise USR mode */
    LL_INT * pPebsValue	/* PEBS, (reset) value in the counter */
    )
    {
    X86_EXT * pExt = NULL;	/* X86 TCB extension */
    DS_CONFIG * pC = NULL;	/* DS config */

    /* get the DS config */

    if (pTcb == (WIND_TCB *)NONE)
	pC = &dbgStrCfg;
    else if (pTcb == NULL)
	pExt = (X86_EXT *)taskIdCurrent->reserved2;
    else
	pExt = (X86_EXT *)pTcb->reserved2;

    if (pExt != NULL)
	pC = (DS_CONFIG *)pExt->reserved0;

    if (pC == NULL)
	return (ERROR);

    /* set the BTS/PEBS configuration parameters */

    pC->btsEnabled  = btsEnable;
    pC->pebsEnabled = pebsEnable;
    pC->btsIntMode  = btsIntMode;
    pC->btsBufMode  = btsBufMode;
    pC->pebsEvent   = pebsEvent;
    pC->pebsMetric  = pebsMetric;
    pC->pebsOs      = pebsOs;
    pC->pebsCtr     = (pPebsValue != NULL) ? *pPebsValue : PEBS_DEF_RESET;

    return (OK);
    }

/*******************************************************************************
*
* dbgStrStart - start or stop the Debug Store (BTS + PEBS) mechanism
* 
* This routine starts/stops the BTS/PEBS with parameters set by dbgStrConfig().
* The BTS/PEBS can be enabled or disabled depending on the parameters.
* This routine calls dbgStrBtsModeSet(), dbgStrBtsEnable(), 
* dbgStrPebsModeSet(), dbgStrPebsEnable().
*
* RETURNS: OK, or ERROR if there is no DS header
*/

STATUS dbgStrStart 
    (
    WIND_TCB * pTcb	/* pointer to the task's WIND_TCB */
    )
    {
    X86_EXT * pExt = NULL;	/* X86 TCB extension */
    DS_CONFIG * pC = NULL;	/* DS config */
    int value[2];		/* MSR 64 bits value */
    int oldLevel;		/* old int level */

    /* get the DS config */

    if (pTcb == (WIND_TCB *)NONE)
	pC = &dbgStrCfg;
    else if (pTcb == NULL)
	pExt = (X86_EXT *)taskIdCurrent->reserved2;
    else
	pExt = (X86_EXT *)pTcb->reserved2;

    if (pExt != NULL)
	pC = (DS_CONFIG *)pExt->reserved0;

    if ((pC == NULL) || (pC->pH == NULL))
	return (ERROR);
    
    /* stop the BTS/PEBS with interrupt locked */

    oldLevel = intLock ();		/* LOCK INTERRUPTS */
    dbgStrBtsEnable (FALSE);
    dbgStrPebsEnable (FALSE);
    intUnlock (oldLevel);		/* UNLOCK INTERRUPTS */

    /* set the linear address of the Debug Store buffer header */

    value[0] = (int)pC->pH;
    value[1] = 0;
    pentiumMsrSet (IA32_DS_AREA, (LL_INT *)&value);

    dbgStrCurrent = pC;			/* update */

    /* set the parameters to the BTS/PEBS MSRs */

    dbgStrBtsModeSet (pC->btsIntMode, pC->btsBufMode);
    dbgStrPebsModeSet (pC->pebsEvent, pC->pebsMetric, pC->pebsOs, 
    		       &pC->pebsCtr);
    oldLevel = intLock ();		/* LOCK INTERRUPTS */
    dbgStrBtsEnable (pC->btsEnabled);
    dbgStrPebsEnable (pC->pebsEnabled);
    intUnlock (oldLevel);		/* UNLOCK INTERRUPTS */

    return (OK);
    }

/*******************************************************************************
*
* dbgStrStop - stop the Debug Store (BTS + PEBS) mechanism
* 
* This routine stops the BTS/PEBS mechanism if the specified task is the
* current task.  Otherwise, it set the disable flag in the DS configuration
* parameter of the task.
* This routine calls dbgStrBtsEnable() and dbgStrPebsEnable().
*
* RETURNS: OK, or ERROR if there is no DS header
*/

STATUS dbgStrStop 
    (
    WIND_TCB * pTcb	/* pointer to the task's WIND_TCB */
    )
    {
    X86_EXT * pExt = NULL;	/* X86 TCB extension */
    DS_CONFIG * pC = NULL;	/* DS config */
    int oldLevel;		/* old int level */

    /* get the DS config */

    if (pTcb == (WIND_TCB *)NONE)
	pC = &dbgStrCfg;
    else if (pTcb == NULL)
	pExt = (X86_EXT *)taskIdCurrent->reserved2;
    else
	pExt = (X86_EXT *)pTcb->reserved2;

    if (pExt != NULL)
	pC = (DS_CONFIG *)pExt->reserved0;

    if ((pC == NULL) || (pC->pH == NULL))
	return (ERROR);
    
    /* set the configuration parameter FALSE(disable) */

    pC->btsEnabled  = FALSE;
    pC->pebsEnabled = FALSE;

    /* stop the BTS/PEBS with interrupt locked */

    if ((pTcb == (WIND_TCB *)NONE) || (pTcb == NULL))
	{
        oldLevel = intLock ();		/* LOCK INTERRUPTS */
        dbgStrBtsEnable (FALSE);
        dbgStrPebsEnable (FALSE);
        intUnlock (oldLevel);		/* UNLOCK INTERRUPTS */
	}

    return (OK);
    }

/*******************************************************************************
*
* dbgStrBtsModeSet - set the BTS (Branch Trace Store) mode
*
* This routine sets the BTS (Branch Trace Store) mode.
*
* RETURNS: OK, or ERROR if the BTS is not initialized.
*/

STATUS dbgStrBtsModeSet 
    (
    BOOL intMode,	/* TRUE to generate int, FALSE to circular mode */
    BOOL bufMode	/* TRUE to store BTMs, FALSE to send BTMs on Bus */
    )
    {
    int value[2];	/* MSR 64 bits value */

    /* check if the BTS initialization succeeded */

    if (!dbgStrCfg.btsAvailable)
	return (ERROR);

    /* set the BT and BTINT bit in IA32_DEBUGCTL */

    pentiumMsrGet (IA32_DEBUGCTL, (LL_INT *)&value);
    value[0] &= ~(DBG_P7_BTS | DBG_P7_BTINT);
    if (bufMode)
	value[0] |= DBG_P7_BTS;
    if (intMode)
	value[0] |= DBG_P7_BTINT;
    pentiumMsrSet (IA32_DEBUGCTL, (LL_INT *)&value);

    return (OK);
    }

/*******************************************************************************
*
* dbgStrBtsEnable - enables BTS (Branch Trace Store) mechanism
*
* This routine enables BTS (Branch Trace Store) mechanism.
*
* RETURNS: TRUE, or FALSE if the BTS was not enabled
*/

BOOL dbgStrBtsEnable 
    (
    BOOL enable		/* TRUE to enable, FALSE to disable the BTS */
    )
    {
    int value[2];	/* MSR 64 bits value */
    int oldValue;	/* old value */

    /* check if the BTS initialization succeeded */

    if (!dbgStrCfg.btsAvailable)
	return (FALSE);

    /* get the IA32_DEBUGCTL value */

    pentiumMsrGet (IA32_DEBUGCTL, (LL_INT *)&value);
    oldValue = value[0];

    /* enable or disable the BTM */

    if (enable)
        value[0] |= DBG_P7_TR;
    else
        value[0] &= ~DBG_P7_TR;

    /* set the IA32_DEBUGCTL value */

    pentiumMsrSet (IA32_DEBUGCTL, (LL_INT *)&value);

    return ((oldValue & DBG_P7_TR) ? TRUE : FALSE);
    }

/*******************************************************************************
*
* dbgStrPebsModeSet - set the PEBS (Precise Event Based Sampling) mode
*
* This routine sets the PEBS (Precise Event Based Sampling) mode.
*
* RETURNS: OK, or ERROR if the PEBS is not initialized.
*/

STATUS dbgStrPebsModeSet 
    (
    INT32 event,	/* event */
    INT32 metric,	/* metric in the event */
    BOOL os,		/* TRUE if OS mode, otherwise USR mode */
    LL_INT * pValue	/* (reset) value in the counter */
    )
    {
    STATUS status = ERROR;	/* return value */

    /* check if the PEBS initialization succeeded */

    if (!dbgStrCfg.pebsAvailable)
	return (ERROR);

    /* set up the PEBS counter */

    dbgStrCurrent->pH->pebsCtr = *pValue;
    pentiumMsrSet (MSR_IQ_COUNTER4, pValue);

    /* set up ESCR/CCCR/PEBS_ENABLE MSRs for the PEBS event */

    switch (event)
	{
	case PEBS_FRONT_END:
	    status = dbgStrPebsFrontEnd (metric, os);
	    break;

	case PEBS_EXECUTION:
	    status = dbgStrPebsExec (metric, os);
	    break;

	case PEBS_REPLAY:
	    status = dbgStrPebsReplay (metric, os);
	    break;

	default:
	    break;
	}

    return (status);
    }

/*******************************************************************************
*
* dbgStrPebsEnable - enables PEBS (Precise Event Based Sampling) mechanism
*
* This routine enables PEBS (Precise Event Based Sampling) mechanism.
*
* RETURNS: TRUE, or FALSE if the PEBS was not enabled
*/